CXA3221AN RX Gain Control Amplifier Description CXA3221AN is an RX gain control amplifier suitable for CDMA cellular/PCS phone. 8 pin SSOP (Plastic) Features • Wide gain control range • Linear gain slope • Wideband operation (50MHz to 300MHz) • Very small package (8 Pin SSOP) • Low voltage operation • Power save function included Absolute Maximum Ratings • Supply voltage VCC 6 V • Operating temperature Topr –55 to +125 °C • Storage temperature Tstg –65 to +150 °C • Supply voltage range –0.3 to 6 V • Logic input voltage –0.3 to VCC + 0.3 V • Signal input voltage –0.3 to VCC + 0.3 V • Differential signal input voltage 0 to 2.5 V Operating Condition Supply voltage VCC 2.7 to 3.8 V Applications CDMA cellular/PCS phone Structure Bipolar silicon monolithic IC Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E98910A8Y CXA3221AN Block Diagram IF Input for CDMA Gain control Supply Voltage CDMA IN OUT CDMA INX OUTX GCTL VCC Bias Driver Ground GND Power Save PSV Pin Configuration GND 1 8 GCTL CDMA IN 2 7 VCC CDMA INX 3 6 OUTX PSV 4 5 OUT –2– IF Output CXA3221AN Pin Description Pin No. 1 Symbol GND Pin voltage TYP (V) Equivalent circuit Description Ground. 0 VCC 2 CDMA IN 1.15 2k 2k Differential input pins for received CDMA IF signal. 2 3 3 CDMA INX 1.15 GND VCC 4 PSV — Power save function pin. High: Active Low: Power save 4 135k GND VCC 5 OUT — 460 460 12.3k 12.3k 5 6 Differential output pins for received CDMA IF signal. Open collector output. 6 OUTX — GND 7 VCC Positive power supply. 3.0 VCC 8k 8k 200 8 GCTL — Gain control pin. 8 6k 6k GND –3– CXA3221AN Electrical Characteristics (VCC = 3.0V, Ta = 27°C) DC Characteristics Parameter Symbol Conditions Min. Typ. Max. Unit Current consumption 1 ICC1 Vpsv = 3.0V, Vgctl = 1.5V, Pin 7 7 10.2 15 Current consumption 2 ICC2 Vpsv = 0 V, Vgctl = 1.5V, Pin 7 5 18 40 Input current pin 8H IpsvH Vpsv = 3.0V Input current pin 8L IpsvL Vpsv = 0 V Input current pin 16H IgctlH Vgctl = 3.0V Input current pin 16L IgctlL Vgctl = 0.5V –1 PSV high voltage VpsH Pin 4 2.5 PSV low voltage VpsL Pin 4 1 µA –15 1 0.5 AC Characteristics Parameter mA V (VCC = 3.0V, Ta = 27°C) Symbol Conditions Min. Typ. Max. Unit Operating frequency range Fr Gain 2.4 G2.4 f = 210.38MHz, Vgctl = 2.4V 42 46 50 Gain 1.5 G1.5 Vgctl = 1.5V –7 –3 1 Gain 0.6 G0.6 Vgctl = 0.6V –59 –55 –51 Gain slope GCLIN 58 61 64 Input level 3rd order intercept point IIP3 –42 –38 Noise Figure NF Gain at Vgctl = 2.0V – Gain at Vgctl = 1.0V G = 40dB∗1 f1 = 209.38MHz, f2 = 211.38MHz Measure of 210.38MHz G = 40dB∗1 Measure of 210.38MHz 300 MHz 50 ∗1 Adjust GCTL voltage, and set the overall gain to 40dB. –4– 5 dB dB/V dBm 8 dB CXA3221AN Measurement Circuit V8 10k 1 GND GCTL 8 A8 0.01µ 1000p 2 CDMA IN 180n 3 CDMA INX ∗2 1000p A7 150n∗3 CDMA INPUT VCC 7 150n∗3 ∗1 0.01µ OUTX 6 ∗1 OUTPUT 1.6k A4 OUT 5 4 PSV ∗1 TOKO, Inc. B5FL 616DS-1135 ∗2 Coilcraft, Inc. 0805HS-181TKBC ∗3 Coilcraft, Inc. 0805HS-151TKBC Application Circuit VCC 0.01µ 1k GCTL 1 GND 8 1000p 100p 2 CDMA IN RX IF INPUT ∗ Gain Control Voltage VCC 7 0.01µ ∗ OUTX 6 3 CDMA INX ∗ 1000p 1000p RX IF OUTPUT Active Sleep OUT 5 4 PSV 1000p ∗ ∗ Must be adjusting values to result a best impedance matching between BPF filter and this IC. Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. –5– CXA3221AN Design Reference Values Single ended measurement Item Symbol (VCC = 3.0V, Ta = 27°C) Conditions Typ. Unit 1.6 kΩ 1.3 pF Input resistance Rin Input capacitance Cin Output resistance Rout 5.9 kΩ Output capacitance Cout 0.73 pF f = 210.38MHz, Vgctl = 1.5V Notes on Operation 1) This IC is a wideband amplifier with wide gain control range. The decouping capacitors between GND Pin and VCC Pin should be as close to the IC as possible. 2) The resistors connected to Pins 5 and 6 should be as close to the IC as possible. 3) This IC assumes the excellent characteristics when the differential input impedance between Pins 2 and 3 is 500Ω. Refer to the Measurement Circuit for the external element settings, etc. 4) Pay attention to handling this IC because its electrostatic discharge strength is weak. –6– CXA3221AN IIP3 Sensitivity 0 60 VCC = 3.0V VCC = 3.0V 40 –10 –20 IIP3 [dBm] Power gain [dB] 20 0 –20 –30 –40 –40 T = –40°C T = 27°C T = 85°C –60 –50 –60 –80 –80 0 0.5 1 1.5 2 2.5 T = –40°C T = 27°C T = 85°C 3 –60 –40 –20 0 Noise Figure 60 6 VCC = 3.0V VCC = 3.0V 4 Gain error [dB] 20 Noise figure [dB] 40 Gain Error from Room Temp 25 15 10 T = –40°C T = 27°C T = 85°C 5 0 –10 20 Power gain [dB] Vgctl [V] 0 10 20 2 0 –2 T = –40°C T = 85°C –4 30 40 50 –6 –80 60 Power gain [dB] –60 –40 –20 0 Power gain [dB] –7– 20 40 60 CXA3221AN Package Outline Unit: mm 8PIN SSOP (PLASTIC) + 0.2 1.25 – 0.1 ∗3.0 ± 0.1 0.1 8 5 6.4 ± 0.2 ∗4.4 ± 0.1 A 4 1 0.65 + 0.08 0.24 – 0.07 0.25 0.13 M (0.5) 0° to 10° (0.15) + 0.025 0.17 – 0.015 + 0.08 0.24 – 0.07 (0.22) 0.6 ± 0.15 0.1 ± 0.05 B DETAIL A DETAIL B NOTE: Dimension “∗” does not include mold protrusion. PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN SONY CODE SSOP-8P-L01 LEAD TREATMENT SOLDER / PALLADIUM PLATING EIAJ CODE SSOP008-P-0044 LEAD MATERIAL COPPER ALLOY PACKAGE MASS 0.04g JEDEC CODE –8–