MM54C914/MM74C914 Hex Schmitt Trigger with Extended Input Voltage General Description Features The MM54C914/MM74C914 is a monolithic CMOS Hex Schmitt trigger with special input protection scheme. This scheme allows the input voltage levels to exceed VCC or ground by at least 10V (VCC b 25V to GND a 25V), and is valuable for applications involving voltage level shifting or mismatched power supplies. The positive and negative-going threshold voltages, VT a and VTb, show low variation with respect to temperature (typ 0.0005V/§ C at VCC e 10V). And the hysteresis, VT a b VTb t 0.2 VCC is guaranteed. Y Hysteresis Y Special input protection Y Wide supply voltage range High noise immunity Low power TTL compatibility Y Y 0.45 VCC (typ.) 0.2 VCC guaranteed Extended Input Voltage Range 3V to 15V 0.7 VCC (typ.) Fan out of 2 driving 74L Connection Diagram Dual-In-Line Package Order Number MM54C914 or MM74C914 TL/F/5917 – 1 Top View Special Input Protection 8V & 25V for the diodes. TL/F/5917 – 2 C1995 National Semiconductor Corporation TL/F/5917 RRD-B30M105/Printed in U. S. A. MM54C914/MM74C914 Hex Schmitt Trigger with Extended Input Voltage February 1988 Absolute Maximum Ratings (Note 1) Storage Temperature Range (TS) Power Dissipation Dual-In-Line Small Outline Operating VCC Range If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Voltage at any Input Pin VCC b 25V to GND a 25V b 0.3V to VCC a 0.3V Voltage at any other Pin Operating Temperature Range (TA) b 55§ C to a 125§ C MM54C914 b 40§ C to a 85§ C MM74C914 b 65§ C to a 150§ C 700 mW 500 mW 3V to 15V 18V Absolute Maximum (VCC) Lead Temperature (TL) (Soldering, 10 seconds) 300§ C DC Electrical Characteristics Min/Max limits apply across temperature range unless otherwise noted Symbol Parameter Conditions Min Typ Max Units CMOS TO CMOS VT a Positive Going Threshold Voltage VCC e 5V VCC e 10V VCC e 15V 3.0 6.0 9.0 3.6 6.8 10 4.3 8.6 12.9 V V VTb Negative Going Threshold Voltage VCC e 5V VCC e 10V VCC e 15V 0.7 1.4 2.1 1.4 3.2 5 2.0 4.0 6.0 V V VT a b VTb Hysteresis VCC e 5V VCC e 10V VCC e 15V 1.0 2.0 3.0 2.2 3.6 5 3.6 7.2 10.8 V V V VOUT(1) Logical ‘‘1’’ Output Voltage VCC e 5V, IO e b10 mA VCC e 10V, IO e b10 mA 4.5 9.0 VOUT(0) Logical ‘‘0’’ Output Voltage VCC e 5V, IO e a 10 mA VCC e 10V, IO e a 10 mA IIN(1) Logical ‘‘1’’ Input Current VCC e 15V, VIN e 25V IIN(0) Logical ‘‘0’’ Input Current VCC e 15V, VIN e b10V ICC Supply Current VCC VCC VCC VCC e e e e V V 0.5 1.0 0.005 b 100 15V, VIN e b 10V/25V 5V, VIN e b 2.5V (Note 4) 10V, VIN e 5V (Note 4) 15V, VIN e 7.5V (Note 4) 5.0 b 0.005 0.05 20 200 600 V V mA mA 300 mA mA mA mA CMOS/LPTTL INTERFACE VIN(1) Logical ‘‘1’’ Input Voltage VCC e 5V VIN(0) Logical ‘‘0’’ Input Voltage VCC e 5V 4.3 VOUT(1) Logical ‘‘1’’ Output Voltage 54C, VCC e 4.5V, IO e b360 mA 74C, VCC e 4.75V, IO e b360 mA VOUT(0) Logical ‘‘0’’ Output Voltage 54C, VCC e 4.5V, IO e 360 mA 74C, VCC e 4.75V, IO e 360 mA V 0.7 2.4 2.4 V V V 0.4 0.4 V V OUTPUT DRIVE (See 54C/74C Family Characteristics Data Sheet) (Short Circuit Current) ISOURCE Output Source Current (P-Channel) VCC e 5V, VOUT e 0V, TA e 25§ C ISOURCE Output Source Current (P-Channel) VCC e 10V, VOUT e 0V, TA e 25§ C ISINK Output Sink Current (N-Channel) ISINK Output Sink Current (N-Channel) b 1.75 b 3.3 mA b 8.0 b 15 mA VCC e 5V, VOUT e VCC, TA e 25§ C 1.75 3.6 mA VCC e 10V, VOUT e VCC, TA e 25§ C 8.0 16 mA 2 AC Electrical Characteristics* TA e 25§ C, CL e 50 pF, unless otherwise specified Symbol Parameter Typ Max Units VCC e 5V Conditions 220 400 ns VCC e 10V 80 200 Input Capacitance Any Input (Note 2) 5 pF Power Dissipation Capacitance (Note 3) Per Gate 20 pF tPHL, tPLH Propagation Delay from Input to Output CIN CPD Min ns *AC Parameters are guaranteed by DC correlated testing. Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’, they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation. Note 2: Capacitance is guaranteed by periodic testing. Note 3: CPD determines the no load AC power consumption of any CMOS device. For complete explanation see 54C/74C Family Characteristics Application Note, AN-90. Note 4: Only one input is at (/2 VCC, the others are either at VCC or GND. Typical Performance Characteristics Typical Transfer Characteristics Guaranteed Trip Point Range TL/F/5917 – 4 TL/F/5917 – 5 Typical Application TL/F/5917 – 3 Note: VCC1 e VCC2 GND1 e GND2 TL/F/5917 – 6 3 MM54C914/MM74C914 Hex Schmitt Trigger with Extended Input Voltage Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number MM54C914J or MM74C914J NS Package Number J14A Molded Dual-In-Line Package (N) Order Number MM54C914N or MM74C914N NS Package Number N14A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. 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