bq771800, bq771801 bq771802, bq771803 www.ti.com SLUSAX1 – DECEMBER 2012 Overvoltage Protection for 2-Series to 5-Series Cell Li-Ion Batteries with Internal Delay Timer Check for Samples: bq771800, bq771801, bq771802, bq771803 FEATURES • 1 • • • • • • 2-, 3-, 4-, and 5-Series Cell Overvoltage Protection Internal Delay Timer Fixed OVP Threshold High-Accuracy Overvoltage Protection: ± 10 mV Low Power Consumption ICC ≈ 1 µA (VCELL(ALL) < VPROTECT) Low Leakage Current Per Cell Input < 100 nA Small Package Footprint – 8-pin QFN (3 mm × 4 mm) APPLICATIONS • Protection in Li-Ion Battery Packs in: – Power Tools – UPS Battery Backup – Light Electric Vehicles (eBike, eScooter, Pedal Assist Bicycles) DESCRIPTION The bq7718xy family of products is an overvoltage monitor and protector for Li-Ion battery pack systems. Each cell is monitored independently for an overvoltage condition. In the bq7718xy device, an internal delay timer is initiated upon detection of an overvoltage condition on any cell. Upon expiration of the delay timer, the output is triggered into its active state (either high or low depending on the configuration). For quicker production-line testing, the bq7718xy device provides a Customer Test Mode with greatly reduced delay time. VDD 1 8 OUT V5 2 7 VSS V4 3 6 V1 V3 4 5 V2 Figure 1. bq771800 Pinout 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2012, Texas Instruments Incorporated bq771800, bq771801 bq771802, bq771803 SLUSAX1 – DECEMBER 2012 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION TA -40°C to 110°C (1) OVP (V) OV Hysteresis (V) Output Delay Output Drive Tape and Reel (Large) Tape and Reel (Small) bq771800 4.300 0.300 4s CMOS Active High bq771800DPJR bq771800DPJT bq771801 4.275 0.050 3s NCH Active Low, Open Drain bq771801DPJR bq771801DPJT 4.225 0.300 1s NCH Active Low, Open Drain bq771802DPJR bq771802DPJT bq771803 4.275 0.050 1s NCH Active Low, Open Drain bq771803DPJR bq771803DPJT bq7718xy (1) 3.850–4.650 0–0.300 1s NCH, Active Low, Open Drain bq7718xyDPJR bq7718xyDPJT Part Number bq771802 Package Package Designator 8-Pin QFN DPJ Future option, contact TI. THERMAL INFORMATION bq7718xy THERMAL METRIC (1) 8 PINS θJA Junction-to-ambient thermal resistance 56.6 θJC(top) Junction-to-case(top) thermal resistance 56.4 θJB Junction-to-board thermal resistance 30.6 ψJT Junction-to-top characterization parameter 1.0 ψJB Junction-to-board characterization parameter 37.8 θJC(bottom) Junction-to-case(bottom) thermal resistance 11.3 (1) 2 UNITS °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: bq771800 bq771801 bq771802 bq771803 bq771800, bq771801 bq771802, bq771803 www.ti.com SLUSAX1 – DECEMBER 2012 PIN FUNCTIONS bq7718xy Pin Name Type I/O 1 VDD P Power supply Description 2 V5 I Sense input for positive voltage of the fifth cell from the bottom of the stack 3 V4 I Sense input for positive voltage of the fourth cell from the bottom of the stack 4 V3 I Sense input for positive voltage of the third cell from the bottom of the stack 5 V2 I Sense input for positive voltage of the second cell from the bottom of the stack 6 V1 I Sense input for positive voltage of the lowest cell in the stack 7 VSS P Electrically connected to IC ground and negative terminal of the lowest cell in the stack 8 OUT O Output drive for overvoltage fault signal PIN DETAILS In the bq7718xy device, each cell is monitored independently. Overvoltage is detected by comparing the actual cell voltage to a protection voltage reference, VOV. If any cell voltage exceeds the programmed OV value, a timer circuit is activated. When the timer expires, the OUT terminal goes from inactive to active state. Cell Voltage (V) (V5–V4, V4–V3, V3–V2, V2–V1, V1–VSS) For NCH Open Drain Active Low configurations, the OUT pin pulls down to VSS when active (OV present) and is high impedance when inactive (no OV). VOV VOV –VHYS tDELAY OUT (V) Figure 2. Timing for Overvoltage Sensing Sense Positive Input for Vx This is an input to sense each single battery cell voltage. A series resistor and a capacitor across the cell for each input is required for noise filtering and stable voltage monitoring. Output Drive, OUT This terminal serves as the fault signal output, and may be ordered in either active HIGH or LOW options. Supply Input, VDD This terminal is the unregulated input power source for the IC. A series resistor is connected to limit the current, and a capacitor is connected to ground for noise filtering. Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: bq771800 bq771801 bq771802 bq771803 3 bq771800, bq771801 bq771802, bq771803 SLUSAX1 – DECEMBER 2012 www.ti.com FUNCTIONAL BLOCK DIAGRAM RVD PACK+ C VD VDD RIN V5 CIN RIN V4 V3 CIN RIN V2 Sensing Circuit CIN RIN REG INT_EN VOV Delay Timer OUT CIN RIN V1 OSC CIN VSS PACK – ABSOLUTE MAXIMUM RATINGS Over operating free-air temperature range (unless otherwise noted) (1) PARAMETER CONDITION VALUE/UNIT VDD–VSS –0.3 to 30 V V5–VSS or V4–VSS or V3–VSS or V2–VSS or V1–VSS –0.3 to 30 V Supply voltage range Input voltage range Output voltage range OUT–VSS Continuous total power dissipation, PTOT –0.3 to 30 V See package dissipation rating. Functional temperature –40 to 110°C Storage temperature range, TSTG –65 to 150°C Lead temperature (soldering, 10 s), TSOLDER (1) 300°C Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum–rated conditions for extended periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS Over operating free-air temperature range (unless otherwise noted) PARAMETER MIN MAX UNIT 3 25 V 0 5 V –40 110 °C Supply voltage, VDD (1) Input voltage range V5–V4 or V4–V3 or V3–V2 or V2–V1 or V1–VSS Operating ambient temperature range, TA (1) 4 NOM See APPLICATION SCHEMATIC. Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: bq771800 bq771801 bq771802 bq771803 bq771800, bq771801 bq771802, bq771803 www.ti.com SLUSAX1 – DECEMBER 2012 DC CHARACTERISTICS Typical values stated where TA = 25°C and VDD = 18 V, MIN/MAX values stated where TA = –40°C to 110°C and VDD = 3 V to 25 V (unless otherwise noted). SYMBOL PARAMETER CONDITION MIN TYP MAX UNIT Voltage Protection Threshold VCx VOV V(PROTECT) Overvoltage Detection bq771800 4.300 V bq771801, bq771803 4.275 V bq771802 4.225 bq771800 VHYS VOA VOADRIFT OV Detection Hysteresis OV Detection Accuracy OV Detection Accuracy Across Temperature 250 300 V 400 mV bq771801, bq771803 0 50 100 V bq771802 250 300 400 mV TA = 25°C –10 10 mV TA = –40°C –40 44 mV TA = 0°C –20 20 mV TA = 60°C –24 24 mV TA = 110°C –54 54 mV 2 µA 0.1 µA Supply and Leakage Current ICC Supply Current (V5–V4) = (V4–V3) = (V3–V2) = (V2–V1) = (V1–VSS) = 4.0 V (See Figure 13.) IIN Input Current at Vx Pins (V5–V4) = (V4–V3) = (V3–V2) = (V2–V1) = (V1–VSS) = 4.0 V (See Figure 13.) 1 –0.1 Output Drive OUT, CMOS Active HIGH Versions Only (V5–V4), (V4–V3), (V3–V2), (V2–V1), or (V1–VSS) > VOV, VDD = 18 V, IOH = 100 µA VOUT1 Output Drive Voltage, Active High 6 If three of four cells are short circuited and only one cell remains powered and > VOV, VDD = Vx (cell voltage), IOH = 100 µA VDD – 0.3 (V5–V4), (V4–V3), (V3–V2), (V2–V1), and (V1–VSS) < VOV, VDD = 18 V, IOL = 100 µA measured into pin IOUTH1 OUT Source Current (during OV) (V5–V4), (V4–V3), (V3–V2), (V2–V1), or (V1–VSS) > VOV, VDD = 18 V. OUT = 0 V. Measured out of OUT pin IOUTL1 OUT Sink Current (no OV) (V5–V4), (V4–V3), (V3–V2), (V2–V1), and (V1–VSS) < VOV, VDD = 18 V, OUT = VDD. Measured into OUT pin V 250 0.5 V 400 mV 4.5 mA 14 mA 400 mV 14 mA 100 nA 4.8 s Output Drive OUT, NCH Open Drain Active LOW Versions Only VOUT2 (V5–V4), (V4–V3), (V3–V2), (V2–V1), or Output Drive Voltage, Active Low (V1–VSS) > VOV, VDD = 18 V, IOL = 100 µA measured into OUT pin IOUTH2 OUT Sink Current (during OV) (V5–V4), (V4–V3), (V3–V2), (V2–V1), or (V1–VSS) > VOV, VDD = 18 V. OUT = VDD. Measured into OUT pin IOUTL2 OUT Source Current (no OV) (V5–V4), (V4–V3), (V3–V2), (V2–V1), and (V1–VSS) < VOV, VDD = 18 V. OUT = VDD. Measured out of OUT pin 250 0.5 Delay Timer bq771800 tDELAY XCTMDELAY OV Delay Time Fault Detection Delay Time during Customer Test Mode Copyright © 2012, Texas Instruments Incorporated 3.2 4 bq771801 2.4 3 3.6 s bq771802, bq771803 0.8 1 1.2 s Preview option only. Contact TI. 4.4 5.5 6.6 s See . 15 Submit Documentation Feedback Product Folder Links: bq771800 bq771801 bq771802 bq771803 ms 5 bq771800, bq771801 bq771802, bq771803 SLUSAX1 – DECEMBER 2012 www.ti.com TYPICAL CHARACTERISTICS 0.316 4.40 Mean Min Max 4.39 4.38 0.315 4.36 VHYS (V) VOUT (V) 4.37 4.35 4.34 4.33 0.314 0.313 4.32 4.31 4.30 −50 −25 0 25 50 Temperature (°C) 75 100 125 0.312 −50 −25 0 G001 Figure 3. Overvoltage Threshold (OVT) vs. Temperature 25 50 Temperature (°C) 75 100 125 G002 Figure 4. Hysteresis VHYS vs. Temperature 1.8 1.6 1.5 1.6 1.4 1.4 1.2 ICELL (µA) IDD (µA) 1.3 1.1 1.0 1.2 1.0 0.9 0.8 0.8 0.7 0.6 −50 −25 0 25 50 Temperature (°C) 75 100 125 0.6 −50 Figure 5. IDD Current Consumption vs. Temperature at VDD = 16 V −3.68 8 −3.70 7 25 50 Temperature (°C) 75 100 125 G004 6 −3.74 −3.76 VOUT (V) IOUT (mA) 0 Figure 6. ICELL vs. Temperature at VCELL= 9.2 V −3.72 −3.78 −3.80 −3.82 5 4 3 2 −3.84 1 −3.86 −3.88 −50 −25 0 25 50 Temperature (°C) 75 100 Figure 7. Output Current IOUT vs. Temperature 6 −25 G003 Submit Documentation Feedback 125 0 0 5 10 G005 15 VDD (V) 20 25 30 G006 Figure 8. VOUT vs. VDD Copyright © 2012, Texas Instruments Incorporated Product Folder Links: bq771800 bq771801 bq771802 bq771803 bq771800, bq771801 bq771802, bq771803 www.ti.com SLUSAX1 – DECEMBER 2012 APPLICATION INFORMATION CVD VDD OUT V5 VSS V4 V1 V3 V2 RVD RIN Cell5 RIN Cell4 CIN CIN RIN Cell3 CIN RIN Cell2 RIN Cell1 CIN CIN Figure 9. Application Configuration NOTE In the case of an Open Drain Active Low configuration, an external pull-up resistor is required on the OUT terminal. Changes to the ranges stated in Table 1 will impact the accuracy of the cell measurements. Changes to the ranges stated in Table 1 will impact the accuracy of the cell measurements. Figure 9 shows each external component. Table 1. Parameters PARAMETER EXTERNAL COMPONENT MIN NOM MAX Voltage monitor filter resistance RIN 900 1000 1100 UNIT Ω Voltage monitor filter capacitance CIN 0.01 0.1 µF Supply voltage filter resistance RVD 100 Supply voltage filter capacitance CVD 1K 0.1 CD external delay capacitance 0.1 OUT Open drain version pull-up resistance to PACK+ 100 Ω µF 1 µF kΩ NOTE The device is calibrated using an RIN value = 1 kΩ. Using a value other than this recommended value changes the accuracy of the cell voltage measurements and VOV trigger level. Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: bq771800 bq771801 bq771802 bq771803 7 bq771800, bq771801 bq771802, bq771803 SLUSAX1 – DECEMBER 2012 www.ti.com APPLICATION SCHEMATIC C VD C VD RVD Cell4 R IN VDD OUT VSS V5 VSS V4 V1 V4 V1 V3 V2 V3 V2 VDD OUT V5 R VD C IN RIN R IN Cell3 R IN Cell2 Cell1 R IN C IN Cell3 C IN Cell2 C IN Cell1 CIN RIN Figure 10. 4-Series Cell Configuration RIN CIN CIN Figure 11. 3-Series Cell Configuration with Fixed Delay C VD R VD Cell2 Cell1 R IN R IN VDD OUT V5 VSS V4 V1 V5 V2 CIN CIN Figure 12. 2-Series Cell Configuration with Internal Fixed Delay NOTE In these application examples, an external pull-up resistor is required on the OUT terminal to configure for an Open Drain Active Low operation. 8 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: bq771800 bq771801 bq771802 bq771803 bq771800, bq771801 bq771802, bq771803 www.ti.com SLUSAX1 – DECEMBER 2012 CUSTOMER TEST MODE Customer Test Mode (CTM) helps to reduce test time for checking the overvoltage delay timer parameter once the circuit is implemented in the battery pack. To enter CTM, VDD should be set to at least 10 V higher than V5 (see Figure 13). The delay timer is greater than 10 ms, but considerably shorter than the timer delay in normal operation. To exit Customer Test Mode, remove the VDD to V5 voltage differential of 10 V so that the decrease in this value automatically causes an exit. CAUTION Avoid exceeding any Absolute Maximum Voltages on any pins when placing the part into Customer Test Mode. Also avoid exceeding Absolute Maximum Voltages for the individual cell voltages (V5–V4), (V4–V3), (V4–V3), (V3–V2), (V2–V1), and (V1–VSS). Stressing the pins beyond the rated limits may cause permanent damage to the device. Figure 13 shows the timing for the Customer Test Mode. Cell Voltage (V) (V5–V4, V4–V3, V3–V2, V2–V1, V1–VSS) 10 V VOV VOV – VHYS > 10 ms OUT (V) Figure 13. Timing for Customer Test Mode Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: bq771800 bq771801 bq771802 bq771803 9 bq771800, bq771801 bq771802, bq771803 SLUSAX1 – DECEMBER 2012 www.ti.com Figure 14 shows the measurement for current consumption for the product for both VDD and Vx. VDD OUT V5 VSS I IN V4 V1 I IN V3 V2 ICC I IN Cell5 Cell4 Cell3 I IN Cell2 IIN Cell1 Figure 14. Configuration for IC Current Consumption Test 10 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: bq771800 bq771801 bq771802 bq771803 PACKAGE OPTION ADDENDUM www.ti.com 11-Jan-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Qty Drawing Eco Plan Lead/Ball Finish (2) MSL Peak Temp Samples (3) (Requires Login) BQ771800DPJR ACTIVE WSON DPJ 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR BQ771800DPJT ACTIVE WSON DPJ 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR BQ771801DPJR ACTIVE WSON DPJ 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR BQ771801DPJT ACTIVE WSON DPJ 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR BQ771802DPJR ACTIVE WSON DPJ 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR BQ771802DPJT ACTIVE WSON DPJ 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR BQ771803DPJR ACTIVE WSON DPJ 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR BQ771803DPJT ACTIVE WSON DPJ 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 11-Jan-2013 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 11-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing BQ771800DPJR WSON DPJ 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3000 330.0 12.4 3.3 4.3 1.1 8.0 12.0 Q2 BQ771800DPJT WSON DPJ 8 250 180.0 12.4 3.3 4.3 1.1 8.0 12.0 Q2 BQ771801DPJR WSON DPJ 8 3000 330.0 12.4 3.3 4.3 1.1 8.0 12.0 Q2 BQ771801DPJT WSON DPJ 8 250 180.0 12.4 3.3 4.3 1.1 8.0 12.0 Q2 BQ771802DPJR WSON DPJ 8 3000 330.0 12.4 3.3 4.3 1.1 8.0 12.0 Q2 BQ771802DPJT WSON DPJ 8 250 180.0 12.4 3.3 4.3 1.1 8.0 12.0 Q2 BQ771803DPJR WSON DPJ 8 3000 330.0 12.4 3.3 4.3 1.1 8.0 12.0 Q2 BQ771803DPJT WSON DPJ 8 250 180.0 12.4 3.3 4.3 1.1 8.0 12.0 Q2 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 11-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) BQ771800DPJR WSON DPJ 8 3000 367.0 367.0 35.0 BQ771800DPJT WSON DPJ 8 250 210.0 185.0 35.0 BQ771801DPJR WSON DPJ 8 3000 367.0 367.0 35.0 BQ771801DPJT WSON DPJ 8 250 210.0 185.0 35.0 BQ771802DPJR WSON DPJ 8 3000 367.0 367.0 35.0 BQ771802DPJT WSON DPJ 8 250 210.0 185.0 35.0 BQ771803DPJR WSON DPJ 8 3000 367.0 367.0 35.0 BQ771803DPJT WSON DPJ 8 250 210.0 185.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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