NL37WZ14 Triple Schmitt-Trigger Inverter The NL37WZ14 is a high performance triple inverter with Schmitt−Trigger inputs operating from a 1.65 to 5.5 V supply. Pin configuration and function are the same as the NL37WZ04, but the inputs have hysteresis, and with its Schmitt trigger function, the NL37WZ14 can be used as a line receiver which will receive slow input signals. The NL37WZ14 is capable of transforming slowly changing input signals into sharply defined, jitter−free output signals. In addition, it has a greater noise margin than conventional inverters. The NL37WZ14 has hysteresis between the positive−going and the negative−going input thresholds (typically 1.0 V) which is determined internally by transistor ratios and is essentially insensitive to temperature and supply voltage variations. Features • Designed for 1.65 V to 5.5 V VCC Operation • Over Voltage Tolerant Inputs and Outputs • LVTTL Compatible − Interface Capability with 5 V TTL Logic • • • • • • • with VCC = 3 V LVCMOS Compatible 24 mA Balanced Output Sink and Source Capability Near Zero Static Supply Current Substantially Reduces System Power Requirements Current Drive Capability is 24 mA at the Outputs Chip Complexity: FET = 94 These Devices are Pb−Free and are RoHS Compliant NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable IN A1 1 8 VCC OUT Y3 2 7 OUT Y1 IN A2 3 http://onsemi.com MARKING DIAGRAM 8 US8 US SUFFIX CASE 493 8 1 LA M G G 1 LA M G = Device Code = Date Code* = Pb−Free Package (Note: Microdot may be in either location) *Date Code orientation may vary depending upon manufacturing location. PIN ASSIGNMENT 1 IN A1 2 OUT Y3 3 IN A2 4 GND 5 OUT Y2 6 IN A3 7 OUT Y1 8 VCC IN A3 6 FUNCTION TABLE GND 4 5 A Input OUT Y2 L H Y Output H L Figure 1. Pinout (Top View) 1 IN A1 OUT Y1 IN A2 1 OUT Y2 IN A3 1 OUT Y3 ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. Figure 2. Logic Symbol © Semiconductor Components Industries, LLC, 2012 April, 2012 − Rev. 8 1 Publication Order Number: NL37WZ14/D NL37WZ14 MAXIMUM RATINGS Symbol Value Unit DC Supply Voltage *0.5 to )7.0 V VI DC Input Voltage *0.5 to )7.0 V VO DC Output Voltage *0.5 to )7.0 V IIK DC Input Diode Current VI < GND *50 mA IOK DC Output Diode Current VO < GND *50 mA IO DC Output Sink Current $50 mA ICC DC Supply Current per Supply Pin $100 mA IGND DC Ground Current per Ground Pin $100 mA TSTG Storage Temperature Range *65 to )150 _C 260 _C VCC Parameter TL Lead Temperature, 1 mm from Case for 10 Seconds TJ Junction Temperature under Bias )150 _C qJA Thermal Resistance (Note 1) 250 _C/W PD Power Dissipation in Still Air at 85_C 250 mW MSL Moisture Sensitivity FR Flammability Rating VESD Level 1 Oxygen Index: 28 to 34 ESD Withstand Voltage UL 94 V−0 @ 0.125 in Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) > 2000 > 200 N/A V Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow. 2. Tested to EIA/JESD22−A114−A. 3. Tested to EIA/JESD22−A115−A. 4. Tested to JESD22−C101−A. RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Supply Voltage VI Input Voltage VO Output Voltage TA Operating Free−Air Temperature Dt/DV Input Transition Rise or Fall Rate Operating Data Retention Only (Note 5) (HIGH or LOW State) Min Max Unit 2.3 1.5 5.5 5.5 V 0 5.5 V 0 5.5 V *55 )125 _C 0 0 0 No Limit No Limit No Limit ns/V VCC = 2.5 V $0.2 V VCC = 3.0 V $0.3 V VCC = 5.0 V $0.5 V 5. Unused inputs may not be left open. All inputs must be tied to a high− or low−logic input voltage level. DEVICE ORDERING INFORMATION Package Shipping† NL37WZ14USG US8 (Pb−Free) 3000 / Tape & Reel NLV37WZ14USG* US8 (Pb−Free) 3000 / Tape & Reel Device Order Number †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable. http://onsemi.com 2 NL37WZ14 DC CHARACTERISTICS VCC Symbol VT) VT* VH VOH VOL Parameter Condition (V) Min Typ Max Min Max Unit 1.0 1.5 1.8 1.0 1.8 V 2.7 1.2 1.7 2.0 1.2 2.0 3.0 1.3 1.9 2.2 1.3 2.2 4.5 1.9 2.7 3.1 1.9 3.1 5.5 2.2 3.3 3.6 2.2 3.6 2.3 0.4 0.75 1.15 0.4 1.15 2.7 0.5 0.87 1.4 0.5 1.4 3.0 0.6 1.0 1.5 0.6 1.5 4.5 1.0 1.5 2.0 1.0 2.0 5.5 1.2 1.9 2.3 1.2 2.3 2.3 0.25 0.75 1.1 1.25 1.1 2.7 0.3 0.83 1.15 0.3 1.15 3.0 0.4 0.93 1.2 0.4 1.2 4.5 0.6 1.2 1.5 0.6 1.5 5.5 0.7 1.4 1.7 0.7 1.7 IOH = −100 mA 1.65 to 5.5 VCC *0.1 VCC VCC *0.1 IOH = *3 mA 1.65 1.29 1.52 1.29 IOH = *8 mA 2.3 1.9 2.1 1.9 IOH = *12 mA 2.7 2.2 2.4 2.2 IOH = *16 mA 3.0 2.4 2.7 2.4 IOH = *24 mA 3.0 2.3 2.5 2.3 IOH = *32 mA 4.5 3.8 4.0 Negative Input Threshold Voltage Input Hysteresis Voltage Low−Level Output Voltage VIN = VIH or VIL 1.65 to 5.5 IOL = 100 mA 0.1 0.08 0.24 0.24 IOL = 8 mA 2.3 0.2 0.3 0.3 IOL = 12 mA 2.7 0.22 0.4 0.4 IOL = 16 mA 3.0 0.28 0.4 0.4 IOL = 24 mA 3.0 0.38 0.55 0.55 4.5 0.42 VIN = 5.5 V or GND IOFF Power Off Leakage Current VIN = 5.5 V or VOUT = 5.5 V ICC Quiescent Supply Current VIN = 5.5 V or GND V 3.8 0.1 1.65 Input Leakage Current V V IOL = 4 mA IOL = 32 mA IIN *55_CvTAv125_C 2.3 Positive Input Threshold Voltage High−Level Output Voltage VIN = VIH or VIL TA = 25_C V 0.55 0.55 0 to 5.5 $0.1 $1.0 mA 0 1 10 mA 5.5 1 10 mA AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns) VCC TA = 25_C *55_CvTAv125_C ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Symbol tPLH tPHL Parameter Condition Propagation Delay Input A to Y (Figure 3 and 4) (V) Min Typ Max Min Max Unit RL = 1 MW, CL = 15 pF 2.5 $ 0.2 1.8 4.3 7.4 1.8 8.1 ns RL = 1 MW, CL = 15 pF 3.3 $ 0.3 1.5 3.3 5.0 1.5 5.5 1.8 4.0 6.0 1.8 6.6 1.0 2.7 4.1 1.0 4.5 1.2 3.2 4.9 1.2 5.4 RL = 500 W, CL = 50 pF 5.0 $ 0.5 RL = 1 MW, CL = 15 pF RL = 500 W, CL = 50 pF CAPACITIVE CHARACTERISTICS Symbol Parameter Condition Typical Unit CIN Input Capacitance VCC = 5.5 V, VI = 0 V or VCC 2.5 pF CPD Power Dissipation Capacitance p p (Note 6) 10 MHz, VCC = 3.3 V, VI = 0 V or VCC 11 pF 10 MHz, VCC = 5.0 V, VI = 0 V or VCC 12.5 6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin ) ICC. CPD is used to determine the no−load dynamic power consumption; PD = CPD VCC2 fin ) ICC VCC. http://onsemi.com 3 NL37WZ14 tf = 3 ns tr = 3 ns 90% INPUT A and B 50% VCC 90% INPUT RL 10% 10% tPHL tPLH *CL includes all probe and jig capacitances. A 1−MHz square input wave is recommended for propagation delay tests. 50% 50% CL* GND VOH OUTPUT Y OUTPUT 50% VOL VT , TYPICAL INPUT THRESHOLD VOLTAGE (VOLTS) Figure 3. Switching Waveforms Figure 4. Test Circuit 4 3 (VT)) 2 VHtyp (VT*) 1 2 2.5 3.5 3 VCC, POWER SUPPLY VOLTAGE (VOLTS) VHtyp = (VT) typ) − (VT* typ) 3.6 Figure 5. Typical Input Threshold, VT), VT* versus Power Supply Voltage VH Vin VCC VCC VH VT) VT* VT) VT* Vin GND GND VOH VOH Vout Vout VOL VOL (a) A Schmitt−Trigger Squares Up Inputs With Slow Rise and Fall Times (b) A Schmitt−Trigger Offers Maximum Noise Immunity Figure 6. Typical Schmitt−Trigger Applications http://onsemi.com 4 NL37WZ14 PACKAGE DIMENSIONS US8 US SUFFIX CASE 493−02 ISSUE B −X− A 8 −Y− 5 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION “A” DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR GATE BURR. MOLD FLASH. PROTRUSION AND GATE BURR SHALL NOT EXCEED 0.140 MM (0.0055”) PER SIDE. 4. DIMENSION “B” DOES NOT INCLUDE INTER−LEAD FLASH OR PROTRUSION. INTER−LEAD FLASH AND PROTRUSION SHALL NOT E3XCEED 0.140 (0.0055”) PER SIDE. 5. LEAD FINISH IS SOLDER PLATING WITH THICKNESS OF 0.0076−0.0203 MM. (300−800 “). 6. ALL TOLERANCE UNLESS OTHERWISE SPECIFIED ±0.0508 (0.0002 “). J DETAIL E B L 1 4 R G P S U C −T− SEATING PLANE D 0.10 (0.004) M H 0.10 (0.004) T K N R 0.10 TYP T X Y V M F DETAIL E SOLDERING FOOTPRINT* DIM A B C D F G H J K L M N P R S U V MILLIMETERS MIN MAX 1.90 2.10 2.20 2.40 0.60 0.90 0.17 0.25 0.20 0.35 0.50 BSC 0.40 REF 0.10 0.18 0.00 0.10 3.00 3.20 0_ 6_ 5_ 10 _ 0.23 0.34 0.23 0.33 0.37 0.47 0.60 0.80 0.12 BSC INCHES MIN MAX 0.075 0.083 0.087 0.094 0.024 0.035 0.007 0.010 0.008 0.014 0.020 BSC 0.016 REF 0.004 0.007 0.000 0.004 0.118 0.126 0_ 6_ 5_ 10 _ 0.010 0.013 0.009 0.013 0.015 0.019 0.024 0.031 0.005 BSC 3.8 0.15 0.50 0.0197 1.8 0.07 0.30 0.012 1.0 0.0394 SCALE 8:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 http://onsemi.com 5 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NL37WZ14/D