ALD ALD1102DA Dual p-channel matched mosfet pair Datasheet

ADVANCED
LINEAR
DEVICES, INC.
ALD1102A/ALD1102B
ALD1102
DUAL P-CHANNEL MATCHED MOSFET PAIR
GENERAL DESCRIPTION
APPLICATIONS
The ALD1102 is a monolithic dual P-channel matched transistor pair
intended for a broad range of analog applications. These enhancementmode transistors are manufactured with Advanced Linear Devices' enhanced ACMOS silicon gate CMOS process.
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The ALD1102 offers high input impedance and negative current temperature coefficient. The transistor pair is matched for minimum offset voltage
and differential thermal response, and it is designed for switching and
amplifying applications in +2V to +12V systems where low input bias
current, low input capacitance and fast switching speed are desired. Since
these are MOSFET devices, they feature very large (almost infinite)
current gain in a low frequency, or near DC, operating environment. When
used with an ALD1101, a dual CMOS analog switch can be constructed.
In addition, the ALD1102 is intended as a building block for differential
amplifier input stages, transmission gates, and multiplexer applications.
The ALD1102 is suitable for use in precision applications which require
very high current gain, beta, such as current mirrors and current sources.
The high input impedance and the high DC current gain of the Field Effect
Transistors result in extremely low current loss through the control gate.
The DC current gain is limited by the gate input leakage current, which is
specified at 50pA at room temperature. For example, DC beta of the device
at a drain current of 5mA at 25°C is = 5mA/50pA = 100,000,000.
Precision current mirrors
Precision current sources
Analog switches
Choppers
Differential amplifier input stage
Voltage comparator
Data converters
Sample and Hold
Analog inverter
PIN CONFIGURATION
SOURCE 1
1
8
SUBSTRATE
GATE 1
2
7
SOURCE 2
DRAIN 1
3
6
GATE 2
NC
4
5
DRAIN 2
TOP VIEW
SAL, PAL, DA PACKAGES
FEATURES
• Low threshold voltage of 0.7V
• Low input capacitance
• Low Vos grades -- 2mV, 5mV, 10mV
• High input impedance -- 1012Ω typical
• Low input and output leakage currents
• Negative current (IDS) temperature coefficient
• Enhancement-mode (normally off)
• DC current gain 109
• RoHS compliant
* NC pin is internally connected. Do not connect externally.
BLOCK DIAGRAM
GATE 1 (2)
ORDERING INFORMATION (“L” suffix denotes lead-free (RoHS))
0°C to +70°C
Operating Temperature Range
0°C to +70°C
-55°C to +125°C
SOURCE 1 (1)
DRAIN 1 (3)
SUBSTRATE (8)
8-Pin
Small Outline
Package (SOIC)
8-Pin
Plastic Dip
Package
ALD1102ASAL
ALD1102BSAL
ALD1102SAL
ALD1102APAL
ALD1102BPAL
ALD1102PAL
8-Pin
CERDIP
Package
DRAIN 2 (5)
SOURCE 2 (7)
GATE 2 (6)
ALD1102DA
* Contact factory for leaded (non-RoHS) or high temperature versions.
Rev 2.0 ©2012 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, CA 94089-1706 Tel: (408) 747-1155 Fax: (408) 747-1286
www.aldinc.com
ABSOLUTE MAXIMUM RATINGS
Drain-source voltage, VDS
Gate-source voltage, VGS
Power dissipation
Operating temperature range
SAL, PALpackages
DA package
Storage temperature range
Lead temperature, 10 seconds
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.
-10.6V
-10.6V
500mW
0°C to +70°C
-55°C to +125°C
-65°C to +150°C
+260°C
OPERATING ELECTRICAL CHARACTERISTICS
TA = 25°C unless otherwise specified
Parameter
Symbol
Gate Threshold
Voltage
VT
Offset Voltage
VGS1 - VGS2
Min
-0.4
Max
Min
-0.7
-1.2
-0.4
VOS
IDS (ON)
Transconductance Gfs
1102B
Typ Max
-0.7
2
Gate Threshold
TCVT
Temperature Drift
On Drain Current
1102A
Typ
-1.2
Min
1102
Typ
Max
-0.4
-0.7
-1.2
5
-1.3
10
-1.3
Unit
Test
Conditions
V
IDS = -10µA VGS = VDS
mV
IDS = -100µA VGS = VDS
-1.3
mV/°C
mA
VGS = VDS = -5V
mmho
VDS = -5V IDS= -10mA
-8
-16
-8
-16
-8
-16
2
4
2
4
2
4
Mismatch
∆Gfs
0.5
0.5
0.5
%
Output
Conductance
GOS
500
500
500
µmho
VDS = -5V IDS = -10mA
Drain Source
ON Resistance
RDS(ON)
180
Ω
VDS = -0.1V VGS = -5V
Drain Source
ON Resistance
Mismatch
∆RDS(ON)
0.5
%
VDS = -0.1V VGS = -5V
Drain Source
Breakdown
Voltage
BVDSS
V
IDS = -10µA VGS =0V
Off Drain Current
IDS(OFF)
Gate Leakage
Current
Input
Capacitance
270
180
270
180
0.5
-12
270
0.5
-12
-12
0.1
4
4
0.1
4
4
0.1
4
4
nA
µA
VDS =-12V VGS = 0V
TA = 125°C
IGSS
1
50
10
1
50
10
1
50
10
pA
nA
VDS =0V VGS =-12V
TA = 125°C
CISS
6
10
6
10
6
10
pF
ALD1102A/ALD1102B/ALD1102
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TYPICAL PERFORMANCE CHARACTERISTICS
OUTPUT CHARACTERISTICS
LOW VOLTAGE OUTPUT
CHARACTERISTICS
-80
VGS = -12V
VBS = 0V
TA = 25°C
-60
-10V
-8V
-40
-6V
-20
-4V
-4V
-2V
0
-2
-2V
0
-2
-4
-6
-8
-10
-4
-320
-12
-160
320
160
0
DRAIN - SOURCE VOLTAGE (V)
DRAIN -SOURCE VOLTAGE (mV)
FORWARD TRANSCONDUCTANCE
vs. DRAIN - SOURCE VOLTAGE
TRANSFER CHARACTERISTIC
WITH SUBSTRATE BIAS
-20
10000
IDS = -5mA
VBS = 0V
f = 1KHz
5000
2000
1000
TA = +125°C
TA = +25°C
500
VBS = 0V
DRAIN-SOURCE CURRENT
(µA)
FORWARD TRANSCONDUCTANCE
(µmho)
-6V
2
0
IDS = -1mA
200
4V
6V
8V
10V
12V
2V
-15
-10
-5
VGS = VDS
TA = 25°C
0
100
0
-2
-4
-6
-8
-10
0
-12
-0.8
OFF - DRAIN SOURCE CURRENT
(A)
10000
VDS = 0.4V
VBS = 0V
TA = +125°C
100
TA = +25°C
10
0
-2
-4
-6
-8
-3.2
-4.0
-10
-10X10-6
VDS = -12V
VGS = VBS = 0V
-10X10-9
-10X10-12
-12
GATE - SOURCE VOLTAGE (V)
ALD1102A/ALD1102B/ALD1102
-2.4
OFF DRAIN - CURRENT vs.
TEMPERATURE
RDS (ON) vs. GATE - SOURCE VOLTAGE
1000
-1.6
GATE - SOURCE VOLTAGE (V)
DRAIN - SOURCE VOLTAGE (V)
DRAIN - SOURCE ON RESISTANCE
(Ω)
VGS = -12V
VBS = 0V
TA = 25°C
DRAIN-SOURCE CURRENT
(mA)
DRAIN - SOURCE CURRENT
(mA)
4
-50
-25
0
+25
+50
+75
+100 +125
TEMPERATURE (°C)
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SOIC-8 PACKAGE DRAWING
8 Pin Plastic SOIC Package
E
Millimeters
Dim
S (45°)
D
A
Min
1.35
Max
1.75
Min
0.053
Max
0.069
A1
0.10
0.25
0.004
0.010
b
0.35
0.45
0.014
0.018
C
0.18
0.25
0.007
0.010
D-8
4.69
5.00
0.185
0.196
E
3.50
4.05
0.140
0.160
1.27 BSC
e
A
A1
e
Inches
0.050 BSC
H
5.70
6.30
0.224
0.248
L
0.60
0.937
0.024
0.037
ø
0°
8°
0°
8°
S
0.25
0.50
0.010
0.020
b
S (45°)
H
L
ALD1102A/ALD1102B/ALD1102
C
ø
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PDIP-8 PACKAGE DRAWING
8 Pin Plastic DIP Package
Millimeters
E
E1
D
S
A2
A1
e
b
A
L
Dim
Min
Max
Min
Max
A
3.81
5.08
0.105
0.200
A1
0.38
1.27
0.015
0.050
A2
1.27
2.03
0.050
0.080
b
0.89
1.65
0.035
0.065
b1
0.38
0.51
0.015
0.020
c
0.20
0.30
0.008
0.012
D-8
9.40
11.68
0.370
0.460
E
5.59
7.11
0.220
0.280
E1
7.62
8.26
0.300
0.325
e
2.29
2.79
0.090
0.110
e1
7.37
7.87
0.290
0.310
L
2.79
3.81
0.110
0.150
S-8
1.02
2.03
0.040
0.080
0°
15°
0°
15°
ø
b1
Inches
c
e1
ø
ALD1102A/ALD1102B/ALD1102
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CERDIP-8 PACKAGE DRAWING
8 Pin CERDIP Package
E E1
Millimeters
D
A1
s
A
L
L2
b
b1
e
L1
Min
Inches
Dim
A
3.55
Max
5.08
Min
0.140
Max
0.200
A1
1.27
2.16
0.050
0.085
b
0.97
1.65
0.038
0.065
b1
0.36
0.58
0.014
0.023
C
0.20
0.38
0.008
0.015
D-8
--
10.29
--
0.405
E
5.59
7.87
0.220
0.310
E1
7.73
8.26
0.290
0.325
e
2.54 BSC
0.100 BSC
e1
7.62 BSC
0.300 BSC
L
3.81
5.08
0.150
0.200
L1
3.18
--
0.125
--
L2
0.38
1.78
0.015
0.070
S
--
2.49
--
0.098
Ø
0°
15°
0°
15°
C
e1
ALD1102A/ALD1102B/ALD1102
ø
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