Kersemi IRF520NL Low-profile through-hole (irf520nl) Datasheet

IRF520NS/L
l
l
l
l
l
l
Advanced Process Technology
Surface Mount (IRF520NS)
Low-profile through-hole (IRF520NL)
175°C Operating Temperature
Fast Switching
Fully Avalanche Rated
TO-263
TO-262
Description
The D2Pak is a surface mount power
package capable of accommodating die
sizes up to HEX-4. It provides the high
est power capability and the lowest pos
sible on-resistance in any existing surfa
ce mount package. The D2Pak is suitable
for high current applications because of
its low internal connection resistance and
can dissipate up to 2.0W in a typical surf
ace mount application. The through-hole
version (IRF520NL) is available for low-pr
ofile applications.
D
VDSS = 100V
RDS(on) = 0.20Ω
G
S
ID = 9.7A
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TA = 25°C
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Parameter
Max.
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
9.7
6.8
38
3.8
48
0.32
± 20
91
5.7
4.8
5.0
-55 to + 175
Units
A
W
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case )
Thermal Resistance
Parameter
RθJC
RθJA
2014-8-26
Junction-to-Case
Junction-to-Ambient ( PCB Mounted,steady-state)**
1
Typ.
Max.
Units
–––
–––
3.1
40
°C/W
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IRF520NS/L
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(on)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
100
–––
–––
2.0
2.7
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
IDSS
Drain-to-Source Leakage Current
LS
Internal Source Inductance
–––
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
–––
–––
–––
V(BR)DSS
∆V(BR)DSS/∆TJ
IGSS
Typ.
–––
0.11
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
4.5
23
32
23
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
0.20
Ω
VGS = 10V, ID = 5.7A
4.0
V
VDS = V GS, ID = 250µA
–––
S
VDS = 25V, ID = 5.7A
25
VDS = 100V, VGS = 0V
µA
250
VDS = 80V, VGS = 0V, TJ = 150°C
100
VGS = 20V
nA
-100
VGS = -20V
25
ID = 5.7A
4.8
nC
VDS = 80V
11
VGS = 10V, See Fig. 6 and 13
–––
VDD = 50V
–––
ID = 5.7A
ns
–––
RG = 22Ω
–––
RD = 8.6Ω, See Fig. 10
Between lead,
nH
7.5 –––
and center of die contact
330 –––
VGS = 0V
92 –––
pF
VDS = 25V
54 –––
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 9.7
showing the
A
G
integral reverse
––– ––– 38
S
p-n junction diode.
––– ––– 1.3
V
TJ = 25°C, IS = 5.7A, VGS = 0V
––– 99 150
ns
TJ = 25°C, IF = 5.7A
––– 390 580
nC
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature. ( See fig. 11 )
VDD = 25V, starting TJ = 25°C, L = 4.7mH
Uses IRF520N data and test conditions
RG = 25Ω, IAS = 5.7A. (See Figure 12)
ISD ≤ 5.7A, di/dt ≤ 240A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
2014-8-26
2
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IRF520NS/L
100
100
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BO TTOM 4.5V
10
4 .5V
2 0µ s P U L S E W IDTH
T C = 25 °C
1
0.1
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
I , D rain-to-Source Current (A )
D
I , D ra in-to -S o urc e C u rren t (A )
D
TO P
1
10
A
10
4 .5V
2 0µ s P U L S E W ID TH
T C = 17 5°C
1
100
0.1
1
V D S , D rain-to-S ource V oltage (V )
Fig 2. Typical Output Characteristics
3.0
R D S (on) , Drain-to-S ource O n Resistance
(N orm alized)
I D , D rain-to-So urce C urren t (A )
100
TJ = 25 °C
TJ = 1 7 5°C
V DS = 5 0V
2 0µ s P U L S E W ID TH
1
4
5
6
7
8
9
10
V G S , G ate-to -So urce Voltag e (V)
A
I D = 9 .5A
2.5
2.0
1.5
1.0
0.5
V G S = 10 V
0.0
-60
-40
-20
0
20
40
60
80
3
A
100 120 140 160 180
T J , Junction T em perature (°C )
Fig 3. Typical Transfer Characteristics
2014-8-26
A
100
V DS , D rain-to-S ource V oltage (V )
Fig 1. Typical Output Characteristics
10
10
Fig 4. Normalized On-Resistance
Vs. Temperature
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IRF520NS/L
V GS
C is s
C rs s
C o ss
500
C , Capacitance (pF)
C iss
=
=
=
=
20
0V ,
f = 1M H z
C g s + C g d , Cd s S H O R T E D
C gd
C d s + C gd
V G S , G ate-to-S ource V oltage (V )
600
I D = 5.7 A
16
400
12
C oss
300
200
C rss
100
0
10
8
4
FO R TE S T C IR C U IT
S E E FIG U R E 1 3
0
A
1
100
0
V D S , D rain-to-S ourc e V oltage (V )
5
10
15
20
A
25
Q G , T otal G ate C harge (nC )
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
100
O P E R A TIO N IN TH IS A R E A LIM ITE D
B Y R D S (o n)
10µs
I D , Drain C urrent (A )
I SD , Reverse D rain C urrent (A)
V D S = 80 V
V D S = 50 V
V D S = 20 V
TJ = 17 5°C
10
TJ = 2 5°C
V G S = 0V
1
0.4
0.6
0.8
1.0
1.2
A
1.4
100µ s
1m s
1
10m s
T C = 25 °C
T J = 17 5°C
S ing le P u lse
0.1
1
10
100
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 8. Maximum Safe Operating Area
4
A
1000
V D S , D rain-to-S ource V oltage (V )
V S D , S ourc e-to-D rain V oltage (V )
2014-8-26
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IRF520NS/L
VDS
RD
10.0
VGS
D.U.T.
RG
+
I D , Drain Current (A)
8.0
-VDD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
6.0
Fig 10a. Switching Time Test Circuit
4.0
VDS
2.0
90%
0.0
25
50
75
100
125
150
175
TC , Case Temperature ( °C)
10%
VGS
td(on)
Fig 9. Maximum Drain Current Vs.
Case Temperature
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
10
D = 0.50
1
0.20
0.10
0.05
0.1
0.02
0.01
0.01
0.00001
P DM
SINGLE PULSE
(THERMAL RESPONSE)
t1
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
2014-8-26
5
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IRF520NS/L
1 5V
L
VDS
D .U .T
RG
IA S
20V
D R IV E R
+
V
- DD
0 .0 1 Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
A
E A S , S ingle P ulse A valanche E nergy (m J)
200
TO P
B O TTO M
160
ID
2 .3 A
4.0 A
5 .7A
120
80
40
0
V D D = 25 V
25
V (B R )D SS
50
A
75
100
125
150
175
S tarting T J , J unc tion T em perature (°C )
tp
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
12V
QG
.2µF
.3µF
10 V
QGS
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
IG
Charge
Fig 13a. Basic Gate Charge Waveform
2014-8-26
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
6
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IRF520NS/L
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer

-
-

•
•
•
•
RG
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Driver Gate Drive
P.W.
D=
Period
+
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
ISD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
2014-8-26
7
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IRF520NS/L
D2Pak Package Outline
1 0.54 (.4 15)
1 0.29 (.4 05)
1.4 0 (.055 )
M AX.
-A-
1.3 2 (.05 2)
1.2 2 (.04 8)
2
1.7 8 (.07 0)
1.2 7 (.05 0)
1
1 0.16 (.4 00 )
RE F.
-B -
4.69 (.1 85)
4.20 (.1 65)
6.47 (.2 55 )
6.18 (.2 43 )
3
15 .4 9 (.6 10)
14 .7 3 (.5 80)
2.7 9 (.110 )
2.2 9 (.090 )
2.61 (.1 03 )
2.32 (.0 91 )
5 .28 (.20 8)
4 .78 (.18 8)
3X
1.40 (.0 55)
1.14 (.0 45)
5 .08 (.20 0)
0.5 5 (.022 )
0.4 6 (.018 )
0 .93 (.03 7 )
3X
0 .69 (.02 7 )
0 .25 (.01 0 )
M
8.8 9 (.3 50 )
R E F.
1.3 9 (.0 5 5)
1.1 4 (.0 4 5)
B A M
M IN IM U M R E CO M M E ND E D F O O TP R IN T
1 1.43 (.4 50 )
NO TE S:
1 D IM EN S IO N S A FTER SO L D ER D IP.
2 D IM EN S IO N IN G & TO LE RA N C IN G PE R A N S I Y1 4.5M , 198 2.
3 C O N TRO L LIN G D IM EN SIO N : IN C H .
4 H E ATSINK & L EA D D IM EN S IO N S D O N O T IN C LU D E B UR R S.
LE A D A SS IG N M E N TS
1 - G A TE
2 - D R AIN
3 - S O U RC E
8.89 (.3 50 )
17 .78 (.70 0)
3 .8 1 (.15 0)
2 .08 (.08 2)
2X
2.5 4 (.100 )
2X
Part Marking Information
D2Pak
A
PART NUM BER
LO G O
F530S
9 24 6
9B
1M
A S S E M B LY
LO T C O D E
2014-8-26
8
DATE CODE
(Y YW W )
YY = Y E A R
W W = W EEK
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IRF520NS/L
Package Outline
TO-262 Outline
Part Marking Information
TO-262
2014-8-26
9
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IRF520NS/L
Tape & Reel Information
D2Pak
TR R
1 .6 0 (.0 6 3 )
1 .5 0 (.0 5 9 )
1 .6 0 (.0 6 3 )
1 .5 0 (.0 5 9 )
4 .1 0 (.1 6 1 )
3 .9 0 (.1 5 3 )
F E E D D IRE CTIO N 1 .8 5 (.0 7 3 )
1 1.6 0 (.4 57 )
1 1.4 0 (.4 49 )
1 .6 5 (.0 6 5 )
0 .3 6 8 (.0 1 4 5 )
0 .3 4 2 (.0 1 3 5 )
1 5.4 2 (.6 0 9 )
1 5.2 2 (.6 0 1 )
2 4 .3 0 (.9 5 7 )
2 3 .9 0 (.9 4 1 )
TR L
1 .7 5 (.0 6 9 )
1 .2 5 (.0 4 9 )
1 0.9 0 (.4 2 9 )
1 0.7 0 (.4 2 1 )
4 .7 2 (.1 3 6)
4 .5 2 (.1 7 8)
1 6 .1 0 (.6 3 4 )
1 5 .9 0 (.6 2 6 )
F E E D D IRE CTIO N
13 .5 0 (.53 2)
12 .8 0 (.50 4)
27 .40 (1.0 79)
23 .90 (.94 1)
4
3 30 .0 0
(14.1 73)
MAX.
60.00 (2.3 62)
M IN .
NO TES :
1. C O M F O R M S T O E IA-4 18.
2. C O N TR O LL IN G D IM E N S IO N : M IL LIM E T E R .
3. D IM E N S IO N M E A SU R E D @ H U B .
4. IN C LU D E S F L AN G E D IS T O R T IO N @ O U TE R E D G E.
2014-8-26
10
26 .40 (1 .03 9)
24 .40 (.9 61 )
3
30 .40 (1.19 7)
MAX.
4
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