ON MC74LCX157 Low-voltage cmos quad 2-input multiplexer with 5 v−tolerant inputs (non−inverting) Datasheet

MC74LCX157
Low−Voltage CMOS Quad
2−Input Multiplexer
With 5 V−Tolerant Inputs
(Non−Inverting)
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The MC74LCX157 is a high performance, quad 2−input
multiplexer operating from a 2.3 to 3.6 V supply. High impedance
TTL compatible inputs significantly reduce current loading to input
drivers while TTL compatible outputs offer improved switching noise
performance. A VI specification of 5.5 V allows MC74LCX157 inputs
to be safely driven from 5 V devices.
Four bits of data from two sources can be selected using the Select
and Enable inputs. The four outputs present the selected data in the
true (non−inverted) form. The MC74LCX157 can also be used as a
function generator. Current drive capability is 24 mA at the outputs.
MARKING
DIAGRAMS
16
SOIC−16
D SUFFIX
CASE 751B
16
1
LCX157
AWLYWW
1
16
Features
•
•
•
•
•
•
•
•
•
Designed for 2.3 to 3.6 V VCC Operation
5 V Tolerant Inputs − Interface Capability With 5 V TTL Logic
LVTTL Compatible
LVCMOS Compatible
24 mA Balanced Output Sink and Source Capability
Near Zero Static Supply Current (10 A) Substantially Reduces
System Power Requirements
Latchup Performance Exceeds 500 mA
ESD Performance:
Human Body Model >2000 V
Machine Model >200 V
Pb−Free Packages are Available*
16
1
TSSOP−16
DT SUFFIX
CASE 948F
LCX
157
ALYW
1
16
SOEIAJ−16
M SUFFIX
CASE 966
16
74LCX157
ALYW
1
1
A
L, WL
Y
W, WW
=
=
=
=
Assembly Location
Wafer Lot
Year
Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
 Semiconductor Components Industries, LLC, 2005
January, 2005 − Rev. 4
1
Publication Order Number:
MC74LCX157/D
MC74LCX157
VCC
E
I0c
I1c
Zc
I0d
I1d
Zd
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
S
I0a
I1a
Za
I0b
I1b
Zb
GND
PIN NAMES
Pins
Function
I0n
I1n
E
S
Zn
Source 0 Data Inputs
Source 1 Data Inputs
Enable Input
Select Input
Outputs
Figure 1. 16−Lead Pinout (Top View)
S
E
I0a
I1a
I0b
I1b
I0c
I1c
I0d
I1d
1
15
2
4
3
5
7
6
14
12
13
11
9
10
Za
Zb
Zc
Zd
Figure 2. Logic Diagram
TRUTH TABLE
Inputs
Outputs
E
S
I0n
I1n
Zn
H
L
L
L
L
X
H
H
L
L
X
X
X
L
H
X
L
H
X
X
L
L
H
L
H
H = High Voltage Level; L = Low Voltage Level; X = High or Low Voltage Level ; For ICC Reasons DO
NOT FLOAT Inputs
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2
MC74LCX157
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VCC
DC Supply Voltage
VI
DC Input Voltage
VO
DC Output Voltage
IIK
DC Input Diode Current
IOK
DC Output Diode Current
Value
Condition
Unit
−0.5 to +7.0
V
−0.5 ≤ VI ≤ +7.0
V
−0.5 ≤ VO ≤ VCC + 0.5
Note 1
V
−50
VI < GND
mA
−50
VO < GND
mA
+50
VO > VCC
mA
IO
DC Output Source/Sink Current
±50
mA
ICC
DC Supply Current Per Supply Pin
±100
mA
IGND
DC Ground Current Per Ground Pin
±100
mA
TSTG
Storage Temperature Range
−65 to +150
°C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. Output in HIGH or LOW State. IO absolute maximum rating must be observed.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Operating
Data Retention Only
Min
Typ
Max
Unit
2.0
1.5
3.3
3.3
3.6
3.6
V
0
5.5
V
0
VCC
V
−24
mA
VCC
Supply Voltage
VI
Input Voltage
VO
Output Voltage
IOH
HIGH Level Output Current, VCC = 3.0 V − 3.6 V
IOL
LOW Level Output Current, VCC = 3.0 V − 3.6 V
24
mA
IOH
HIGH Level Output Current, VCC = 2.7 V − 3.0 V
−12
mA
IOL
LOW Level Output Current, VCC = 2.7 V − 3.0 V
12
mA
TA
Operating Free−Air Temperature
−40
+85
°C
t/V
Input Transition Rise or Fall Rate, VIN from 0.8 V to 2.0 V,
VCC = 3.0 V
0
10
ns/V
(HIGH or LOW State)
ORDERING INFORMATION
Package
Shipping†
MC74LCX157DR2
SOIC−16
2500 Tape & Reel
MC74LCX157DR2G
SOIC−16
(Pb−Free)
2500 Tape & Reel
MC74LCX157DT
TSSOP−16*
96 Units / Rail
MC74LCX157DTR2
TSSOP−16*
2500 Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
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3
MC74LCX157
DC ELECTRICAL CHARACTERISTICS
TA = −40°C to +85°C
Symbol
Characteristic
Condition
Min
2.0
VIH
HIGH Level Input Voltage (Note 2)
2.7 V ≤ VCC ≤ 3.6 V
VIL
LOW Level Input Voltage (Note 2)
2.7 V ≤ VCC ≤ 3.6 V
VOH
HIGH Level Output Voltage
VOL
LOW Level Output Voltage
Max
Unit
V
0.8
2.7 V ≤ VCC ≤ 3.6 V; IOH = −100 A
VCC − 0.2
VCC = 2.7 V; IOH = −12 mA
2.2
VCC = 3.0 V; IOH = −18 mA
2.4
VCC = 3.0 V; IOH = −24 mA
2.2
V
V
2.7 V ≤ VCC ≤ 3.6 V; IOL = 100 A
0.2
VCC = 2.7 V; IOL= 12 mA
0.4
VCC = 3.0 V; IOL = 16 mA
0.4
V
VCC = 3.0 V; IOL = 24 mA
0.55
II
Input Leakage Current
2.7 V ≤ VCC ≤ 3.6 V; 0 V ≤ VI ≤ 5.5 V
±5.0
A
ICC
Quiescent Supply Current
2.7 ≤ VCC ≤ 3.6 V; VI = GND or VCC
10
A
2.7 ≤ VCC ≤ 3.6 V; 3.6 ≤ VI ≤ 5.5 V
±10
A
2.7 ≤ VCC ≤ 3.6 V; VIH = VCC − 0.6 V
500
A
ICC
Increase in ICC per Input
2. These values of VI are used to test DC electrical characteristics only.
AC CHARACTERISTICS (tR = tF = 2.5 ns; CL = 50 pF; RL = 500 )
Limits
TA = −40°C to +85°C
VCC = 3.0 V to 3.6 V
Symbol
Parameter
VCC = 2.7 V
Waveform
Min
Max
Max
Unit
tPLH
tPHL
Propagation Delay
In to Zn
1
1.5
1.5
5.8
5.8
6.3
6.3
ns
tPLH
tPHL
Propagation Delay
S to Zn
1,2
1.5
1.5
7.0
7.0
8.0
8.0
ns
tPLH
tPHL
Propagation Delay
E to Zn
2
1.5
1.5
7.0
7.0
8.0
8.0
ns
tOSHL
tOSLH
Output−to−Output Skew
(Note 3)
1.0
1.0
ns
3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter
guaranteed by design.
DYNAMIC SWITCHING CHARACTERISTICS
TA = +25°C
Symbol
Characteristic
Condition
Min
Typ
Max
Unit
VOLP
Dynamic LOW Peak Voltage (Note 4)
VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
0.8
V
VOLV
Dynamic LOW Valley Voltage (Note 4)
VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
0.8
V
4. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Condition
Typical
Unit
CIN
Symbol
Input Capacitance
Parameter
VCC = 3.3 V, VI = 0 V or VCC
7
pF
COUT
Output Capacitance
VCC = 3.3 V, VI = 0 V or VCC
8
pF
CPD
Power Dissipation Capacitance
10 MHz, VCC = 3.3 V, VI = 0 V or VCC
25
pF
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4
MC74LCX157
2.7 V
1.5 V
In, S
1.5 V
0V
tPHL
tPLH
VOH
Zn
1.5 V
1.5 V
VOL
WAVEFORM 1 − NON−INVERTING PROPAGATION DELAYS
tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
2.7 V
1.5 V
E, S
1.5 V
0V
tPHL
tPLH
VOH
Zn
1.5 V
1.5 V
VOL
WAVEFORM 2 − INVERTING PROPAGATION DELAYS
tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
Figure 3. AC Waveforms
VCC
PULSE
GENERATOR
DUT
RT
CL
CL = 50pF or equivalent (Includes jig and probe capacitance)
RL = R1 = 500 or equivalent
RT = ZOUT of pulse generator (typically 50)
Figure 4. Test Circuit
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5
RL
MC74LCX157
PACKAGE DIMENSIONS
SOIC−16
D SUFFIX
CASE 751B−05
ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
−A−
16
9
−B−
1
P
8 PL
0.25 (0.010)
8
M
B
S
G
R
K
DIM
A
B
C
D
F
G
J
K
M
P
R
F
X 45 C
−T−
SEATING
PLANE
J
M
D
16 PL
0.25 (0.010)
M
T B
S
A
MILLIMETERS
MIN
MAX
9.80
10.00
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0
7
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.386
0.393
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0
7
0.229
0.244
0.010
0.019
S
TSSOP−16
DT SUFFIX
CASE 948F−01
ISSUE O
16X K REF
0.10 (0.004)
0.15 (0.006) T U
M
T U
S
V
S
S
K
ÉÉ
ÇÇ
ÇÇ
ÉÉ
K1
2X
L/2
16
9
J1
B
−U−
L
SECTION N−N
J
PIN 1
IDENT.
8
1
N
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED
0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE −W−.
0.25 (0.010)
0.15 (0.006) T U
S
A
−V−
M
N
F
DETAIL E
−W−
C
0.10 (0.004)
−T− SEATING
PLANE
H
D
DETAIL E
G
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6
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
MILLIMETERS
MIN
MAX
4.90
5.10
4.30
4.50
−−−
1.20
0.05
0.15
0.50
0.75
0.65 BSC
0.18
0.28
0.09
0.20
0.09
0.16
0.19
0.30
0.19
0.25
6.40 BSC
0
8
INCHES
MIN
MAX
0.193
0.200
0.169
0.177
−−−
0.047
0.002
0.006
0.020
0.030
0.026 BSC
0.007
0.011
0.004
0.008
0.004
0.006
0.007
0.012
0.007
0.010
0.252 BSC
0
8
MC74LCX157
PACKAGE DIMENSIONS
SOEIAJ−16
M SUFFIX
CASE 966−01
ISSUE O
16
LE
9
Q1
M
E HE
1
8
L
DETAIL P
Z
D
e
VIEW P
A
DIM
A
A1
b
c
D
E
e
HE
L
LE
M
Q1
Z
A1
b
0.13 (0.005)
c
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
0.10 (0.004)
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7
MILLIMETERS
MIN
MAX
−−−
2.05
0.05
0.20
0.35
0.50
0.18
0.27
9.90
10.50
5.10
5.45
1.27 BSC
7.40
8.20
0.50
0.85
1.10
1.50
10 0
0.70
0.90
−−−
0.78
INCHES
MIN
MAX
−−−
0.081
0.002
0.008
0.014
0.020
0.007
0.011
0.390
0.413
0.201
0.215
0.050 BSC
0.291
0.323
0.020
0.033
0.043
0.059
10 0
0.028
0.035
−−−
0.031
MC74LCX157
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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For additional information, please contact your
local Sales Representative.
MC74LCX157/D
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