Semiconductor MSM53V1655F 524,288-Double Words x 32-bit or 1,048,576-Words x 16-bit MaskROM 4Double Words x 32-Bit or 8Words x 16-Bit/Page Mode MASKROM DESCRIPTION The OKI MSM53V1655F is a 524,288-double words x 32-bit or 1,048,576-words x 16-bit CMOS Mask ROM with an asynchronous page read mode. Each page is organized 4double words x 32-bit or 8 words x 16-bit. It operates on a single 3.3V power supply and is TTL compatible. The chip's asynchronous I/O requires no external clock assuring easy operation. A power-down mode provides low power dissipation when the chip is not selected. The CE and OE pins are provided as control signals that permit three-stated output allowing easy memory expansion on a system bus.The MSM531655F is suited for use as large capacity fixed memory for microcomputers and data terminals. FEATURES Single 3.3V power supply 524,288-double words x 32-bit / 1,048,576-words x 16-bit 4-double words(A1,A0) or 8-words(A1,A0,A-1) / Page Access time 100ns Max (Normal access) 30ns Max (Page access) Input/Output TTL compatible Tri-State output configurations Internal powerdown function Packages: 70-PIN PLASTIC SSOP (SSOP70-P-500-K) 70-PIN PLASTIC TSOP (TSOP70-P-400/0.65) Pin compatible OTP available 1 MSM53V1655F PIN CONFIGURATION A0 1 A1 2 A2 3 A3 4 A4 5 A5 6 Vcc 7 D0 8 D16 9 D1 10 D17 11 Vss 12 70 NC Vcc 13 D2 14 D18 15 D3 16 D19 17 D4 18 58 Vcc 57 D29 D20 19 D5 20 D21 21 Vss 22 Vcc 23 D6 24 52 D11 51 D26 D22 25 D7 26 D23 27 Vss 28 A6 29 A7 30 A8 31 A9 32 A10 33 A11 34 A12 35 69 NC 68 NC 67 WORD 66 OE 65 CE 64 Vss 63 D31/A-1 62 D15 61 D30 60 D14 59 Vss 56 D13 55 D28 54 D12 53 D27 50 D10 49 Vss 48 Vcc 47 D25 46 D9 45 D24 44 D8 43 Vcc 42 NC Pin Name 41 A18 D31/A-1 40 A17 39 A16 38 A15 37 A14 36 A13 Function Data output / address input A0 to A18 Address input D0 to D30 Data output CE Chip enable OE Output enable WORD VCC, VSS Mode switch (H:DW/L:W) Power supply 2 MSM53V1655F BLOCK DIAGRAM VCC VSS A-1 WORD Output Switching Between 16 and 32 bits CE CE OE Control Memory Cell Matrix 524,288 x 32 or 1,048,676 x 16 X Decoder Address Buffer Multiplexer & Page Data Latch Y Decoder Output Buffer D31 D15 D30 D14 D29 D13 D28 D12 D27 D11 D26 D10 D25 D9 D24 D8 D23 D7 D22 D6 D21 D5 D20 D4 D19 D3 D18 D2 D17 D1 D16 D0 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 OE FUNCTION TABLE 3 DOUT Mode LSB MSB Hi-Z — — 32 bit A0 A18 A0 A1 16 bit A-1 A18 16 bit(Page Mode) A-1 A1 CE H OE X BYTE X A-1/D31 D0—D15 D16—D31 X Hi-Z Hi-Z L H X X Hi-Z Hi-Z L L H Input Inhibited (D31) D0 to D15 D16 to D31 L L H Input Inhibited (D31) D0 to D15 D16 to D31 32 bit(Page Mode) L L L L D0 to D15 Hi-Z L L L H D16 to D31 Hi-Z L L L L D0 to D15 Hi-Z L L L H D16 to D31 Hi-Z MSM53V1655F ABSOLUTE MAXIMUM LIMITS Parameter Power Supply Voltage Symbol Conditions Limits Unit –0.3 to 7 –0.3 to VCC + 0.5 V to VSS VCC Input Voltage VI Output Voltage VO Power Dissipation Operating Temperature PD Topr Storage Temperature Tstg V –0.3 to VCC + 0.5 V 1.0 W 0 to 70 °C Per Package Topr = 25°C — — –55 to 150 °C RECOMMENDED OPERATING CONDITIONS Parameter Power Supply Voltage "H" Input Voltage "L" Input Voltage Operating Temperature Symbol Conditions VCC Limits Unit Min. Typ. Max. — 3.0 3.3 3.6 V VSS — 0.0 0.0 0.0 V VIH — 2.2 3.3 VCC + 0.5 V VIL Topr — –0.3 V 0 0.0 — 0.8 — 70 °C DC CHARACTERISTICS (VCC = 3.3V±0.3V, Ta = 0 to 70°C) Limits Symbol Conditions "H" Output Voltage VOH IOH = –400uA "L" Output Voltage VOL IOH = 1.0mA 2.4 — Input Leakage Current ILI VI = 0 to VCC Output Leakage Current ILO Power Supply Current (Operating) Power Supply Current (Standby) Parameter Unit Typ. — Max. — — — 0.4 –10 10 V µA VO = 0 to VCC CE = VIH MIN –10 — 10 µA ICC CE = VIL, OE = VIH, tC = 100ns — — 100 mA ICCS1 CE = VCC–0.2V CE = VIH MIN — — 50 — — 500 µA µA ICCS Min. V 4 MSM53V1655F AC CHARACTERISTICS Test conditions Parameter Conditions VIH=3.0V, VIL=0.0V tr=tf=5ns Input Signal Level Transtion Time Timing Reference Level Input Voltage=1.5V Output Voltage=0.8V&2.0V Load Condition CL=100pF+1TTL Read Cycle (Ta = 0 to 70°C) Parameter Limits Symbol Conditions tC — Random Address Access time tACC — 100 — Page Set up time tPSET — 100 Random Access Cycle time Min. Unit Typ. — Max. — — — 100 — — ns ns ns ns Page Access Cycle time tPC — Page Access time CE Access time tPAC — 30 — — — 30 ns tCE — — — 100 ns OE Access time tOE — 30 ns 0 — — 30 ns 0 — ns 0 — 25 — CE Output Disable time tCHZ — — OE Output Disable time tOHZ — tOH — Output Hold time Read Cycle (Note1) tC Address tACC tOH OE tOE DOUT 5 ns MSM53V1655F Read Cycle (Note2) tC CE tCHZ tCE (Note 3) OE tOHZ tOE (Note 3) DOUT Page Mode Read Cycle (Note4) tPSET Address A2 - A17 tPC tPC tPC Address A0 - A1 tACC tPAC tPAC tPAC DOUT Note) 1. 2. 3. 4. CE is low level. Address is fixed before or at the same time when CE level falls. tCHZ & tOHZ indicate the time until floating. They are not determined by the output level. CE is low level and OE is low level. I/O CAPACITANCE Symbol Conditions Input Capacitance CI Output Capacitance CO Parameter Rated Value Unit Typ. — Max. VI=0V Min. — 8 pF VO=0V — — 10 pF 6 Semiconductor NOTICE The information contained herein can change without notice owing to product and/or technical improvements. Before using the product, please make sure that the information being referred to is up-todate. The outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. When planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. When designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. 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