LINER LT1028ACN8 Ultra low noise precision high speed op amp Datasheet

LT1028/LT1128
Ultra Low Noise Precision
High Speed Op Amps
U
DESCRIPTIO
FEATURES
■
■
■
■
■
■
■
■
Voltage Noise
1.1nV/√Hz Max. at 1kHz
0.85nV/√Hz Typ. at 1kHz
1.0nV/√Hz Typ. at 10Hz
35nVP-P Typ., 0.1Hz to 10Hz
Voltage and Current Noise 100% Tested
Gain-Bandwidth Product
LT1028: 50MHz Min.
LT1128: 13MHz Min.
Slew Rate
LT1028: 11V/µs Min.
LT1128: 5V/µs Min.
Offset Voltage: 40µV Max.
Drift with Temperature: 0.8µV/°C Max.
Voltage Gain: 7 Million Min.
Available in 8-Pin SO Package
The LT1028(gain of –1 stable)/LT1128(gain of +1 stable)
achieve a new standard of excellence in noise performance
with 0.85nV/√Hz 1kHz noise, 1.0nV/√Hz 10Hz noise. This
ultra low noise is combined with excellent high speed
specifications (gain-bandwidth product is 75MHz for
LT1028, 20MHz for LT1128), distortion-free output, and
true precision parameters (0.1µV/°C drift, 10µV offset
voltage, 30 million voltage gain). Although the LT1028/
LT1128 input stage operates at nearly 1mA of collector
current to achieve low voltage noise, input bias current is
only 25nA.
The LT1028/LT1128’s voltage noise is less than the noise
of a 50Ω resistor. Therefore, even in very low source
impedance transducer or audio amplifier applications, the
LT1028/LT1128’s contribution to total system noise will
be negligible.
UO
APPLICATI
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Low Noise Frequency Synthesizers
High Quality Audio
Infrared Detectors
Accelerometer and Gyro Amplifiers
350Ω Bridge Signal Conditioning
Magnetic Search Coil Amplifiers
Hydrophone Amplfiers
Flux Gate Amplifier
Voltage Noise vs Frequency
10
DEMODULATOR
SYNC
+
OUTPUT TO
DEMODULATOR
LT1028
–
SQUARE
WAVE
DRIVE
1kHz
1k
FLUX GATE
TYPICAL
SCHONSTEDT
#203132
50Ω
VOLTAGE NOISE DENSITY (nV/√Hz)
■
S
MAXIMUM
1/f CORNER = 14Hz
TYPICAL
1
1/f CORNER = 3.5Hz
0.1
0.1
1028/1128 TA01
VS = ±15V
TA = 25°C
1
10
100
FREQUENCY (Hz)
1k
1028/1128 TA02
1
LT1028/LT1128
W W
W
AXI U
U
ABSOLUTE
RATI GS
Supply Voltage
–55°C to 105°C ................................................ ±22V
105°C to 125°C ................................................ ±16V
Differential Input Current (Note 8) ...................... ±25mA
Input Voltage ............................ Equal to Supply Voltage
Output Short Circuit Duration .......................... Indefinite
Operating Temperature Range
LT1028/LT1128AM, M ..................... – 55°C to 125°C
LT1028/LT1128AC, C ......................... – 40°C to 85°C
Storage Temperature Range
All Devices ........................................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec.)................. 300°C
U
W
U
PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
TOP VIEW
VOS TRIM
8
VOS TRIM 1
7 V+
–
–IN 2
+
+IN 3
4
V–
(CASE)
6 OUT
5 OVERCOMP
LT1028AMH
LT1028MH
LT1028ACH
LT1028CH
ORDER PART
NUMBER
TOP VIEW
VOS
TRIM 1
–IN 2
–
7
+IN 3
+
6
V
–
VOS
TRIM
V+
8
4
LT1028CS8
LT1128CS8
OUT
OVERCOMP
5
S8 PART MARKING
S8 PACKAGE
8-LEAD PLASTIC SOIC
1028
1128
H PACKAGE
8-LEAD TO-5 METAL CAN
ORDER PART
NUMBER
TOP VIEW
TOP VIEW
VOS
TRIM 1
–IN 2
–
VOS
TRIM
7 V+
+IN 3
+
6
V
–
4
8
OUT
5 OVERCOMP
J8 PACKAGE
8-LEAD CERAMIC DIP
N8 PACKAGE
8-LEAD PLASTIC DIP
LT1028AMJ8
LT1028MJ8
LT1028ACJ8
LT1028CJ8
LT1028ACN8
LT1028CN8
LT1128AMJ8
LT1128MJ8
LT1128CJ8
LT1128ACN8
LT1128CN8
ELECTRICAL CHARACTERISTICS
NC 1
16 NC
NC 2
15 NC
–IN 4
–
13 V +
+IN 5
+
NC 7
12 OUT
11 OVERCOMP
10 NC
NC 8
9
V– 6
2
PARAMETER
Input Offset Voltage
Long Term Input Offset
Voltage Stability
Input Offset Current
Input Bias Current
Input Noise Voltage
NC
S PACKAGE
16-LEAD PLASTIC SOL
NOTE: THIS DEVICE IS NOT RECOMMENDED FOR NEW DESIGNS
VS = ±15V, TA = 25°C, unless otherwise noted.
LT1028AM/AC
LT1128AM/AC
SYMBOL
VOS
∆VOS
∆Time
IOS
IB
en
LT1028CS16
14 TRIM
TRIM 3
CONDITIONS
(Note 1)
(Note 2)
VCM = 0V
VCM = 0V
0.1Hz to 10Hz (Note 3)
MIN
TYP
10
0.3
MAX
40
12
±25
35
50
±90
75
LT1028M/C
LT1128M/C
MIN
TYP
20
0.3
MAX
80
UNITS
µV
µV/Mo
18
±30
35
100
±180
90
nA
nA
nVP-P
LT1028/LT1128
ELECTRICAL CHARACTERISTICS
VS = ±15V, TA = 25°C, unless otherwise noted.
LT1028AM/AC
LT1128AM/AC
SYMBOL PARAMETER
Input Noise Voltage Density
In
Input Noise Current Density
CMRR
PSRR
AVOL
Input Resistance
Common Mode
Differential Mode
Input Capacitance
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large-Signal Voltage Gain
VOUT
Maximum Output Voltage Swing
SR
Slew Rate
GBW
Gain-Bandwidth Product
ZO
IS
Open-Loop Output Impedance
Supply Current
CONDITIONS
fO = 10Hz (Note 4)
fO = 1000Hz, 100% tested
fO = 10Hz (Note 3 and 5)
fO = 1000Hz, 100% tested
VCM = ±11V
VS = ±4V to ±18V
RL ≥ 2k, VO = ±12V
RL ≥ 1k, VO = ±10V
RL ≥ 600Ω, VO = ±10V
RL ≥ 2k
RL ≥ 600Ω
AVCL = –1
AVCL = –1
fO = 20kHz (Note 6)
fO = 200kHz (Note 6)
VO = 0, IO = 0
ELECTRICAL CHARACTERISTICS
MIN
TYP
1.00
0.85
4.7
1.0
MAX
1.7
1.1
10.0
1.6
300
20
5
±11.0 ±12.2
114
126
117
133
7.0
30.0
5.0
20.0
3.0
15.0
±12.3 ±13.0
±11.0 ±12.2
11.0 15.0
5.0
6.0
50
75
13
20
80
7.4
LT1028
LT1128
LT1028
LT1128
LT1028M/C
LT1128M/C
MIN
±11.0
110
110
5.0
3.5
2.0
±12.0
±10.5
11.0
4.5
50
11
9.5
PARAMETER
Input Offset Voltage
Average Input Offset Drift
CONDITIONS
(Note 1)
(Note7)
VCM = 0V
VCM = 0V
CMRR
PSRR
AVOL
Input Offset Current
Input Bias Current
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large-Signal Voltage Gain
VOUT
IS
Maximum Output Voltage Swing
Supply Current
MAX
1.9
1.2
12.0
1.8
UNITS
nV/√Hz
nV/√Hz
pA/√Hz
pA/√Hz
10.5
MΩ
kΩ
pF
V
dB
dB
V/µV
V/µV
V/µV
V
V
V/µs
V/µs
MHz
MHz
Ω
mA
TYP
45
0.25
MAX
180
1.0
UNITS
µV
µV/°C
30
±50
±11.7
120
130
14.0
10.0
±11.6
9.0
180
±300
nA
nA
V
dB
dB
V/µV
V/µV
V
mA
300
20
5
±12.2
126
132
30.0
20.0
15.0
±13.0
±12.2
15.0
6.0
75
20
80
7.6
VS = ±15V, –55°C ≤ TA ≤ 125°C, unless otherwise noted.
LT1028M
LT1128M
LT1028AM
LT1128AM
SYMBOL
VOS
∆VOS
∆Temp
IOS
IB
TYP
1.0
0.9
4.7
1.0
MIN
●
●
●
●
●
VCM = ±10.3V
VS = ±4.5V to ±16V
RL ≥ 2k, VO = ±10V
RL ≥ 1k, VO = ±10V
RL ≥ 2k
●
●
●
●
●
TYP
30
0.2
MAX
120
0.8
25
±40
±10.3 ±11.7
106
122
110
130
3.0
14.0
2.0
10.0
±10.3 ±11.6
8.7
90
±150
MIN
±10.3
100
104
2.0
1.5
±10.3
11.5
13.0
3
LT1028/LT1128
ELECTRICAL CHARACTERISTICS
VS = ±15V, 0°C ≤ TA ≤ 70°C, unless otherwise noted.
LT1028C
LT1128C
LT1028AC
LT1128AC
SYMBOL
VOS
∆V OS
∆Temp
IOS
IB
PARAMETER
Input Offset Voltage
Average Input Offset Drift
CONDITIONS
(Note 1)
(Note7)
VCM = 0V
VCM = 0V
CMRR
PSRR
AVOL
Input Offset Current
Input Bias Current
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large-Signal Voltage Gain
VOUT
Maximum Output Voltage Swing
IS
Supply Current
MIN
●
●
●
●
●
VCM = ±10.5V
VS = ±4.5V to ±18V
RL ≥ 2k, VO = ±10V
RL ≥ 1k, VO = ±10V
RL ≥ 2k
RL ≥ 600Ω (Note 9)
●
●
●
●
●
ELECTRICAL CHARACTERISTICS
TYP
15
0.1
15
±30
±10.5 ±12.0
110
124
114
132
5.0
25.0
4.0
18.0
±11.5 ±12.7
±9.5 ±11.0
8.0
MAX
80
0.8
MIN
65
±120
±10.5
106
107
3.0
2.5
±11.5
±9.0
10.5
PARAMETER
Input Offset Voltage
Average Input Offset Drift
CONDITIONS
VCM = 0V
VCM = 0V
CMRR
PSRR
AVOL
Input Offset Current
Input Bias Current
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large-Signal Voltage Gain
VOUT
IS
Maximum Output Voltage Swing
Supply Current
MIN
●
●
●
●
●
VCM = ±10.5V
VS = ±4.5V to ±18V
RL ≥ 2k, VO = ±10V
RL ≥ 1k, VO = ±10V
RL ≥ 2k
The ● denotes specifications which apply over the full operating
temperature range.
Note 1: Input Offset Voltage measurements are performed by automatic
test equipment approximately 0.5 sec. after application of power. In
addition, at TA = 25°C, offset voltage is measured with the chip heated to
approximately 55°C to account for the chip temperature rise when the
device is fully warmed up.
Note 2: Long Term Input Offset Voltage Stability refers to the average
trend line of Offset Voltage vs. Time over extended periods after the first
30 days of operation. Excluding the initial hour of operation, changes in
VOS during the first 30 days are typically 2.5µV.
Note 3: This parameter is tested on a sample basis only.
Note 4: 10Hz noise voltage density is sample tested on every lot with the
exception of the S8 and S16 packages. Devices 100% tested at 10Hz are
available on request.
Note 5: Current noise is defined and measured with balanced source
resistors. The resultant voltage noise (after subtracting the resistor noise
4
MAX
125
1.0
UNITS
µV
µV/°C
22
±40
±12.0
124
132
25.0
18.0
±12.7
±10.5
8.2
130
±240
nA
nA
V
dB
dB
V/µV
V/µV
V
V
mA
11.5
VS = ±15V, – 40°C ≤ TA ≤ 85°C, unless otherwise noted. (Note 10)
LT1028C
LT1128C
LT1028AC
LT1128AC
SYMBOL
VOS
∆V OS
∆Temp
IOS
IB
TYP
30
0.2
●
●
●
●
●
TYP
20
0.2
MAX
95
0.8
20
±35
±10.4 ±11.8
108
123
112
131
4.0
20.0
3.0
14.0
±11.0 ±12.5
8.5
80
±140
MIN
±10.4
102
106
2.5
2.0
±11.0
11.0
TYP
35
0.25
MAX
150
1.0
UNITS
µV
µV/°C
28
±45
±11.8
123
131
20.0
14.0
±12.5
8.7
160
±280
nA
nA
V
dB
dB
V/µV
V/µV
V
mA
12.5
on an RMS basis) is divided by the sum of the two source resistors to
obtain current noise. Maximum 10Hz current noise can be inferred from
100% testing at 1kHz.
Note 6: Gain-bandwidth product is not tested. It is guaranteed by design
and by inference from the slew rate measurement.
Note 7: This parameter is not 100% tested.
Note 8: The inputs are protected by back-to-back diodes. Current-limiting
resistors are not used in order to achieve low noise. If differential input
voltage exceeds ±1.8V, the input current should be limited to 25mA.
Note 9: This parameter guaranteed by design, fully warmed up at TA =
70°C. It includes chip temperature increase due to supply and load
currents.
Note 10: The LT1028/LT1128 are not tested and are not qualityassurance-sampled at –40°C and at 85°C. These specifications are
guaranteed by design, correlation and/or inference from –55°C, 0°C, 25°C,
70°C and /or 125°C tests.
LT1028/LT1128
U W
TYPICAL PERFOR A CE CHARACTERISTICS
10Hz Voltage Noise Distribution
Wideband Voltage Noise
(0.1Hz to Frequency Indicated)
Wideband Noise, DC to 20kHz
180
10
VS = ±15V
TA = 25°C
500 UNITS
MEASURED
FROM 4 RUNS
NUMBER OF UNITS
140
120
VS = ±15V
TA = 25°C
RMS VOLTAGE NOISE (µV)
158
148
160
100
80
70
57
60
40
28
20
8
74 3
2 2 2 12
0
0.6
3 21 1
1
0.1
VERTICAL SCALE = 0.5µV/DIV
HORIZONTAL SCALE = 0.5ms/DIV
1
0.8 1.0 1.2 1.4 1.6 1.8 2.0
VOLTAGE NOISE DENSITY (nV/√Hz)
0.01
100
2.2
1k
10k
100k
BANDWIDTH (Hz)
Total Noise vs Matched Source
Resistance
Total Noise vs Unmatched
Source Resistance
100
RS
+
10
AT 10Hz
AT 1kHz
1
2 RS NOISE ONLY
VS = ±15V
TA = 25°C
CURRENT NOISE DENSITY (pA/√Hz)
RS
TOTAL NOISE DENSITY (nV/√Hz)
TOTAL NOISE DENSITY (nV/√Hz)
Current Noise Spectrum
100
100
–
10
AT 1kHz
AT 10Hz
1
2 RS NOISE ONLY
VS = ±15V
TA = 25°C
0.1
3
10 30 100 300 1k 3k
MATCHED SOURCE RESISTANCE (Ω)
10k
1
10
1/f CORNER = 800Hz
TYPICAL
1
1/f CORNER = 250Hz
10
3
10 30 100 300 1k 3k 10k
UNMATCHED SOURCE RESISTANCE (Ω)
LT1028/1128 • TPC04
MAXIMUM
0.1
0.1
1
10M
LT1028/1128 • TPC03
LT1020/1120 • TPC01
RS
1M
100
1k
FREQUENCY (Hz)
LT1028/1128 • TPC06
LT1028/1128 • TPC05
0.01Hz to 1Hz Voltage Noise
0.1Hz to 10Hz Voltage Noise
10k
Voltage Noise vs Temperature
2.0
VS = ±15V
RMS VOLTAGE DENSITY (nV/√Hz)
VS = ±15V
TA = 25°C
VS = ±15V
TA = 25°C
10nV
10nV
0
2
6
4
TIME (SEC)
8
10
LT1028/1128 • TPC07
0
20
60
40
TIME (SEC)
80
100
LT1028/1128 • TPC07
1.6
1.2
AT 10Hz
0.8
AT 1kHz
O.4
0
–50 –25
50
25
0
75
TEMPERATURE (°C)
100
125
LT1028/1128 • TPC09
5
LT1028/LT1128
U W
TYPICAL PERFOR A CE CHARACTERISTICS
12
10
8
6
20
10
0
–10
–20
4
–30
2
–40
0
–50 –40 –30 –20 –10 0 10 20 30 40 50
OFFSET VOLTAGE (µV)
–50
–50 –25
50
25
0
75
TEMPERATURE (°C)
16
METAL CAN (H) PACKAGE
12
8
DUAL-IN-LINE PACKAGE
PLASTIC (N) OR CERDIP (J)
0
SUPPLY CURRENT (mA)
RMS VOLTAGE NOISE DENSITY (nV/√Hz)
AT 10Hz
AT 1kHz
0.75
BIAS CURRENT
20
10
OFFSET CURRENT
50
25
75
0
TEMPERATURE (˚C)
±20
LT1028/1128 • TPC16
60
40
5
POSITIVE INPUT CURRENT
(UNDERCANCELLED) DEVICE
20
0
–20
–40
NEGATIVE INPUT CURRENT
(OVERCANCELLED) DEVICE
–60
100
125
–80
–15
10
5
–10
0
–5
COMMON-MODE INPUT VOLTAGE (V)
Output Short-Circuit Current
vs Time
50
9
40
VS = ±15V
7
VS = ±5V
5
4
3
30
–10
–20
–30
–50
LT1028/1128 • TPC17
125°C
0
0
–50 –25
125
VS = ±15V
10
–40
100
–50°C
25°C
20
1
50
25
0
75
TEMPERATURE (°C)
15
LT1028/1128 • TPC15
10
6
4
RCM = 20V ≈ 300MΩ VS = ±15V
65nA
TA = 25°C
80
2
±5
±10
±15
SUPPLY VOLTAGE (V)
3
2
TIME (MONTHS)
100
30
8
1.25
1
0
LT1028/1128 • TPC12
Supply Current vs Temperature
TA = 25°C
6
–6
LT1028/1128 • TPC14
1.5
0
–2
–4
Bias Current Over the CommonMode Range
40
0
–50 –25
5
1
2
3
4
TIME AFTER POWER ON (MINUTES)
50
Voltage Noise vs Supply Voltage
0.5
0
–10
125
VS = ±15V
VCM = 0V
LT1028/1128 • TPC13
1.0
100
INPUT BIAS CURRENT (nA)
INPUT BIAS AND OFFSET CURRENTS (nA)
CHANGE IN OFFSET VOLTAGE (µV)
60
0
2
Input Bias and Offset Currents
Over Temperature
24
4
4
LT1028/1128 • TPC11
Warm-Up Drift
20
6
–8
LT1028/1128 • TPC10
VS = ±15V
TA = 25°C
VS = ±15V
TA = 25°C
t = 0 AFTER 1 DAY PRE-WARM UP
8
30
14
UNITS (%)
10
VS = ±15V
OFFSET VOLTAGE CHANGE (µV)
40
SHORT-CIRCUIT CURRENT (mA)
SINKING
SOURCING
16
Long-Term Stability of Five
Representative Units
50
VS = ±15V
TA = 25°C
800 UNITS TESTED
FROM FOUR RUNS
18
OFFSET VOLTAGE (µV)
20
Offset Voltage Drift with
Temperature of Representative Units
Distribution of Input Offset
Voltage
125°C
25°C
–50°C
3
2
0
1
TIME FROM OUTPUT SHORT TO GROUND (MINUTES)
LT1028/1128 • TPC18
LT1028/LT1128
U W
TYPICAL PERFOR A CE CHARACTERISTICS
70
160
60
60
70
50
50
40
40
LT1028
80
60
40
30
30
GAIN
20
20
10
20
10
VS = ±15V
TA = 25°C
CL = 10pF
0
0
–10
10k
10 100 1k 10k 100k 1M 10M 100M
FREQUENCY (Hz)
100k
1M
10M
FREQUENCY (Hz)
TYPICAL
PRECISION
OP AMP
VOLTAGE GAIN (dB)
LT1128
LT1028
0.01
70
80
60
60
70
50
50
40
40
30
30
20
20
GAIN
10
VS = ±15V
TA = 25°C
CL = 10pF
–10
10k
100
100k
1M
10M
FREQUENCY (Hz)
±20
LT`1028/1128 • TPC25
AV = –1, RS = 2k
30
AV = –10
RS = 200Ω
AV = –100, RS = 20Ω
0
10
TA = –55°C
10
1
0.1
VS = ±15V
TA = 25°C
VO = 10mVP-P
100
1000
CAPACITIVE LOAD (pF)
10000
LT1028/1128 • TPC 24
Maximum Undistorted Output
vs Frequency
PEAK-TO-PEAK OUTPUT VOLTAGE (V)
VOLTAGE GAIN (V/µV)
VOLTAGE GAIN (V/µV)
40
30
TA = 25°C
TA = 125°C
ILMAX = 35mA AT –55°C
= 27mA AT 25°C
= 16mA AT 125°C
1
CL
10
–10
100M
VS = ±15V
RL = 600Ω
–
+
20
100
TA = 25°C
10000
2k
RS
50
Voltage Gain vs Load Resistance
RL = 2k
100
1000
CAPACITIVE LOAD (pF)
LT1028/1128 • TPC23
Voltage Gain vs Supply Voltage
VS = ±15V
TA = 25°C
30pF
60
0
LT1028/1128 • TPC22
±5
±10
±15
SUPPLY VOLTAGE (V)
AV = –100
RS = 20Ω
10
70
0
GAIN ERROR = CLOSED-LOOP GAIN
OPEN-LOOP GAIN
0
AV = –10
RS = 200Ω
LT1128
Capacitance Load Handling
10
10
AV = –1, RS = 2k
30
LT1028/1128 • TPC21
PHASE
0.1
100
40
0
OVERSHOOT (%)
1
10
1
FREQUENCY (Hz)
CL
LT1128
Gain Phase vs Frequency
Gain Error vs Frequency
Closed-Loop Gain = 1000
0.1
+
50
10
–10
100M
–
LT1028/1128 • TPC20
LT1028/1128 • TPC19
0.001
2k
RS
20
0
PHASE MARGIN (DEGREES)
–20
0.01 0.1 1
30pF
60
OVERSHOOT (%)
100
LT1128
80
PHASE MARGIN (DEGREES)
VOLTAGE GAIN (dB)
VOLTAGE GAIN (dB)
120
70
PHASE
VS = ±15V
TA = 25°C
RL = 2k
140
GAIN ERROR (%)
LT1028
Capacitance Load Handling
LT1028
Gain, Phase vs Frequency
Voltage Gain vs Frequency
1
LOAD RESISTANCE (kΩ)
10
LT1028/1128 • TPC26
VS = ±15V
TA = 25°C
RL = 2k
25
20
15
LT1128
LT1028
10
5
10k
100k
1M
FREQUENCY (Hz)
10M
LT1028/1128 • TPC27
7
LT1028/LT1128
U W
TYPICAL PERFOR A CE CHARACTERISTICS
LT1028
Slew Rate, Gain-Bandwidth
Product Over Temperature
LT1028
Small-Signal Transient Response
LT1028
Large-Signal Transient Response
50mV
SLEW RATE (V/µs)
5V/DIV
90
VS = ±15V
17
20mV/DIV
10V
–10V
–50mV
1µs/DIV
AV = –1, RS = RF = 2k, C F = 15pF
0.2µs/DIV
AV = –1, RS = RF = 2k
CF = 15pF, C L = 80pF
80
GBW
16
FALL
70
15
RISE
60
14
50
13
40
12
–50 –25
GAIN-BANDWIDTH PRODUCT (fO = 20kHz), (MHz)
18
50
25
75
0
TEMPERATURE (˚C)
100
30
125
LT1028/1128 • TPC30
LT1128
Large-Signal Transient Response
LT1128
Slew Rate, Gain-Bandwidth
Product Over Temperature
LT1128
Small-Signal Transient Response
FALL
8
50mV
10V
7
SLEW RATE (V/µs)
0V
RISE
0V
–10V
–50mV
30
6
GBW
5
20
4
3
10
2
2µs/DIV
0.2µs/DIV
AV = +1, C L = 10pF
AV = –1, R S = RF = 2k, CF = 30pF
1
0
–50
–25
75
50
25
0
TEMPERATURE (°C)
100
125
GAIN-BANDWIDTH PRODUCT (fO = 200kHz), (MHz)
9
LT1028/1128 • TPC33
LT1128
Slew Rate, Gain-Bandwidth Product
vs Over-Compensation Capacitor
Closed-Loop Output Impedance
IO = 1mA
VS = ±15V
TA = 25°C
LT1028
0.1
LT1128
100
SLEW RATE
1
10
SLEW RATE (V/µs)
1
SLEW
GBW
10
1k
1
100
AV = +5
COC FROM PIN 5 TO PIN 6
VS = ±15V
TA = 25°C
LT1028
0.001
0.1
10
100
10k
1k
FREQUENCY (Hz)
100k
1M
LT1028/1128 • TPC34
8
GBW
10
1
1
100
1000
10000
10
OVER-COMPENSATION CAPACITOR (pF)
LT1028/1128 • TPC35
0.1
1
10
10
100
1000
10000
OVER-COMPENSATION CAPACITOR (pF)
LT1028/1128 • TPC36
GAIN AT 20kHz
AV = +1000
0.01
10k
LT1128
SLEW RATE (V/µs)
10
100
GAIN AT 200kHz
OUTPUT IMPEDANCE (Ω)
1k
100
100
LT1028
Slew Rate, Gain-Bandwidth Product
vs Over-Compensation Capacitor
LT1028/LT1128
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Common-Mode Limit Over
Temperature
Common-Mode Rejection Ratio
vs Frequency
V+
–3
VS = ±15V
–4
4
3
VS = ±5V TO ±15V
2
1
120
100
LT1128
80
60
40
20
V–
–50 –25
50
25
0
75
TEMPERATURE (°C)
0
125
100
LT1028
10
100k
10k
1k
FREQUENCY (Hz)
100
LT1028/1128 • TPC37
TOTAL HARMONIC DISTORTION (%)
AV = –1000
RL = 2k
AV = +1000
RL = 600Ω
VO = 20VP-P
VS = ±15V
TA = 25°C
40
20
1
100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
10
High Frequency Voltage Noise
vs Frequency
0.01
NON-INVERTING
GAIN
INVERTING
GAIN
0.001
MEASURED
EXTRAPOLATED
10
100
1k
10k
CLOSED LOOP GAIN
1.0
0.1
10k
0.0001
100
100k
100k
FREQUENCY (Hz)
1M
LT1028/1128 • TPC42
LT1028/1128 • TPC41
LT1128
Total Harmonic Distortion vs
Frequency and Load Resistance
LT1128
Total Harmonic Distortion vs
Closed-Loop Gain
1.0
AV = +1000
RL = 2k
TOTAL HARMONIC DISTORTION (%)
0.1
AV = +1000
RL = 600Ω
AV = –1000
RL = 2k
0.001
1.0
60
10
VO = 20VP-P
f = 1kHz
VS = ±15V
TA = 25°C
RL = 10k
LT1028/1128 • TPC40
TOTAL HARMONIC DISTORTION (%)
TOTAL HARMONIC DISTORTION (%)
AV = +1000
RL = 600Ω
0.01
POSITIVE
SUPPLY
80
LT1028/1128 • TPC39
0.1
AV = +1000
RL = 2k
0.1
NEGATIVE
SUPPLY
100
LT1028
Total Harmonic Distortion vs
Closed-Loop Gain
0.1
10
FREQUENCY (kHz)
120
LT1028/1128 • TPC38
LT1028
Total Harmonic Distortion vs
Frequency and Load Resistance
0.01
VS = ±15V
TA = 25°C
140
0
0.1
10M
1M
NOISE VOLTAGE DENSITY (nV/√Hz)
COMMON-MODE LIMIT (V)
REFERRED TO POWER SUPPLY
VS = ±5V
–2
160
VS = ±15V
TA = 25°C
POWER SUPPLY REJECTION RATIO (dB)
COMMON-MODE REJECTION RATIO (dB)
140
–1
0.001
1
Power Supply Rejection Ratio
vs Frequency
AV = +1000
RL = 600Ω
VO = 20VP-P
VS = ±15V
TA = 25°C
10
FREQUENCY (kHz)
100
LT1028/1128 • TPC43
VO = 20VP-P
f = 1kHz
VS = ±15V
TA = 25°C
RL = 10k
0.01
NON-INVERTING
GAIN
INVERTING
GAIN
0.001
MEASURED
EXTRAPOLATED
0.0001
10
100
1k
10k
CLOSED LOOP GAIN
100k
LT1028/1128 • TPC44
9
LT1028/LT1128
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APPLICATI
Voltage Noise vs Current Noise
The LT1028/LT1128’s less than 1nV/√Hz voltage noise is
three times better than the lowest voltage noise heretofore
available (on the LT1007/1037). A necessary condition for
such low voltage noise is operating the input transistors at
nearly 1mA of collector currents, because voltage noise is
inversely proportional to the square root of the collector
current. Current noise, however, is directly proportional to
the square root of the collector current. Consequently, the
LT1028/LT1128’s current noise is significantly higher
than on most monolithic op amps.
Therefore, to realize truly low noise performance it is
important to understand the interaction between voltage
noise (en), current noise (In) and resistor noise (rn).
Total Noise vs Source Resistance
The total input referred noise of an op amp is given by
et = [en2 + rn2 + (InReq)2]1/2
where Req is the total equivalent source resistance at the
two inputs, and
rn = √4kTReq = 0.13√Req in nV/√Hz at 25°C
As a numerical example, consider the total noise at 1kHz
of the gain 1000 amplifier shown below.
100Ω
The plot also shows that current noise is more dominant
at low frequencies, such as 10Hz. This is because resistor
noise is flat with frequency, while the 1/f corner of current
noise is typically at 250Hz. At 10Hz when Req > 1k, the
current noise term will exceed the resistor noise.
When the source resistance is unmatched, the total noise
versus unmatched source resistance plot should be consulted. Note that total noise is lower at source resistances
below 1k because the resistor noise contribution is less.
When RS > 1k total noise is not improved, however. This
is because bias current cancellation is used to reduce
input bias current. The cancellation circuitry injects two
correlated current noise components into the two inputs.
With matched source resistors the injected current noise
creates a common-mode voltage noise and gets rejected
by the amplifier. With source resistance in one input only,
the cancellation noise is added to the amplifier’s inherent
noise.
In summary, the LT1028/LT1128 are the optimum amplifiers for noise performance, provided that the source
resistance is kept low. The following table depicts which
op amp manufactured by Linear Technology should be
used to minimize noise, as the source resistance is increased beyond the LT1028/LT1128’s level of usefulness.
100k
–
100Ω
largest term, as in the example above, and the LT1028/
LT1128’s voltage noise becomes negligible. As Req is
further increased, current noise becomes important. At
1kHz, when Req is in excess of 20k, the current noise
component is larger than the resistor noise. The total noise
versus matched source resistance plot illustrates the
above calculations.
LT1028
LT1128
+
1028/1128 AI01
Best Op Amp for Lowest Total Noise vs Source Resistance
Req = 100Ω + 100Ω || 100k ≈ 200Ω
rn = 0.13√200 = 1.84nV√Hz
en = 0.85nV√Hz
In = 1.0pA/√Hz
et = [0.852 + 1.842 + (1.0 × 0.2) 2]1/2 = 2.04nV/√Hz
Output noise = 1000 et = 2.04µV/√Hz
At very low source resistance (Req < 40Ω) voltage noise
dominates. As Req is increased resistor noise becomes the
10
SOURCE RESISTANCE(Ω) (Note 1)
0 to 400
400 to 4k
4k to 40k
40k to 500k
500k to 5M
>5M
BEST OP AMP
AT LOW FREQ(10Hz)
WIDEBAND(1kHz)
LT1028/LT1128
LT1007/1037
LT1001
LT1012
LT1012 or LT1055
LT1055
LT1028/LT1128
LT1028/LT1128
LT1007/1037
LT1001
LT1012
LT1055
Note 1: Source resistance is defined as matched or unmatched, e.g.,
RS = 1k means: 1k at each input, or 1k at one input and zero at the other.
LT1028/LT1128
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APPLICATI
Noise Testing – Voltage Noise
The LT1028/LT1128's RMS voltage noise density can be
accurately measured using the Quan Tech Noise Analyzer,
Model 5173 or an equivalent noise tester. Care should be
taken, however, to subtract the noise of the source resistor
used. Prefabricated test cards for the Model 5173 set the
device under test in a closed-loop gain of 31 with a 60Ω
source resistor and a 1.8k feedback resistor. The noise of
this resistor combination is 0.13√58 = 1.0nV/√Hz. An
LT1028/LT1128 with 0.85nV/√Hz noise will read (0.852 +
1.02)1/2 = 1.31nV/√Hz. For better resolution, the resistors
should be replaced with a 10Ω source and 300Ω feedback
resistor. Even a 10Ω resistor will show an apparent noise
which is 8% to 10% too high.
The 0.1Hz to 10Hz peak-to-peak noise of the LT1028/
LT1128 is measured in the test circuit shown. The frequency response of this noise tester indicates that the
0.1Hz corner is defined by only one zero. The test time to
measure 0.1Hz to 10Hz noise should not exceed 10
seconds, as this time limit acts as an additional zero to
eliminate noise contributions from the frequency band
below 0.1Hz.
Measuring the typical 35nV peak-to-peak noise performance of the LT1028/LT1128 requires special test precautions:
(a) The device should be warmed up for at least five
minutes. As the op amp warms up, its offset voltage
changes typically 10µV due to its chip temperature
increasing 30°C to 40°C from the moment the power
supplies are turned on. In the 10 second measurement interval these temperature-induced effects can
easily exceed tens of nanovolts.
(b) For similar reasons, the device must be well shielded
from air current to eliminate the possibility of thermoelectric effects in excess of a few nanovolts, which
would invalidate the measurements.
(c) Sudden motion in the vicinity of the device can also
“feedthrough” to increase the observed noise.
A noise-voltage density test is recommended when measuring noise on a large number of units. A 10Hz noisevoltage density measurement will correlate well with a
0.1Hz to 10Hz peak-to-peak noise reading since both
results are determined by the white noise and the location
of the 1/f corner frequency.
0.1Hz to 10Hz Peak-to-Peak Noise
Tester Frequency Response
0.1Hz to 10Hz Noise Test Circuit
100
0.1µF
90
100k
2k
*
100Ω
+
4.7µF
+
22µF
4.3k
LT1001
–
2.2µF
100k
SCOPE
×1
RIN = 1M
110k
VOLTAGE GAIN = 50,000
* DEVICE UNDER TEST
NOTE ALL CAPACITOR VALUES ARE FOR
NONPOLARIZED CAPACITORS ONLY
24.3k
GAIN (dB)
80
–
70
60
50
40
0.1µF
30
0.01
1028/1128 AI02
0.1
1.0
10
FREQUENCY (Hz)
100
LT1028/1128 • AI03
11
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APPLICATI
Noise Testing – Current Noise
Current noise density (In) is defined by the following
formula, and can be measured in the circuit shown:
In =
10Hz current noise is not tested on every lot but it can be
inferred from 100% testing at 1kHz. A look at the current
noise spectrum plot will substantiate this statement. The
only way 10Hz current noise can exceed the guaranteed
limits is if its 1/f corner is higher than 800Hz and/or its
white noise is high. If that is the case then the 1kHz test will
fail.
[eno – (31 × 18.4nV/√Hz) ]
20k × 31
2
2 1/2
1.8k
10k
60Ω
10k
–
LT1028
LT1128
10Hz voltage noise density is sample tested on every lot.
Devices 100% tested at 10Hz are available on request for
an additional charge.
eno
Automated Tester Noise Filter
+
10
1028/1128 AI04
100% Noise Testing
The 1kHz voltage and current noise is 100% tested on the
LT1028/LT1128 as part of automated testing; the approximate frequency response of the filters is shown. The limits
on the automated testing are established by extensive
correlation tests on units measured with the Quan Tech
Model 5173.
–10
–20
CURRENT
NOISE
–30
–40
–50
100
1k
10k
100k
FREQUENCY (Hz)
LT1028/1128 • AI05
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1k
15V
General
The LT1028/LT1128 series devices may be inserted directly into OP-07, OP-27, OP-37, LT1007 and LT1037
sockets with or without removal of external nulling components. In addition, the LT1028/LT1128 may be fitted to
5534 sockets with the removal of external compensation
components.
Offset Voltage Adjustment
The input offset voltage of the LT1028/LT1128 and its drift
with temperature, are permanently trimmed at wafer testing to a low level. However, if further adjustment of VOS is
necessary, the use of a 1k nulling potentiometer will not
degrade drift with temperature. Trimming to a value other
12
VOLTAGE
NOISE
U
APPLICATI
0
NOISE FILTER LOSS (dB)
If the Quan Tech Model 5173 is used, the noise reading is
input-referred, therefore the result should not be divided
by 31; the resistor noise should not be multiplied by 31.
1
2
INPUT
3
–
8
LT1028
LT1128
+
7 6
OUTPUT
4
–15V
1028/1128 AI06
than zero creates a drift of (VOS/300)µV/°C, e.g., if VOS is
adjusted to 300µV, the change in drift will be 1µV/°C.
The adjustment range with a 1k pot is approximately
±1.1mV.
Offset Voltage and Drift
Thermocouple effects, caused by temperature gradients
across dissimilar metals at the contacts to the input
LT1028/LT1128
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S I FOR ATIO
terminals, can exceed the inherent drift of the amplifier
unless proper care is exercised. Air currents should be
minimized, package leads should be short, the two input
leads should be close together and maintained at the same
temperature.
The circuit shown to measure offset voltage is also used
as the burn-in configuration for the LT1028/LT1128.
Test Circuit for Offset Voltage
and Offset Voltage Drift with Temperature
10k*
15V
2
200Ω*
3
10k*
–
7
LT1028
LT1128
+
6
VO
Frequency Response
The LT1028’s Gain, Phase vs Frequency plot indicates that
the device is stable in closed-loop gains greater than +2 or
–1 because phase margin is about 50° at an open-loop
gain of 6dB. In the voltage follower configuration phase
margin seems inadequate. This is indeed true when the
output is shorted to the inverting input and the noninverting input is driven from a 50Ω source impedance. However, when feedback is through a parallel R-C network
(provided CF < 68pF), the LT1028 will be stable because of
interaction between the input resistance and capacitance
and the feedback network. Larger source resistance at the
noninverting input has a similar effect. The following
voltage follower configurations are stable:
33pF
4
–15V
VO = 100VOS
* RESISTORS MUST HAVE LOW
THERMOELECTRIC POTENTIAL
2k
1028/1128 AI08
–
–
LT1028
Unity-Gain Buffer Applications (LT1128 Only)
When RF ≤ 100Ω and the input is driven with a fast, largesignal pulse (>1V), the output waveform will look as
shown in the pulsed operation diagram.
RF
–
OUTPUT
6V/µs
+
1028/1128 AI07
During the fast feedthrough-like portion of the output, the
input protection diodes effectively short the output to the
input and a current, limited only by the output short-circuit
protection, will be drawn by the signal generator. With RF
≥ 500Ω, the output is capable of handling the current
requirements (IL ≤ 20mA at 10V) and the amplifier stays
in its active mode and a smooth transition will occur.
As with all operational amplifiers when RF > 2k, a pole will
be created with RF and the amplifier’s input capacitance,
creating additional phase shift and reducing the phase
margin. A small capacitor (20pF to 50pF) in parallel with RF
will eliminate this problem.
500Ω
+
50Ω
LT1028
+
50Ω
1028/1128 AI09
Another configuration which requires unity-gain stability
is shown below. When CF is large enough to effectively
short the output to the input at 15MHz, oscillations can
occur. The insertion of RS2 ≥ 500Ω will prevent the
LT1028 from oscillating. When RS1 ≥ 500Ω, the additional
noise contribution due to the presence of RS2 will be
minimal. When RS1 ≤ 100Ω, RS2 is not necessary, because RS1 represents a heavy load on the output through
the CF short. When 100Ω < RS1 < 500Ω, RS2 should match
RS1 . For example, RS1 = RS2 = 300Ω will be stable. The
noise increase due to RS2 is 40%.
C1
R1
RS1
RS2
–
LT1028
+
1028/1128 AI10
13
LT1028/LT1128
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If CF is only used to cut noise bandwidth, a similar effect
can be achieved using the over-compensation terminal.
The Gain, Phase plot also shows that phase margin is
about 45° at gain of 10 (20dB). The following configura-
tion has a high (≈70%) overshoot without the 10pF
capacitor because of additional phase shift caused by the
feedback resistor – input capacitance pole. The presence
of the 10pF capacitor cancels this pole and reduces
overshoot to 5%.
10pF
Over-Compensation
10k
1.1k
The LT1028/LT1128 are equipped with a frequency overcompensation terminal (pin 5). A capacitor connected
between pin 5 and the output will reduce noise bandwidth.
Details are shown on the Slew Rate, Gain-Bandwidth
Product vs Over-Compensation Capacitor plot. An additional benefit is increased capacitive load handling capability.
–
LT1028
+
50Ω
1028/1128 AI11
UO
TYPICAL APPLICATI
Strain Gauge Signal Conditioner with Bridge Excitation
Low Noise Voltage Regulator
28V
LT1021-5
3
5.0V
+
7
–
121Ω
330Ω
LT317A
LT1128
2
6
10
4
REFERENCE
OUTPUT
+
330Ω
LT1028
3
301k*
15V
–
+
–
7
LT1028
10k
ZERO
TRIM
2
+
4
4
–15V
*RN60C FILM RESISTORS
6
2N6387
–
6
0V TO 10V
OUTPUT
1µF
30.1k*
5k
GAIN
TRIM
49.9Ω*
1000pF
20V OUTPUT
2k
–15V
7
LT1028
14
1k
LT1021-10
15V
350Ω
BRIDGE
2
2.3k
PROVIDES PRE-REG
AND CURRENT
LIMITING
28V
–15V
3
10
+
15V
2k
1028/1128 TA04
330Ω
THE LT1028’s NOISE CONTRIBUTION IS NEGLIGIBLE
COMPARED TO THE BRIDGE NOISE.
1028/1128 TA05
LT1028/LT1128
UO
TYPICAL APPLICATI
Paralleling Amplifiers to Reduce Voltage Noise
Phono Preamplifier
10Ω
+
1.5k
A1
LT1028
787Ω
15V
–
7.5Ω
2
470Ω
4.7k
+
1.5k
A2
LT1028
7.5Ω
+
–15V
ALL RESISTORS METAL FILM
MAG PHONO
INPUT
1028/1128 TA06
1.5k
An
LT1028
Tape Head Amplifier
–
7.5Ω
OUTPUT
4
OUTPUT
+
470Ω
+
47k
LT1028
0.33µF
6
LT1028
3
–
–
10k
7
–
100pF
0.1µF
0.1µF
470Ω
499Ω
31.6k
1.ASSUME VOLTAGE NOISE OF LT1028 AND 7.5 Ω SOURCE RESISTOR = 0.9nV/√Hz.
2.GAIN WITH n LT1028s IN PARALLEL = n × 200.
3.OUTPUT NOISE = √n × 200 × 0.9nV/√Hz.
0.9
4.INPUT REFERRED NOISE = OUTPUT NOISE =
nV/ √Hz.
n × 200
√n
5.NOISE CURRENT AT INPUT INCREASES √n TIMES.
2µV
6.IF n = 5, GAIN = 1000, BANDWIDTH = 1MHz, RMS NOISE, DC TO 1MHz =
= 0.9 µV.
√5
10Ω
2
TAPE HEAD
INPUT
3
–
6
LT1028
1028/1128 TA03
OUTPUT
+
ALL RESISTORS METAL FILM
1028/1128 TA07
Low Noise, Wide Bandwidth Instrumentation Amplifier
–INPUT
Gyro Pick-Off Amplifier
+
300Ω
10k
LT1028
–
820Ω
GYRO TYPICAL–
NORTHROP CORP.
GR-F5AH7-5B
68pF
SINE
DRIVE
50Ω
10Ω
+
–
820Ω
–
68pF
300Ω
LT1028
+INPUT
LT1028
OUTPUT
•
–
+
OUTPUT TO SYNC
DEMODULATOR
LT1028
1k
+
10k
GAIN = 1000, BANDWIDTH = 1MHz
INPUT REFERRED NOISE = 1.5nV/√Hz AT 1kHz
WIDEBAND NOISE –DC to 1MHz = 3µVRMS
IF BW LIMITED TO DC TO 100kHz = 0.55µVRMS
100Ω
1028/1128 TA09
1028/1128 TA08
15
LT1028/LT1128
UO
TYPICAL APPLICATI
Chopper-Stabilized Amplifier
Super Low Distortion Variable Sine Wave Oscillator
R1
C1
0.047
20Ω
C2
0.047
2k
15V
1N758
3
20Ω
2k
(
LT1028
R2
–
5.6k
2.4k
+
2
)
8
–
4
1
0.1
0.1
0.01
LT1004-1.2V
10pF
6
LT1052
1VRMS OUTPUT
1.5kHz TO 15kHz
1
f=
2πRC
WHERE R1C1 = R2C2
4.7k
15V
+
7
1N758
15V
22k
–15V
15µF
+
10k
–
2N4338
100k
130Ω
100k
MOUNT 1N4148s
IN CLOSE PROXIMITY
68Ω
1
3
INPUT
8
LT1028
2
+
20k
TRIM FOR
LOWEST
DISTORTION
7
+
LT1055
560Ω
30k
–
10k
OUTPUT
4
10k
–15V
<0.0018% DISTORTION AND NOISE.
MEASUREMENT LIMITED BY RESOLUTION OF
HP339A DISTORTION ANALYZER
10Ω
1028/1128 TA10
1028/1128 TA11
Low Noise Infrared Detector
5V
10Ω
+
100µF
1k
33Ω
SYNCHRONOUS
DEMODULATOR
+
100µF
10k*
OPTICAL
CHOPPER
WHEEL
267Ω
+
39Ω
PHOTOELECTRIC
PICK-OFF
5V
5V
1000µF
3
IR
RADIATION
10k*
2
7
+
6
LT1028
2
1/4 LTC1043
4
12
10k
–5V
INFRA RED ASSOCIATES, INC.
HgCdTe IR DETECTOR
13Ω AT 77°K
LM301A
13
8
–
3
–
1
16
–5V
5V
6
2
8
1M
30pF
7
+
LT1012
3
4
14
10Ω
7
+
–
6
DC OUT
8
1
4
–5V
1028/1128 TA12
16
LT1028/LT1128
W
W
SCHE ATIC DIAGRA
NULL
8
R5
130Ω
NULL
1
V+
7
R6
130Ω
Q4
R2
3k
R1
3k
1.1mA
2.3mA
400µA
C1
257pF
500µA
Q17
R10
400Ω
Q16
900µA
R11
400Ω
Q19
R10 C2
500Ω
Q18
900µA
Q26
Q6
Q5
3
3
1
1
Q11
NONINVERTING
INPUT
Q8
Q7
R11
100Ω
Q9
C3
250pF
4.5µA
3
Q10
4.5µA
Q22
Q24
4.5µA
4.5µA
Q1
Q2
Q25
OUTPUT
6
1.5µA
Q12
R12
240Ω
Q13
C4
35pF
Q14
Q27
1.5µA
INTERVING
INPUT
2
0
1.8mA
BIAS
Q3
300µA
Q15
Q23
Q21
R7
80Ω
R8
480Ω
600µA
Q20
V–
4
C2 = 50pF for LT1028
C2 = 275pF for LT1128
5
OVERCOMP
1028/1128 TA13
17
LT1028/LT1128
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
J8 Package
8-Lead Ceramic DIP
0.200
(5.080)
MAX
0.290 – 0.320
(7.366 – 8.128)
0.015 – 0.060
(0.381 – 1.524)
0.008 – 0.018
(0.203 – 0.460)
0.005
(0.127)
MIN
0.405
(10.287)
MAX
8
6
7
5
0.025
(0.635)
RAD TYP
0.220 – 0.310
(5.588 – 7.874)
0° – 15°
1
0.038 – 0.068
(0.965 – 1.727)
0.385 ± 0.025
(9.779 ± 0.635)
0.125
3.175
0.100 ± 0.010 MIN
(2.540 ± 0.254)
0.014 – 0.026
(0.360 – 0.660)
TJMAX
θJA
165°C
100°C/W
2
3
4
0.055
(1.397)
MAX
N8 Package
8-Lead Plastic DIP
0.300 – 0.320
(7.620 – 8.128)
(
0.130 ± 0.005
(3.302 ± 0.127)
0.045 – 0.065
(1.143 – 1.651)
8
+0.025
0.325 –0.015
0.125
(3.175)
MIN
0.045 ± 0.015
(1.143 ± 0.381)
)
TJMAX
θJA
130°C
130°C/W
0.020
(0.508)
MIN
1
2
4
3
0.189 – 0.197
(4.801 – 5.004)
8
0.053 – 0.069
(1.346 – 1.752)
7
6
5
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
18
5
0.018 ± 0.003
(0.457 ± 0.076)
0.100 ± 0.010
(2.540 ± 0.254)
0.010 – 0.020
× 45°
(0.254 – 0.508)
0.016 – 0.050
0.406 – 1.270
6
0.250 ± 0.010
(6.350 ± 0.254)
S8 Package
8-Lead Plastic SOIC
0°– 8° TYP
7
0.065
(1.651)
TYP
0.009 – 0.015
(0.229 – 0.381)
+0.635
8.255
–0.381
0.400
(10.160)
MAX
0.050
(1.270)
BSC
0.014 – 0.019
(0.355 – 0.483)
TJMAX
θJA
135°C
140°C/W
0.228 – 0.244
(5.791 – 6.197)
0.150 – 0.157
(3.810 – 3.988)
1
2
3
4
LT1028/LT1128
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
S Package
16-Lead Plastic SOL
0.398 – 0.413
(10.109 – 10.490)
0.291 – 0.299
(7.391 – 7.595)
0.005
(0.127)
RAD MIN
16
0.037 – 0.045
(0.940 – 1.143)
0.093 – 0.104
(2.362 – 2.642)
0.010 – 0.029 × 45°
(0.254 – 0.737)
15
14
13
12
11
10
9
0° – 8° TYP
0.394 – 0.419
(10.007 – 10.643)SOL16
SEE NOTE
0.009 – 0.013
(0.229 – 0.330)
0.050
(1.270)
TYP
SEE NOTE
0.016 – 0.050
(0.406 – 1.270)
0.004 – 0.012
(0.102 – 0.305)
0.014 – 0.019
(0.356 – 0.482)
TYP
NOTE:
PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS.
1
T JMAX
θJA
140°C
130°C/W
H Package
8-Lead TO-5 Metal Can
0.027 – 0.045
(0.686 – 1.143)
45°TYP
0.027 – 0.034
(0.686 – 0.864)
8
1
4
6
3
0.040
(1.016)
MAX
0.200 – 0.230
(5.080 – 5.842)
BSC
0.110 – 0.160
(2.794 – 4.064)
INSULATING
STANDOFF
5
6
0.050
(1.270)
MAX
SEATING
PLANE
7
8
0.165 – 0.185
(4.191 – 4.699)
GAUGE
PLANE
0.010 – 0.045
(0.254 – 1.143)
5
4
0.335 – 0.370
(8.509 – 9.398)
DIA
0.305 – 0.335
(7.747 – 8.509)
2
3
7
2
REFERENCE
PLANE
0.500 – 0.750
(12.70 – 19.05)
0.016 – 0.021
(0.406 – 0.533)
TYP
TJMAX
NOTE: LEAD DIAMETER IS UNCONTROLLED BETWEEN
THE REFERENCE PLANE AND SEATING PLANE.
175°C
θJA
θJC
140°C/W 40°C/W
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LT1028/LT1128
U.S. Area Sales Offices
NORTHEAST REGION
Linear Technology Corporation
One Oxford Valley
2300 E. Lincoln Hwy.,Suite 306
Langhorne, PA 19047
Phone: (215) 757-8578
FAX: (215) 757-5631
CENTRAL REGION
Linear Technology Corporation
Chesapeake Square
229 Mitchell Court, Suite A-25
Addison, IL 60101
Phone: (708) 620-6910
FAX: (708) 620-6977
SOUTHEAST REGION
Linear Technology Corporation
17060 Dallas Parkway
Suite 208
Dallas, TX 75248
Phone: (214) 733-3071
FAX: (214) 380-5138
SOUTHWEST REGION
Linear Technology Corporation
22141 Ventura Blvd.
Suite 206
Woodland Hills, CA 91364
Phone: (818) 703-0835
FAX: (818) 703-0517
NORTHWEST REGION
Linear Technology Corporation
782 Sycamore Dr.
Milpitas, CA 95035
Phone: (408) 428-2050
FAX: (408) 432-6331
International Sales Offices
FRANCE
Linear Technology S.A.R.L.
Immeuble "Le Quartz"
58 Chemin de la Justice
92290 Chatenay Mallabry
France
Phone: 33-1-46316161
FAX: 33-1-46314613
KOREA
Linear Technology Korea Branch
Namsong Building, #505
Itaewon-Dong 260-199
Yongsan-Ku, Seoul
Korea
Phone: 82-2-792-1617
FAX: 82-2-792-1619
TAIWAN
Linear Technology Corporation
Rm. 801, No. 46, Sec. 2
Chung Shan N. Rd.
Taipei, Taiwan, R.O.C.
Phone: 886-2-521-7575
FAX: 886-2-562-2285
GERMANY
Linear Techonolgy GMBH
Untere Hauptstr. 9
D-8057 Eching
Germany
Phone: 49-89-3197410
FAX: 49-89-3194821
SINGAPORE
Linear Technology Pte. Ltd.
101 Boon Keng Road
#02-15 Kallang Ind. Estates
Singapore 1233
Phone: 65-293-5322
FAX: 65-292-0398
UNITED KINGDOM
Linear Technology (UK) Ltd.
The Coliseum, Riverside Way
Camberley, Surrey GU15 3YL
United Kingdom
Phone: 44-276-677676
FAX: 44-276-64851
JAPAN
Linear Technology KK
4F Ichihashi Building
1-8-4 Kudankita Chiyoda-Ku
Tokyo, 102 Japan
Phone: 81-3-3237-7891
FAX: 81-3-3237-8010
World Headquarters
Linear Technology Corporation
1630 McCarthy Blvd.
Milpitas, CA 95035-7487
Phone: (408) 432-1900
FAX: (408) 434-0507
07/10/92
20
Linear Technology Corporation
LT/GP 0792 10K REV 0
1630 McCarthy Blvd., Milpitas, CA 95035-7487
(408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977
 LINEAR TECHNOLOGY CORPORATION 1992