LM5134 Single 7.6A Peak Current Low-Side Gate Driver with a PILOT Output General Description Features The LM5134 is a high-speed single low-side driver capable of sinking and sourcing 7.6A/4.5A peak currents. The LM5134 has inverting and non-inverting inputs that give the user greater flexibility in controlling the FET. The LM5134 features one main output, OUT, and an extra gate drive output, PILOT. The PILOT pin logic is complementary to the OUT pin, and can be used to drive a small MOSFET located close to the main power FET. This configuration minimizes the turn-off loop and reduces the consequent parasitic inductance. It is particularly useful for driving high-speed FETs or multiple FETs in parallel. The LM5134 is available in the SOT23 6-pin package and the LLP-6 package with an exposed pad to aid thermal dissipation. ● ● ● ● Typical Applications 7.6A/4.5A peak sink/source drive current for main output 820mA/660mA peak sink/source current for PILOT output +4V to +12.6V single power supply Matching delay time between inverting and non–inverting inputs ● TTL/CMOS logic inputs ● Up to +14V logic inputs (regardless of VDD voltage) ● -40°C to 125°C junction temperature range Package ● SOT23-6 ● LLP-6 (3mm x 3mm) ● Motor Drive ● Solid-State Power Controller ● Power Factor Correction Converter Block Diagram 30192803 FIGURE 1. Block Diagram PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. 301928 SNVS808A Copyright © 1999-2012, Texas Instruments Incorporated LM5134 Input/Output Options Base Part Number Logic Input LM5134A CMOS LM5134B TTL Truth Table IN INB OUT PILOT L L L H L H L H H L H L H H L H Connection Diagram 30192802 Ordering Information 2 Order Number Package Type Package Drawing Supplied As LM5134AMF SOT23-6 MF06A 1000 Units / Tape & Reel LM5134AMFX SOT23-6 MF06A 3000 Units / Tape & Reel LM5134BMF SOT23-6 MF06A 1000 Units / Tape & Reel LM5134BMFX SOT23-6 MF06A 3000 Units / Tape & Reel LM5134ASD LLP-6 SDE06A 1000 Units / Tape & Reel LM5134ASDX LLP-6 SDE06A 4500 Units / Tape & Reel LM5134BSD LLP-6 SDE06A 1000 Units / Tape & Reel LM5134BSDX LLP-6 SDE06A 4500 Units / Tape & Reel Copyright © 1999-2012, Texas Instruments Incorporated LM5134 Pin Descriptions Pin No. Name Description Applications Information 1 VDD Gate drive supply Locally decouple to VSS using low ESR/ESL capacitor located as close as possible to the IC. 2 PILOT 3 OUT Gate drive output for Connect to the gate of the power FET with a short, low inductance path. A gate the power FET resistor can be used to eliminate potential gate oscillations. 4 VSS Ground All signals are referenced to this ground. 5 INB Inverting logic input Connect to VSS when not used. 6 IN Non-inverting logic input Connect to VDD when not used. EP EP Exposed Pad It is recommended that the exposed pad on the bottom of the package be soldered to ground plane on the PC board, and that ground plane extend out from beneath the IC to help dissipate heat. Gate drive output for Connect to the gate of a small turn-off MOSFET with a short, low inductance path. an external turn-off The turn-off FET provides a local turn-off path. FET Copyright © 1999-2012, Texas Instruments Incorporated 3 LM5134 Absolute Maximum Ratings (Note 1) VDD to VSS IN, INB to VSS Storage Temperature Range Junction Temperature ESD Rating HBM −0.3V to 14V −0.3V to 14V −55°C to +150°C +150°C 2kV Recommended Operating Conditions VDD Operating Junction Temperature +4.0V to 12.6V −40°C to +125°C Electrical Characteristics Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C to +125°C. Minimum and Maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise specified, VDD = +12V (Note 2). Symbol Parameter Conditions Min VDD Rising 3.25 Typ Max Units 12.6 V 4.00 V POWER SUPPLY VDD UVLO VDD Operating Voltage VDD Undervoltage Lockout 4.0 VDD Undervoltage Lockout Hysteresis IDD 3.6 0.36 V ns VDD Undervoltage lockout to Main output delay time VDD Rising 500 VDD Quiescent Current IN = INB = VDD 0.8 2 mA VDD = 10V, IOUT = -100mA 0.15 0.45 Ω VDD = 4.5V, IOUT = -100mA 0.2 0.5 Ω VDD = 10V, IOUT = -100mA 0.2 0.5 Ω VDD = 4.5V, IOUT = -100mA 0.25 0.55 Ω Power-off Pull Down Resistance VDD = 0V, IOUT = -10mA 1.5 10 Ω Power-off Pull Down Clamp Voltage VDD = 0V, IOUT = -10mA 0.7 1.0 V Peak Sink Current CL = 10,000pF 7.6 VDD = 10V, IOUT = 50mA 0.7 1.3 Ω VDD = 4.5V, IOUT = 50mA 1 1.9 Ω VDD = 10V, IOUT = 50mA 0.75 1.2 Ω VDD = 4.5V, IOUT = 50mA 1.14 1.85 Ω Peak Source Current CL = 10,000pF 4.5 PILOT Output Resistance – Pulling Down VDD = 10V,IOUT = -100mA 3.7 9 VDD = 4.5V, IOUT = -100mA 4.7 12 Peak Sink Current CL = 330pF 820 OUTPUT RON-DW (SOT23-6) Main output Resistance – Pulling Down RON-DW (LLP) Main output Resistance – Pulling Down RON-UP (SOT23-6) Main output Resistance - Pulling Up RON-UP (LLP) Main output Resistance - Pulling Up A A PILOT RONP-DW RONP-UP PILOT output Resistance – Pulling Up Peak Source Current Ω Ω mA VDD = 10V, IOUT = 50mA 6 11 VDD = 4.5V, IOUT = 50mA 10.7 20 CL = 330pF 660 Ω Ω mA LOGIC INPUT VIH VIL 4 Logic 1 Input Voltage Logic 0 Input Voltage LM5134A 0.67x VDD V LM5134B 2.4 V LM5134A 0.33x VDD V LM5134B 0.8 V Copyright © 1999-2012, Texas Instruments Incorporated LM5134 Symbol VHYS Parameter Logic-Input Hysteresis Logic-Input Current Conditions Min Typ LM5134A 0.9 LM5134B 0.68 INB = VDD or 0 0.001 Max Units V 10 µA THERMAL RESISTANCE θJA Junction to Ambient SOT23-6 90 °C/W LLP-6 60 °C/W CL = 1000pF 3 ns CL = 5000pF 10 ns CL = 10,000pF 20 ns CL = 1000pF 2 ns CL = 5000pF 4.7 ns CL = 10,000pF 7.2 ns SWITCHING CHARACTERISTICS FOR VDD = +10V tR tF OUT Rise Time OUT Fall Time tD-ON OUT Turn-On Propagation Delay CL = 1000pF 17 40 ns tD-OFF OUT Turn-Off Propagation Delay CL = 1000pF 12 25 ns Main Output Break-Before-Make Time 2.5 ns PILOT Rise Time CL = 330pF 5.3 ns PILOT Fall Time CL = 330pF 3.9 ns tPD-ON OUT Turn-Off to PILOT Turn-On Propagation Delay CL = 330pF 4.2 ns tPD-OFF PILOT Turn-Off to OUT Turn-On Propagation Delay CL = 330pF 6.4 ns CL = 1000pF 5 ns CL = 5000pF 14 ns CL = 10,000pF 24 ns CL = 1000pF 2.3 ns CL = 5000pF 5.4 ns CL = 10,000pF 7.2 ns tPR tPF SWITCHING CHARACTERISTICS FOR VDD = +4.5V tR tF Rise Time Fall Time tD-ON OUT Turn-On Propagation Delay CL = 1000pF 26 50 ns tD-OFF OUT Turn-Off Propagation Delay CL = 1000pF 20 45 ns 4.2 ns tPR Main output Break-Before-Make Time PILOT Rise Time CL = 330pF 9.6 ns tPf PILOT Fall Time CL = 330pF 3.7 ns tPD-ON OUT Turn-Off to PILOT Turn-On Propagation Delay CL = 330pF 7.5 ns tPD-OFF PILOT Turn-Off to OUT Turn-On Propagation Delay CL = 330pF 11.8 ns Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but does not guarantee specific performance limits. For guaranteed specifications and conditions, see the Electrical Characteristics. Note 2: Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate Average Outgoing Quality Level (AOQL). Copyright © 1999-2012, Texas Instruments Incorporated 5 LM5134 Timing Diagram 30192805 6 30192806 Copyright © 1999-2012, Texas Instruments Incorporated LM5134 Typical Performance Characteristics OUT Source Current vs. OUT Voltage 30192807 OUT Peak Source Current vs. VDD Voltage 30192809 PILOT Source Current vs. PILOT Voltage 30192811 Copyright © 1999-2012, Texas Instruments Incorporated OUT Sink Current vs. OUT Voltage 30192808 OUT Peak Sink Current vs. VDD Voltage 30192810 PILOT Sink Current vs. PILOT Voltage 30192812 7 LM5134 PILOT Peak Source Current vs. VDD Voltage PILOT Peak Sink Current vs. VDD Voltage 30192813 OUT Turn-On Propagation Delay vs. VDD 30192814 OUT Turn-Off Propagation Delay vs. VDD 30192815 OUT Turn-Off to PILOT Turn-On Propagation Delay vs. VDD PILOT Turn-Off to OUT Turn-On Propagation Delay vs. VDD 30192817 8 30192816 30192818 Copyright © 1999-2012, Texas Instruments Incorporated LM5134 Supply Current vs. OUT Capacitive Load 30192826 Supply Current vs. Frequency Supply Current vs. PILOT Capacitive Load 30192827 Quiescent Current vs. Temperature 30192828 30192829 LM5134A Input Threshold vs. Temperature LM5134A Input Threshold vs. Temperature 30192830 30192831 Copyright © 1999-2012, Texas Instruments Incorporated 9 LM5134 LM5134B Input Threshold vs. Temperature LM5134B Input Threshold vs. Temperature 30192832 30192834 UVLO Threshold vs. Temperature 30192835 10 Copyright © 1999-2012, Texas Instruments Incorporated LM5134 Detailed Operating Description The LM5134 is a single low-side gate driver with one main output, OUT, and a complementary output PILOT. The OUT pin has high 7.6A/4.5A peak sink/source current and can be used to drive large power MOSFETs or multiple MOSFETs in parallel. The PILOT pin has 820mA/660mA peak sink/source current, and is intended to drive an external turn-off MOSFET, as shown in Figure 1. The external turn-off FET can be placed close to the power MOSFETs to minimize the loop inductance, and therefore helps eliminate stray inductance induced oscillations or undesired turn-on. This feature also provides the flexibility to adjust turn-on and turn-off speed independently. When using the external turn-off switch, it is important to prevent the potential shoot-through between the external turn-off switch and the LM5134 internal pull-up switch. The propagation delay, TPD-ON and TPD-OFF, has been implemented in the LM5134 between the PILOT and the OUT pins, as depicted in the timing diagram. The turn-on delay TPD-ON is designed to be shorter than the turnoff delay TPD-OFF because the rising time of the external turn-off switch can attribute to the additional delay time. It is also desirable to minimize TPD-ON to favor the fast turn-off of the power MOSFET. The LM5134 offers both inverting and non-inverting inputs to satisfy requirements for inverting and non-inverting gate drive signals in a single device type. Inputs of the LM5134 are TTL and CMOS Logic compatible and can withstand input voltages up to 14V regardless of the VDD voltage. This allows inputs of the LM5134 to be connected directly to most PWM controllers. The LM5134 includes an Under-voltage Lockout (UVLO) circuit. When the VDD voltage is below the UVLO threshold voltage, the IN and INB inputs are ignored, and if there is sufficient VDD voltage, the OUT is pulled low. In addition, the LM5134 has an internal PNP transistor in parallel with the output NMOS. Under the UVLO condition, the PNP transistor will be on and clamp the OUT voltage below 1V. This feature ensures the OUT remains low even with insufficient VDD voltage. Application Information PILOT MOSFET Selection In general, a small sized 20V MOSFET with logic level gates can be used as the external turn-off switch. To achieve a fast switching speed and avoid the potential shoot-through, it is suggested to select a MOSFET with the total gate charge less than 3nC. It is good practice to verify that no shoot-through occurs for the entire operating temperature range. In addition, a small Rds(on) is preferred to obtain the strong sink current capability. The power losses of the PILOT MOSFET can be estimated as: where Qgo is the total input gate charge of the power MOSFET. Power Dissipation It is important to keep the power consumption of the driver below the maximum power dissipation limit of the package at the operating temperature. The total power dissipation of the LM5134 is the sum of the gate charge losses and the losses in the driver due to the internal CMOS stages used to buffer the output as well as the power losses associated with the quiescent current. The gate charge losses include the power MOSFET gate charge losses as well as the PILOT FET gate charge losses and can be calculated as follows: Or where Fsw is switching frequency, Qgo is the total input gate charge of the power MOSFET, Qgp is the total input gate charge of the PILOT MOSFET. Co and Cp are the load capacitance at OUT and PILOT outputs respectively. It should be noted that due to the use of an external turn-off switch, part of the gate charge losses are dissipated in the external turn-off switch. Therefore, the actual gate charge losses dissipated in the LM5134 is less than predicted by the above expressions. However, they are a good conservative design estimate. The power dissipation associated with the internal circuit operation of the driver can be estimated with the characterization curves of the LM5134. For a given ambient temperature, the maximum allowable power losses of the IC can be defined as: Copyright © 1999-2012, Texas Instruments Incorporated 11 LM5134 where P is the total power dissipation of the driver. Layout Considerations Attention must be given to board layout when using LM5134. Some important considerations include: 1. The first priority in designing the layout of the driver is to confine the high peak currents that charge and discharge the FETs gate into a minimal physical area. This will decrease the loop inductance and minimize noise issues on the gate. 2. To reduce the loop inductance, the driver should be placed as close as possible to the FETs. The gate trace to and from the FETs are recommended to be placed closely side by side, or directly on top of one another. 3. A low ESR/ESL ceramic capacitor must be connected close to the IC, between VDD and VSS pins to support the high peak current being drawn from VDD during turn-on of the FETs. It is most desirable to place the VDD decoupling capacitor on the same side of the PC board as the driver. The inductance of via holes can impose excessive ringing on the IC pins. 4. The parasitic source inductance, along with the gate capacitor and the driver pull-down path, can form a LCR resonant tank, resulting in gate voltage oscillations. An optional resistor or ferrite bead can be used to damp the ringing. 12 Copyright © 1999-2012, Texas Instruments Incorporated LM5134 Physical Dimensions inches (millimeters) unless otherwise noted SOT23-6 Outline Drawing NS Package Number MF06A LLP-6 Outline Drawing NS Package Number SDE06A Copyright © 1999-2012, Texas Instruments Incorporated 13 Notes Copyright © 1999-2012, Texas Instruments Incorporated IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. 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