Microchip MCP6401RT-E/SL 1 mhz, 45 î¼a op amp Datasheet

MCP6401/1R/1U/2/4
1 MHz, 45 µA Op Amps
Features
Description
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The Microchip Technology Inc. MCP6401/1R/1U/2/4
family of operational amplifiers (op amps) has low
quiescent current (45 µA, typical) and rail-to-rail input
and output operation. This family is unity gain stable
and has a gain bandwidth product of 1 MHz (typical).
These devices operate with a single supply voltage as
low as 1.8V. These features make the family of op
amps well suited for single-supply, battery-powered
applications.
Low Quiescent Current: 45 µA (typical)
Gain Bandwidth Product: 1 MHz (typical)
Rail-to-Rail Input and Output
Supply Voltage Range: 1.8V to 6.0V
Unity Gain Stable
Extended Temperature Range: -40°C to +125°C
No Phase Reversal
Applications
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The MCP6401/1R/1U/2/4 family is designed with
Microchip’s advanced CMOS process and offered in
single packages. All devices are available in the
extended temperature range, with a power supply
range of 1.8V to 6.0V.
Portable Equipment
Battery Powered System
Medical Instrumentation
Data Acquisition Equipment
Sensor Conditioning
Supply Current Sensing
Analog Active Filters
Package Types
MCP6401
SC70-5, SOT-23-5
Design Aids
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VOUT 1
SPICE Macro Models
FilterLab® Software
Mindi™ Circuit Designer and Simulator
Microchip Advanced Part Selector (MAPS)
Analog Demonstration and Evaluation Boards
Application Notes
Typical Application
R2
D2
VIN
5 VDD
VSS 2
VOUT
MCP6401
VIN+ 3
4 VIN–
MCP6402
8 VDD
VINA– 2
7 VOUTB
VSS 2
VINA+ 3
6 VINB–
VIN– 3
VSS 4
5 VINB+
VOUTA 1
VSS 4
Precision Half-Wave Rectifier
VIN+ 3
VOUTA 1
VINA+ 3
5 VSS
VIN+ 1
5 VDD
4 VOUT
MCP6404
SOIC, TSSOP
8 VDD
EP
9
4 VIN–
MCP6401U
SOT-23-5
SOIC
VINA– 2
D1
VOUT 1
VDD 2
MCP6402
2x3 TDFN
R1
© 2010 Microchip Technology Inc.
MCP6401R
SOT-23-5
VOUTA 1
14 VOUTD
–
7 VOUTB VINA 2
13 VIND–
V +
6 VINB– INA 3
5 V + VDD 4
12 VIND+
VINB+ 5
10 VINC+
VINB– 6
9 VINC–
VOUTB 7
8 VOUTC
INB
11 VSS
DS22229B-page 1
MCP6401/1R/1U/2/4
NOTES:
DS22229B-page 2
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
1.0
ELECTRICAL CHARACTERISTICS
1.1
Absolute Maximum Ratings †
† Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of
the device at those or any other conditions above those
indicated in the operational listings of this specification is not
implied. Exposure to maximum rating conditions for extended
periods may affect device reliability.
VDD – VSS ........................................................................7.0V
Current at Input Pins .....................................................±2 mA
Analog Inputs (VIN+, VIN-)†† .......... VSS – 1.0V to VDD + 1.0V
All Other Inputs and Outputs ......... VSS – 0.3V to VDD + 0.3V
Difference Input Voltage ...................................... |VDD – VSS|
Output Short-Circuit Current ................................ Continuous
†† See Section 4.1.2 “Input Voltage Limits”
Current at Output and Supply Pins ............................±30 mA
Storage Temperature ....................................-65°C to +150°C
Maximum Junction Temperature (TJ) .......................... +150°C
ESD Protection on All Pins (HBM; MM) ............... ≥ 4 kV; 300V
DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +6.0V, VSS= GND, TA= +25°C, VCM = VDD/2,
VOUT » VDD/2, VL = VDD/2 and RL = 100 kΩ to VL. (Refer to Figure 1-1).
Parameters
Sym
Min
Typ
Max
Units
Conditions
Input Offset
Input Offset Voltage
Input Offset Drift with Temperature
Power Supply Rejection Ratio
VOS
-4.5
—
+4.5
ΔVOS/ΔTA
—
±2.0
—
PSRR
63
78
—
dB
IB
—
±1.0
100
pA
—
30
—
pA
TA = +85°C
—
800
—
pA
TA = +125°C
—
±1.0
—
pA
13
mV
VCM = VSS
µV/°C TA= -40°C to +125°C,
VCM = VSS
VCM = VSS
Input Bias Current and Impedance
Input Bias Current
Input Offset Current
IOS
Common Mode Input Impedance
ZCM
—
10 ||6
—
Ω||pF
Differential Input Impedance
ZDIFF
—
1013||6
—
Ω||pF
Common Mode Input Voltage Range
VCMR
VSS-0.2
—
VDD+0.2
V
VSS-0.3
—
VDD+0.3
V
VDD = 6.0V, Note 1
Common Mode Rejection Ratio
CMRR
56
71
—
dB
VCM = -0.2V to 2.0V,
VDD = 1.8V
63
78
—
dB
VCM = -0.3V to 6.3V,
VDD = 6.0V
AOL
90
110
—
dB
VOUT = 0.3V to VDD-0.3V
VCM = VSS
VOL, VOH
VSS+20
—
VDD–20
mV
VDD = 6.0V, RL = 10 kΩ
0.5V input overdrive
ISC
—
±5
—
mA
VDD = 1.8V
—
±15
—
mA
VDD = 6.0V
Common Mode
VDD = 1.8V, Note 1
Open-Loop Gain
DC Open-Loop Gain
(Large Signal)
Output
Maximum Output Voltage Swing
Output Short-Circuit Current
Power Supply
Supply Voltage
Quiescent Current per Amplifier
Note 1:
VDD
1.8
—
6.0
V
IQ
20
45
70
µA
IO = 0, VDD = 5.0V
VCM = 0.2VDD
Figure 2-11 shows how VCMR changes across temperature.
© 2010 Microchip Technology Inc.
DS22229B-page 3
MCP6401/1R/1U/2/4
AC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +1.8 to +6.0V, VSS = GND, VCM = VDD/2,
VOUT ≈ VDD/2, VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF. (Refer to Figure 1-1).
Parameters
Sym
Min
Typ
Max
Units
Conditions
AC Response
Gain Bandwidth Product
GBWP
—
1
—
MHz
Phase Margin
PM
—
65
—
°
Slew Rate
SR
—
0.5
—
V/µs
Input Noise Voltage
Eni
—
3.6
—
µVp-p
f = 0.1 Hz to 10 Hz
Input Noise Voltage Density
eni
—
28
—
nV/√Hz
f = 1 kHz
Input Noise Current Density
ini
—
0.6
—
fA/√Hz
f = 1 kHz
G = +1 V/V
Noise
TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +6.0V and VSS = GND.
Parameters
Sym
Min
Typ
Max
Units
Operating Temperature Range
TA
-40
—
+125
°C
Storage Temperature Range
TA
-65
—
+150
°C
Thermal Resistance, 5L-SC70
θJA
—
331
—
°C/W
Thermal Resistance, 5L-SOT-23
θJA
—
220.7
—
°C/W
Thermal Resistance, 8L-SOIC
θJA
—
149.5
—
°C/W
Thermal Resistance, 8L-2x3 TDFN
θJA
—
41
—
°C/W
Thermal Resistance, 14L-SOIC
θJA
—
95.3
—
°C/W
Thermal Resistance, 14L-TSSOP
θJA
—
100
—
°C/W
Conditions
Temperature Ranges
Note 1
Thermal Package Resistances
Note 1: The internal junction temperature (TJ) must not exceed the absolute maximum specification of +150°C.
1.2
Test Circuits
The circuit used for most DC and AC tests is shown in
Figure 1-1. This circuit can independently set VCM and
VOUT; see Equation 1-1. Note that VCM is not the
circuit’s Common Mode voltage ((VP + VM)/2), and that
VOST includes VOS plus the effects (on the input offset
error, VOST) of temperature, CMRR, PSRR and AOL.
CF
6.8 pF
RG
100 kΩ
VP
G DM = R F ⁄ R G
CB1
100 nF
MCP640x
V CM = ( V P + V DD ⁄ 2 ) ⁄ 2
VDD/2
CB2
1 µF
VIN–
V OST = VIN– – V IN+
V OUT = ( VDD ⁄ 2 ) + ( VP – V M ) + V OST ( 1 + GDM )
VM
RG
100 kΩ
Where:
GDM = Differential Mode Gain
(V/V)
VCM = Op Amp’s Common Mode
Input Voltage
(V)
DS22229B-page 4
VDD
VIN+
EQUATION 1-1:
VOST = Op Amp’s Total Input Offset
Voltage
RF
100 kΩ
(mV)
RL
100 kΩ
RF
100 kΩ
CF
6.8 pF
VOUT
CL
60 pF
VL
FIGURE 1-1:
AC and DC Test Circuit for
Most Specifications.
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.
FIGURE 2-1:
FIGURE 2-4:
Input Offset Voltage vs.
Common Mode Input Voltage with VDD = 1.8V.
Input Offset Voltage.
1000
1760 Samples
VCM = VSS
TA = -40°C to +125°C
Input Offset Voltage (µV)
30%
25%
20%
15%
10%
5%
250
VDD = 6.0V
0
VDD = 1.8V
-250
-500
Representative Part
-750
FIGURE 2-2:
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
10
1.0
-6 -4 -2 0 2 4 6 8
Input Offset Voltage Drift (µV/°C)
0.0
-10 -8
Output Voltage (V)
Input Offset Voltage Drift.
FIGURE 2-5:
Output Voltage.
Input Offset Voltage vs.
1000
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
+125°C
+85°C
+25°C
-40°C
0.5
0.0
TA =
TA =
TA =
TA =
Input Offset Voltage (µV)
VDD = 6.0V
Representative Part
-0.5
Input Offset Voltage (µV)
500
-1000
0%
1000
900
800
700
600
500
400
300
200
100
0
-100
750
0.5
Percentage of Occurences
35%
2.3
Common Mode Input Voltage (V)
45%
40%
2.1
5
1.9
4
1.7
-2 -1 0
1
2
3
Input Offset Voltage (mV)
1.5
-3
1.3
-4
1.1
-5
-0.5
0%
0.9
3%
+125°C
+85°C
+25°C
-40°C
0.7
6%
TA =
TA =
TA =
TA =
0.5
9%
0.3
12%
0.1
15%
VDD = 1.8V
Representative Part
-0.1
18%
1200
1000
800
600
400
200
0
-200
-400
-600
-800
-1000
-0.3
1760 Samples
VCM = VSS
21%
Input Offset Voltage (µV)
Percentage of Occurences
24%
Common Mode Input Voltage (V)
FIGURE 2-3:
Input Offset Voltage vs.
Common Mode Input Voltage with VDD = 6.0V.
© 2010 Microchip Technology Inc.
800
600
400
TA
TA
TA
TA
= +125°C
= +85°C
= +25°C
= -40°C
Representative Part
200
0
-200
-400
-600
-800
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5
Power Supply Voltage (V)
FIGURE 2-6:
Input Offset Voltage vs.
Power Supply Voltage.
DS22229B-page 5
MCP6401/1R/1U/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.
90
CMRR, PSRR (dB)
85
100
10
75
70
65
CMRR (V DD = 6.0V, V CM = -0.3V to 6.3V)
60
CMRR (VDD = 1.8V, VCM = -0.2V to 2.0V)
50
0.1
0.1
11
100
1000
1010
100
1k
Frequency (Hz)
FIGURE 2-7:
vs. Frequency.
10000 100k
100000
10k
Input Noise Voltage Density
35
30
25
20
15
10
f = 1 kHz
VDD = 6.0 V
5
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
-0.05
-0.10
-0.15
-0.20
-0.25
-0.30
-0.35
100
100
125
CMRR, PSRR vs. Ambient
VCMR_L - VSS @ VDD = 1.8V
VCMR_L - VSS @ VDD = 6.0V
-25
0
25
50
75
100
Ambient Temperature (°C)
125
FIGURE 2-11:
Common Mode Input
Voltage Range Limits vs. Ambient Temperature.
PSRR+
Representative Part
80
CMRR
70
PSRR-
60
50
40
30
20
10
10
100
100
FIGURE 2-9:
Frequency.
DS22229B-page 6
1k
10k
1000
10000
Frequency (Hz)
100k
1M
100000
1000000
CMRR, PSRR vs.
Input Bias, Offset Current (pA)
10000
90
CMRR, PSRR (dB)
0
25
50
75
Ambient Temperature (°C)
VCMR_H - VDD @ VDD = 6.0V
VCMR_H - VDD @ VDD = 1.8V
-50
Common Mode Input Voltage (V)
FIGURE 2-8:
Input Noise Voltage Density
vs. Common Mode Input Voltage.
-25
FIGURE 2-10:
Temperature.
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.0
0.5
0
0.0
-50
Common Mode Input Voltage
Range Limits (V)
40
-0.5
Input Noise Voltage Density
(nV/√Hz)
PSRR (VDD = 1.8V to 6.0V, VCM = V SS)
80
55
1.5
Input Noise Voltage Density
(nV/√Hz)
1,000
VDD = 6.0V
1000
Input Bias Current
100
10
Input Offset Current
1
25
35
45 55 65 75 85 95 105 115 125
Ambient Temperature (°C)
FIGURE 2-12:
Input Bias, Offset Current
vs. Ambient Temperature.
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.
Open-Loop Gain (dB)
Input Bias Current (pA)
TA = +125°C
100
10
TA = +85°C
VDD = 6.0V
1
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Common Mode Input Voltage (V)
70
65
60
55
50
45
40
35
30
VCM = 0.2V DD
25
20
-25
0
25
50
75
100
Ambient Temperature (°C)
50
40
TA =
TA =
TA =
TA =
20
10
+125°C
+85°C
+25°C
-40°C
FIGURE 2-15:
Quiescent Current vs.
Power Supply Voltage.
© 2010 Microchip Technology Inc.
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0
Power Supply Voltage (V)
-120
20
-150
0
-20
-180
VDD = 6.0V
1.0E-01
0.1
150
145
140
135
130
125
120
115
110
105
100
1.0E+00
1
1.0E+01
10
1.0E+02
1.0E+03
1.0E+04
1.0E+05
1.0E+06
-210
1.0E+07
100 1k 10k 100k 1M 10M
Frequency (Hz)
Open-Loop Gain, Phase vs.
R L = 10 kΩ
VSS + 0.3V < V OUT < V DD - 0.3V
1.5
DC Open-Loop Gain (dB)
Quiescent Current (µA)
VCM = 0.2VDD
30
-90
40
2.0
2.5 3.0 3.5 4.0 4.5 5.0
Power Supply Voltage (V)
5.5
6.0
FIGURE 2-17:
DC Open-Loop Gain vs.
Power Supply Voltage.
70
60
-60
Open-Loop Phase
60
125
FIGURE 2-14:
Quiescent Current vs.
Ambient Temperature.
-30
80
FIGURE 2-16:
Frequency.
VDD = 6.0V
VDD = 5.0V
VDD = 1.8V
-50
100
DC Open-Loop Gain (dB)
Quiescent Current
(µA/Amplifier)
FIGURE 2-13:
Input Bias Current vs.
Common Mode Input Voltage.
0
Open-Loop Gain
Open-Loop Phase (°)
120
1000
150
145
VDD = 6.0V
140
135
130
125
120
VDD = 1.8V
115
110
Large Signal AOL
105
100
0.00
0.05
0.10
0.15
0.20
Output Voltage Headroom
VDD - VOH or VOL-VSS (V)
0.25
FIGURE 2-18:
DC Open-Loop Gain vs.
Output Voltage Headroom.
DS22229B-page 7
MCP6401/1R/1U/2/4
85
Gain Bandwidth Product
1.4
80
1.3
75
1.2
70
1.1
65
1.0
60
Phase Margin
0.9
55
V DD = 6.0V
0.8
50
0.7
-50
10
-25
0
25
50
75 100
Ambient Temperature (°C)
45
125
85
Gain Bandwidth Product
1.4
80
1.3
75
1.2
70
1.1
65
1.0
60
Phase Margin
0.9
55
V DD = 1.8V
0.8
50
0.7
-50
-25
0
25
50
75 100
Ambient Temperature (°C)
1
10
5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0.0
Output Voltage Swing vs.
10
1
VDD - VOH @ VDD = 6.0V
VOL - VSS @ VDD = 6.0V
RL = 10 kΩ
Power Supply Voltage (V)
FIGURE 2-21:
Output Short Circuit Current
vs. Power Supply Voltage.
0.1
1
100
1000
Output Current (mA)
10
10000
FIGURE 2-23:
Output Voltage Headroom
vs. Output Current.
Output Voltage Headroom
VDD - VOH or VOL - VSS (mV)
T A = -40°C
T A = +25°C
T A = +85°C
T A = +125°C
DS22229B-page 8
1M
1000000
VDD - VOH @ VDD = 1.8V
VOL - VSS @ VDD = 1.8V
100
0.01
10
25
15
10k
100k
10000
100000
Frequency (Hz)
0.1
30
20
1k
1000
FIGURE 2-22:
Frequency.
45
125
FIGURE 2-20:
Gain Bandwidth Product,
Phase Margin vs. Ambient Temperature.
Output Short Circuit Current
(mA)
V DD = 1.8V
1000
Phase Margin (°)
Gain Bandwidth Product
(MHz)
90
1.5
V DD = 6.0V
0.1
100
100
FIGURE 2-19:
Gain Bandwidth Product,
Phase Margin vs. Ambient Temperature.
1.6
Output Voltage Swing (V P-P)
90
1.5
Output Voltage Headroom
(mV)
1.6
Phase Margin (°)
Gain Bandwidth Product
(MHz)
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.
24
22
20
18
16
14
12
10
8
6
4
2
0
VDD - VOH @ VDD = 6.0V
VOL - VSS@ VDD = 6.0V
VDD - VOH @ VDD = 1.8V
VOL - VSS @ VDD = 1.8V
-50
-25
0
25
50
75
100
Ambient Temperature (°C)
125
FIGURE 2-24:
Output Voltage Headroom
vs. Ambient Temperature.
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.
0.9
Falling Edge, VDD = 6.0V
Rising Edge, V DD = 6.0V
0.7
Output Voltage (V)
Slew Rate (V/µs)
0.8
0.6
0.5
0.4
Falling Edge, VDD = 1.8V
Rising Edge, VDD = 1.8V
0.3
0.2
0.1
-25
Output Voltage (20 mv/div)
FIGURE 2-25:
Temperature.
0
25
50
75
Ambient Temperature (°C)
100
125
Slew Rate vs. Ambient
VDD = 6.0V
G = +1 V/V
FIGURE 2-28:
Pulse Response.
Time (2 µs/div)
FIGURE 2-26:
Pulse Response.
Small Signal Non-Inverting
VDD = 6.0V
G = +1 V/V
Time (20 µs/div)
Output Voltage (V)
-50
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
Large Signal Non-Inverting
VDD = 6.0V
G = -1 V/V
Time (20 µs/div)
FIGURE 2-29:
Response.
Large Signal Inverting Pulse
VDD = 6.0V
G = -1 V/V
Input, Output Voltages (V)
Output Voltage (20 mv/div)
7.0
6.0
VOUT
5.0
4.0
VIN
3.0
2.0
1.0
0.0
V DD = 6.0V
G = +2 V/V
-1.0
Time (2 µs/div)
FIGURE 2-27:
Response.
Small Signal Inverting Pulse
© 2010 Microchip Technology Inc.
Time (0.1 ms/div)
FIGURE 2-30:
The MCP6401/1R/1U/2/4
Shows No Phase Reversal.
DS22229B-page 9
MCP6401/1R/1U/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.
Channel to Channel Separation
(dB)
Closed Loop Output
Impedance ()
10000
1000
100
GN:
101 V/V
11 V/V
1 V/V
10
1
1.0E+01
1.0E+02
10
100
1.0E+03
1.0E+04
1k
10k
Frequency (Hz)
1.0E+05
100k
1.0E+06
1M
FIGURE 2-31:
Closed Loop Output
Impedance vs. Frequency.
150
140
130
120
110
100
Input Referred
90
80
100
100
10000
1k
10k
Frequency (Hz)
1000
100000
100k
FIGURE 2-33:
Channel-to-Channel
Separation vs. Frequency (MCP6402/4 only).
1.E-03
1m
1.E-04
100µ
1.E-05
10µ
-IIN (A)
1.E-06
1µ
1.E-07
100n
1.E-08
10n
1.E-09
1n
1.E-10
100p
1.E-11
10p
TA =
TA =
TA =
TA =
-40°C
+25°C
+85°C
+125°C
1.E-12
1p
-1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0
VIN (V)
FIGURE 2-32:
Measured Input Current vs.
Input Voltage (below VSS).
DS22229B-page 10
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
3.0
PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
MCP6401 MCP6401R MCP6401U
MCP6402
MCP6404
Symbol
Description
SC70-5,
SOT-23-5
SOT-23-5
SOT-23-5
SOIC
2x3
TDFN
SOIC,
TSSOP
1
1
4
1
1
1
VOUT, VOUTA Analog Output (op amp A)
4
4
3
2
2
2
VIN–, VINA– Inverting Input (op amp A)
3
3
1
3
3
3
VIN+, VINA+ Non-inverting Input (op amp A)
5
2
5
8
8
4
VDD
—
—
—
5
5
5
VINB+
Non-inverting Input (op amp B)
—
—
—
6
6
6
VINB–
Inverting Input (op amp B)
3.1
—
—
—
7
7
7
VOUTB
Analog Output (op amp B)
—
—
—
—
—
8
VOUTC
Analog Output (op amp C)
—
—
—
—
—
9
VINC–
Inverting Input (op amp C)
—
—
—
—
—
10
VINC+
Non-inverting Input (op amp C)
Negative Power Supply
2
5
2
4
4
11
VSS
—
—
—
—
—
12
VIND+
Non-inverting Input (op amp D)
—
—
—
—
—
13
VIND–
Inverting Input (op amp D)
—
—
—
—
—
14
VOUTD
Analog Output (op amp D)
—
—
—
—
9
—
EP
Analog Output (VOUT)
The output pin is low-impedance voltage source.
3.2
Positive Power Supply
Analog Inputs (VIN+, VIN-)
The non-inverting and inverting inputs are highimpedance CMOS inputs with low bias currents.
© 2010 Microchip Technology Inc.
3.3
Exposed Thermal Pad (EP);
must be connected to VSS.
Power Supply Pin (VDD, VSS)
The positive power supply (VDD) is 1.8V to 6.0V higher
than the negative power supply (VSS). For normal
operation, the other pins are at voltages between VSS
and VDD.
Typically, these parts are used in a single (positive)
supply configuration. In this case, VSS is connected to
ground and VDD is connected to the supply. VDD will
need bypass capacitors.
DS22229B-page 11
MCP6401/1R/1U/2/4
NOTES:
DS22229B-page 12
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
4.0
APPLICATION INFORMATION
The MCP6401/1R/1U/2/4 family of op amps is
manufactured using Microchip’s state-of-the-art CMOS
process and is specifically designed for low-power,
high precision applications.
4.1
VDD
D1
D2
U1
V1
Rail-to-Rail Input
4.1.1
V2
PHASE REVERSAL
The MCP6401/1R/1U/2/4 op amps are designed to
prevent phase reversal when the input pins exceed the
supply voltages. Figure 2-30 shows the input voltage
exceeding the supply voltage with no phase reversal.
4.1.2
INPUT VOLTAGE LIMITS
In order to prevent damage and/or improper operation
of these amplifiers, the circuit must limit the voltages at
the input pins (see Section 1.1 “Absolute Maximum
Ratings †”).
The ESD protection on the inputs can be depicted as
shown in Figure 4-1. This structure was chosen to
protect the input transistors against many (but not all)
over-voltage conditions, and to minimize the input bias
current (IB).
FIGURE 4-2:
Inputs.
Protecting the Analog
A significant amount of current can flow out of the
inputs when the Common Mode voltage (VCM) is below
ground (VSS); See Figure 2-32.
4.1.3
INPUT CURRENT LIMITS
In order to prevent damage and/or improper operation
of these amplifiers, the circuit must limit the currents
into the input pins (see Section 1.1 “Absolute
Maximum Ratings †”).
Figure 4-3 shows one approach to protecting these
inputs. The resistors R1 and R2 limit the possible
currents in or out of the input pins (and the ESD diodes,
D1 and D2). The diode currents will go through either
VDD or VSS.
VDD Bond
Pad
VIN+ Bond
Pad
VDD
Input
Stage
D1
Bond V –
IN
Pad
U1
MCP640x
VOUT
V2
Bond
Pad
FIGURE 4-1:
Structures.
D2
V1
R1
VSS
VOUT
MCP640x
R2
Simplified Analog Input ESD
The input ESD diodes clamp the inputs when they try
to go more than one diode drop below VSS. They also
clamp any voltages that go well above VDD; their
breakdown voltage is high enough to allow normal
operation, but not low enough to protect against slow
over-voltage (beyond VDD) events. Very fast ESD
events (that meet the spec) are limited so that damage
does not occur.
In some applications, it may be necessary to prevent
excessive voltages from reaching the op amp inputs;
Figure 4-2 shows one approach to protecting these
inputs.
© 2010 Microchip Technology Inc.
min(R1,R2) >
VSS – min(V1, V2)
2 mA
min(R1,R2) >
max(V1,V2) – VDD
2 mA
FIGURE 4-3:
Inputs.
4.1.4
Protecting the Analog
NORMAL OPERATION
The input stage of the MCP6401/1R/1U/2/4 op amps
uses two differential input stages in parallel. One operates at a low Common Mode input voltage (VCM), while
the other operates at a high VCM. With this topology,
the device operates with a VCM up to 300 mV above
VDD and 300 mV below VSS. (See Figure 2-11). The
input offset voltage is measured at VCM = VSS – 0.3V
and VDD + 0.3V to ensure proper operation.
The transition between the input stages occurs when
VCM is near VDD – 1.1V (See Figures 2-3 and 2-4). For
the best distortion performance and gain linearity, with
non-inverting gains, avoid this region of operation.
DS22229B-page 13
MCP6401/1R/1U/2/4
4.2
Rail-to-Rail Output
The output voltage range of the MCP6401/1R/1U/2/4
op amps is VSS + 20 mV (minimum) and VDD – 20 mV
(maximum) when RL = 10 kΩ is connected to VDD/2
and VDD = 6.0V. Refer to Figures 2-23 and 2-24 for
more information.
4.3
4.4
Capacitive Loads
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. While a unity-gain buffer (G = +1 V/V) is the
most sensitive to capacitive loads, all gains show the
same general behavior.
When driving large capacitive loads with these op
amps (e.g., > 100 pF when G = +1 V/V), a small series
resistor at the output (RISO in Figure 4-4) improves the
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The
bandwidth will be generally lower than the bandwidth
with no capacitance load.
–
Supply Bypass
With this family of operational amplifiers, the power
supply pin (VDD for single-supply) should have a local
bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm
for good high frequency performance. It can use a bulk
capacitor (i.e., 1 µF or larger) within 100 mm to provide
large, slow currents. This bulk capacitor can be shared
with other analog parts.
4.5
Unused Op Amps
An unused op amp in a quad package (MCP6404)
should be configured as shown in Figure 4-6. These
circuits prevent the output from toggling and causing
crosstalk. Circuits A sets the op amp at its minimum
noise gain. The resistor divider produces any desired
reference voltage within the output voltage range of the
op amp; the op amp buffers that reference voltage.
Circuit B uses the minimum number of components
and operates as a comparator, but it may draw more
current.
RISO
MCP640x
VOUT
+
VIN
After selecting RISO for your circuit, double-check the
resulting frequency response peaking and step
response overshoot. Modify RISO’s value until the
response is reasonable. Bench evaluation and
simulations with the MCP6401/1R/1U/2/4 SPICE
macro model are very helpful.
CL
¼ MCP6404 (A)
R1
FIGURE 4-4:
Output Resistor, RISO
Stabilizes Large Capacitive Loads.
VDD
VDD
VREF
R2
Figure 4-5 gives recommended RISO values for
different capacitive loads and gains. The x-axis is the
normalized load capacitance (CL/GN), where GN is the
circuit's noise gain. For non-inverting gains, GN and the
Signal Gain are equal. For inverting gains, GN is
1+|Signal Gain| (e.g., -1 V/V gives GN = +2 V/V).
R2
VREF = V DD • -----------------R1 + R 2
FIGURE 4-6:
Recommended R
ISO
(Ω)
10000
VDD = 6.0 V
RL = 10 kΩ
1000
100
10
¼ MCP6404 (B)
VDD
GN:
1 V/V
2 V/V
≥ 5 V/V
1
10p
100p 1.E-09
1n
10n
0.1µ
1µ
1.E-11
1.E-10
1.E-08
1.E-07
1.E-06
Normalized Load Capacitance; CL/GN (F)
4.6
Unused Op Amps.
PCB Surface Leakage
In applications where low input bias current is critical,
Printed Circuit Board (PCB) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 1012Ω. A 5V difference would
cause 5 pA of current to flow; which is greater than the
MCP6401/1R/1U/2/4 family’s bias current at +25°C
(±1.0 pA, typical).
FIGURE 4-5:
Recommended RISO Values
for Capacitive Loads.
DS22229B-page 14
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in
Figure 4-7.
Guard Ring
VIN– VIN+
VSS
Figure 4-8 shows a precision half-wave rectifier and its
transfer characteristic. The rectifier’s input impedance
is determined by the input resistor R1. To avoid loading
effect, it must be driven from a low impedance source.
When VIN is greater than zero, D1 is OFF, D2 is ON, and
VOUT is zero. When VIN is less than zero, D1 is ON, D2
is OFF, and VOUT is the VIN with an amplification of -R2/
R1.
The rectifier circuit shown in Figure 4-8 has the benefit
that the op amp never goes in saturation, so the only
thing affecting its frequency response is the
amplification and the gain bandwidth product.
.
R2
FIGURE 4-7:
for Inverting Gain.
1.
2.
Example Guard Ring Layout
Non-inverting Gain and Unity-Gain Buffer:
a) Connect the non-inverting pin (VIN+) to the
input with a wire that does not touch the
PCB surface.
b) Connect the guard ring to the inverting input
pin (VIN–). This biases the guard ring to the
Common Mode input voltage.
Inverting Gain and Transimpedance Gain
Amplifiers (convert current to voltage, such as
photo detectors):
a) Connect the guard ring to the non-inverting
input pin (VIN+). This biases the guard ring
to the same reference voltage as the op
amp (e.g., VDD/2 or ground).
b) Connect the inverting pin (VIN–) to the input
with a wire that does not touch the PCB
surface.
4.7
4.7.1
Application Circuits
PRECISION HALF-WAVE
RECTIFIER
D2
VIN
R1
VOUT
MCP6401
D1
Precision Half-Wave Rectifier
VOUT
-R2/R1
VIN
Transfer Characteristic
FIGURE 4-8:
Rectifier.
Precision Half-Wave
The precision half-wave rectifier, which is also known
as a super diode, is a configuration obtained with an
operational amplifier in order to have a circuit behaving
like an ideal diode and rectifier. It effectively cancels the
forward voltage drop of the diode so that very low level
signals can still be rectified with minimal error. This can
be useful for high-precision signal processing. The
MCP6401/1R/1U/2/4 op amps have high input
impedance, low input bias current and rail-to-rail input/
output, which makes this device suitable for precision
rectifier applications.
© 2010 Microchip Technology Inc.
DS22229B-page 15
MCP6401/1R/1U/2/4
4.7.2
BATTERY CURRENT SENSING
The MCP6401/1R/1U/2/4 op amps’ Common Mode
Input Range, which goes 0.3V beyond both supply
rails, supports their use in high-side and low-side
battery current sensing applications. The low quiescent
current (45 µA, typical) helps prolong battery life, and
the rail-to-rail output supports detection of low currents.
Figure 4-9 shows a high side battery current sensor
circuit. The 10Ω resistor is sized to minimize power
losses. The battery current (IDD) through the 10Ω
resistor causes its top terminal to be more negative
than the bottom terminal. This keeps the Common
Mode input voltage of the op amp below VDD, which is
within its allowed range. The output of the op amp will
also be below VDD, which is within its Maximum Output
Voltage Swing specification.
INSTRUMENTATION AMPLIFIER
The MCP6401/1R/1U/2/4 op amps are well suited for
conditioning sensor signals in battery-powered
applications. Figure 4-10 shows a two op amp
instrumentation amplifier, using the MCP6402, that
works well for applications requiring rejection of
Common Mode noise at higher gains. The reference
voltage (VREF) is supplied by a low impedance source.
In single supply applications, VREF is typically VDD/2.
RG
VREF R1
R2
R2
To load
10Ω
100 kΩ
VDD
MCP6401
VOUT
1 MΩ
R1
VOUT
V2
1/2 MCP6402
IDD
1.8V
to
6.0V
4.7.3
1/2 MCP6402
V1
R 1 2R1
V OUT = ( V 1 – V2 ) ⎛⎝ 1 + ------ + ---------⎞⎠ + V REF
R2 RG
FIGURE 4-10:
Two Op Amp
Instrumentation Amplifier.
V DD – VOUT
I DD = -----------------------------------------( 10 V/V ) ⋅ ( 10 Ω )
FIGURE 4-9:
DS22229B-page 16
Supply Current Sensing.
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
5.0
DESIGN AIDS
Microchip provides the basic design tools needed for
the MCP6401/1R/1U/2/4 family of op amps.
5.1
SPICE Macro Model
The latest SPICE macro model for the MCP6401/1R/
1U/2/4 op amp is available on the Microchip web site at
www.microchip.com. The model was written and tested
in official Orcad (Cadence) owned PSPICE. For the
other simulators, it may require translation.
The model covers a wide aspect of the op amp's
electrical specifications. Not only does the model cover
voltage, current, and resistance of the op amp, but it
also covers the temperature and noise effects on the
behavior of the op amp. The model has not been
verified outside of the specification range listed in the
op amp data sheet. The model behaviors under these
conditions cannot be guaranteed that it will match the
actual op amp performance.
Moreover, the model is intended to be an initial design
tool. Bench testing is a very important part of any
design and cannot be replaced with simulations. Also,
simulation results using this macro model need to be
validated by comparing them to the data sheet
specifications and characteristic curves.
5.2
FilterLab® Software
Microchip’s FilterLab® software is an innovative
software tool that simplifies analog active filter (using
op amps) design. Available at no cost from the
Microchip web site at www.microchip.com/filterlab, the
FilterLab design tool provides full schematic diagrams
of the filter circuit with component values. It also
outputs the filter circuit in SPICE format, which can be
used with the macro model to simulate actual filter
performance.
5.3
5.4
Microchip Advanced Part Selector
(MAPS)
MAPS is a software tool that helps semiconductor
professionals efficiently identify Microchip devices that
fit a particular design requirement. Available at no cost
from the Microchip website at www.microchip.com/
maps, the MAPS is an overall selection tool for
Microchip’s product portfolio that includes Analog,
Memory, MCUs and DSCs. Using this tool you can
define a filter to sort features for a parametric search of
devices and export side-by-side technical comparison
reports. Helpful links are also provided for Datasheets,
Purchase, and Sampling of Microchip parts.
5.5
Analog Demonstration and
Evaluation Boards
Microchip offers a broad spectrum of Analog
Demonstration and Evaluation Boards that are
designed to help you achieve faster time to market. For
a complete listing of these boards and their
corresponding user’s guides and technical information,
visit the Microchip web site at www.microchip.com/
analogtools.
Some boards that are especially useful are:
•
•
•
•
•
•
•
MCP6XXX Amplifier Evaluation Board 1
MCP6XXX Amplifier Evaluation Board 2
MCP6XXX Amplifier Evaluation Board 3
MCP6XXX Amplifier Evaluation Board 4
Active Filter Demo Board Kit
5/6-Pin SOT-23 Evaluation Board, P/N VSUPEV2
8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board,
P/N SOIC8EV
• 14-Pin SOIC/TSSOP/DIP Evaluation Board, P/N
SOIC14EV
Mindi™ Circuit Designer and
Simulator
Microchip’s Mindi™ Circuit Designer and Simulator
aids in the design of various circuits useful for active
filter, amplifier and power-management applications. It
is a free online circuit designer and simulator available
from the Microchip web site at www.microchip.com/
mindi. This interactive circuit designer and simulator
enables designers to quickly generate circuit diagrams,
and simulate circuits. Circuits developed using the
Mindi Circuit Designer and Simulator can be downloaded to a personal computer or workstation.
© 2010 Microchip Technology Inc.
DS22229B-page 17
MCP6401/1R/1U/2/4
5.6
Application Notes
The following Microchip Analog Design Note and
Application Notes are available on the Microchip web
site at www.microchip.com/appnotes and are
recommended as supplemental reference resources.
• ADN003: “Select the Right Operational Amplifier
for your Filtering Circuits”, DS21821
• AN722: “Operational Amplifier Topologies and DC
Specifications”, DS00722
• AN723: “Operational Amplifier AC Specifications
and Applications”, DS00723
• AN884: “Driving Capacitive Loads With Op
Amps”, DS00884
• AN990: “Analog Sensor Conditioning Circuits –
An Overview”, DS00990
• AN1177: “Op Amp Precision Design: DC Errors”,
DS01177
• AN1228: “Op Amp Precision Design: Random
Noise”, DS01228
• AN1297: “Microchip’s Op Amp SPICE Macro
Models”, DS01297
These application notes and others are listed in the
design guide:
• “Signal Chain Design Guide”, DS21825
DS22229B-page 18
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
6.0
PACKAGING INFORMATION
6.1
Package Marking Information
5-Lead SC70 (MCP6401 only)
Example:
XXNN
BL25
5-Lead SOT-23
Example:
XXNN
Code
MCP6401T-E/OT
NLNN
MCP6401RT-E/OT
NMNN
MCP6401UT-E/OT
NPNN
NL25
Example:
8-Lead TDFN (2 x 3)
XXX
YWW
NN
AAW
025
25
8-Lead SOIC (150 mil)
XXXXXXXX
XXXXYYWW
NNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
Part Number
Example:
MCP6402E
e3
SN^^1025
256
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2010 Microchip Technology Inc.
DS22229B-page 19
MCP6401/1R/1U/2/4
Package Marking Information (Continued)
14-Lead SOIC (150 mil) (MCP6404)
Example:
MCP6404
e3
E/SL^^
1025256
XXXXXXXXXX
XXXXXXXXXX
YYWWNNN
14-Lead TSSOP (MCP6404)
Example:
XXXXXX
YYWW
6404E/ST
1025
NNN
256
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
DS22229B-page 20
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
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DS22229B-page 23
MCP6401/1R/1U/2/4
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© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
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DS22229B-page 25
MCP6401/1R/1U/2/4
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS22229B-page 26
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2010 Microchip Technology Inc.
DS22229B-page 27
MCP6401/1R/1U/2/4
" + , % -./# 0!0&()+,
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DS22229B-page 28
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
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DS22229B-page 29
MCP6401/1R/1U/2/4
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DS22229B-page 30
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
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- *;)
DS22229B-page 31
MCP6401/1R/1U/2/4
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS22229B-page 32
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
APPENDIX A:
REVISION HISTORY
Revision B (June 2010)
The following is the list of modifications:
1.
Added the MCP6402 and MCP6404 package
information.
2. Updated the ESD protection value on all pins in
Section 1.1 “Absolute Maximum Ratings †”.
3. Added Figure 2-33.
4. Updated Table 3-1.
5. Updated Section 4.1.2 “Input Voltage Limits”.
6. Added Section 4.1.3 “Input Current Limits”.
7. Added Section 4.5 “Unused Op Amps”.
8. Updated Section 5.5 “Analog Demonstration
and Evaluation Boards”.
9. Updated the package markings information and
drawings.
10. Updated the Product Identification System
page.
Revision A (December 2009)
• Original Release of this Document.
© 2010 Microchip Technology Inc.
DS22229B-page 33
MCP6401/1R/1U/2/4
NOTES:
DS22229B-page 34
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
-X
/XX
Device
Temperature
Range
Package
Device:
MCP6401T:
MCP6401RT:
MCP6401UT:
MCP6402:
MCP6402T:
MCP6404:
MCP6404T:
Temperature Range:
E
Package:
LT
=
OT =
SN =
MNY* =
SL
=
ST
=
Single Op Amp (Tape and Reel)
(SC70, SOT-23)
Single Op Amp (Tape and Reel)
(SOT-23)
Single Op Amp (Tape and Reel)
(SOT-23)
Dual Op Amp
Dual Op Amp (Tape and Reel)
(SOIC, 2x3 TDFN)
Quad Op Amp
Quad Op Amp (Tape and Reel)
(SOIC, TSSOP)
= -40°C to +125°C
Plastic Package (SC70), 5-lead
Plastic Small Outline Transistor (SOT-23), 5-lead
Plastic SOIC, (3.90 mm body), 8-lead
Plastic Dual Flat, No Lead, (2x3 TDFN), 8-lead
Plastic SOIC (3.90 mm body), 14-lead
Plastic TSSOP (4.4mm body), 14-lead
Examples:
a)
MCP6401T-E/LT:
b)
MCP6401T-E/OT:
c)
MCP6401RT-E/OT:
d)
MCP6401UT-E/OT:
e)
f)
MCP6402-E/SN:
MCP6402T-E/SN:
g)
MCP6402T-E/MNY:
h)
i)
MCP6404-E/SL:
MCP6404T-E/SL:
j)
k)
MCP6404-E/ST:
MCP6404T-E/ST:
Tape and Reel,
5LD SC70 pkg
Tape and Reel,
5LD SOT-23 pkg
Tape and Reel,
5LD SOT-23 pkg
Tape and Reel,
5LD SOT-23 pkg
8LD SOIC pkg
Tape and Reel,
8LD SOIC pkg
Tape and Reel,
8LD 2x3 TDFN pkg
14LD SOIC pkg
Tape and Reel,
14LD SOIC pkg
14LD TSSOP pkg
Tape and Reel,
14LD TSSOP pkg.
* Y = Nickel palladium gold manufacturing designator.
Only available on the TDFN package.
© 2010 Microchip Technology Inc.
DS22229B-page 35
MCP6401/1R/1U/2/4
NOTES:
DS22229B-page 36
© 2010 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART,
rfPIC and UNI/O are registered trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MXDEV, MXLAB, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified
logo, MPLIB, MPLINK, mTouch, Octopus, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, PIC32 logo, REAL ICE, rfLAB, Select Mode, Total
Endurance, TSHARC, UniWinDriver, WiperLock and ZENA
are trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2010, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 978-1-60932-338-7
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2010 Microchip Technology Inc.
DS22229B-page 37
WORLDWIDE SALES AND SERVICE
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://support.microchip.com
Web Address:
www.microchip.com
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
Harbour City, Kowloon
Hong Kong
Tel: 852-2401-1200
Fax: 852-2401-3431
India - Bangalore
Tel: 91-80-3090-4444
Fax: 91-80-3090-4123
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
India - Pune
Tel: 91-20-2566-1512
Fax: 91-20-2566-1513
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Japan - Yokohama
Tel: 81-45-471- 6166
Fax: 81-45-471-6122
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
Boston
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Cleveland
Independence, OH
Tel: 216-447-0464
Fax: 216-447-0643
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
Detroit
Farmington Hills, MI
Tel: 248-538-2250
Fax: 248-538-2260
Kokomo
Kokomo, IN
Tel: 765-864-8360
Fax: 765-864-8387
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
Santa Clara
Santa Clara, CA
Tel: 408-961-6444
Fax: 408-961-6445
Toronto
Mississauga, Ontario,
Canada
Tel: 905-673-0699
Fax: 905-673-6509
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
China - Beijing
Tel: 86-10-8528-2100
Fax: 86-10-8528-2104
China - Chengdu
Tel: 86-28-8665-5511
Fax: 86-28-8665-7889
Korea - Daegu
Tel: 82-53-744-4301
Fax: 82-53-744-4302
China - Chongqing
Tel: 86-23-8980-9588
Fax: 86-23-8980-9500
Korea - Seoul
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
China - Hong Kong SAR
Tel: 852-2401-1200
Fax: 852-2401-3431
Malaysia - Kuala Lumpur
Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
China - Nanjing
Tel: 86-25-8473-2460
Fax: 86-25-8473-2470
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Taiwan - Hsin Chu
Tel: 886-3-6578-300
Fax: 886-3-6578-370
China - Shenzhen
Tel: 86-755-8203-2660
Fax: 86-755-8203-1760
Taiwan - Kaohsiung
Tel: 886-7-536-4818
Fax: 886-7-536-4803
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Taipei
Tel: 886-2-2500-6610
Fax: 886-2-2508-0102
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
01/05/10
DS22229B-page 38
© 2010 Microchip Technology Inc.