Rohm BD8163EFV 5v input multi-channel system power supply ic Datasheet

Power Supply ICs for TFT-LCD Panels
5V Input Multi-channel
System Power Supply ICs
BD8163EFV
No.10035EAT13
●Description
The BD8163EFV is a system power supply IC for TFT panels. A 1-chip IC providing a total of four voltages required for TFT
panels, i.e., logic voltage, sauce voltage, gate high-level, and gate low-level voltage, thus constructing a TFT panel power
supply with minimal components required.
●Features
1) Operates in an operating voltage range as low as 2.1 V to 6. 0 V.
2) Incorporates a step-up DC/DC converter.
3) Incorporates a 2.5 V regulator.
4) Incorporates positive and negative-side charge pumps.
5) Switching frequency of 1100 kHz
6) DC/DC converter feedback voltage of 1.24 V ± 1%
7) Incorporates a gate shading function
8) Under-voltage lockout protection circuit
9) Thermal shutdown circuit
10) Overcurrent protection circuit
11) HTSSOP-B24 package
●Applications
Liquid crystal TV, PC monitor, and TFT-LCD panel
●Absolute maximum ratings (Ta = 25℃)
Parameter
Symbol
Ratings
Unit
Power supply voltage
VCC
7
V
Vo1 voltage
Vo1
19
V
Vo2 voltage
Vo2
32
V
SW voltage
Vsw
19
V
Tjmax
150
℃
Pd
1100*
mW
Operating temperature range
Topr
-40 to 125
℃
Storage temperature range
Tstg
-55 to 150
℃
Maximum junction temperature
Power dissipation
* Reduced by 4.7 mW/℃ over 25℃, when mounted on a glass epoxy board. (70 mm  70 mm  1.6 mm).
●Recommended Operating Ranges
Parameter
Symbol
Ratings
Min.
Max.
Unit
Power supply voltage
VCC
2.1
6
V
Vo1 voltage
Vo1
8
18
V
Vo2 voltage
Vsw
—
18
V
SW Current
Isw
—
1.8
A
Vo2 Current
Vo2
—
30
V
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
1/21
2010.12 - Rev.A
Technical Note
BD8163EFV
●Electrical Characteristics (Unless otherwise specified, VCC = 5 V; Vo1 = 15 V; Vo2 = 25 V; Ta = 25℃)
1 DC/DC Converter Block
Parameter
Symbol
Limits
Min.
Typ.
Max.
Unit
Conditions
[Soft start]
Source current
Iso
6
10
14
μA
Vss = 0.5 V
Sinking current
Isi
0.1
0.2
1.0
mA
Vss = 0.5 V, VDD = 1.65 V
Input bias current 1
IFB1
—
0.1
0.5
μA
Feedback voltage 1
VFB1
1.227
1.240
1.253
V
Voltage gain
AV
—
200
—
V/V
*
Sinking current
IoI
25
50
100
μA
VFB = 1.5 V VCOMP = 0.5 V
Source current
Ioo
-100
-50
-25
μA
VFB = 1.0 V VCOMP = 0.5 V
ON resistance N-channel
RON_N
50
200
600
mΩ
*
Leak current N-channel
ILEAKN
—
—
10
μA
Maximum duty cycle
DMAX
75
85
95
%
Insw
2
3
—
A
[Error amp]
Buffer
[SW]
Vsw = 18 V
[Overcurrent protection]
Saw current limit
*
2. Regulator controller
Parameter
Symbol
Limits
Min.
Typ.
Max.
Unit
Conditions
[Error amp]
VDD voltage
VDD
2.4
2.5
2.6
V
Maximum base current
IBMAX
2
7
15
mA
Line regulation
RegI
—
10
30
mV
Vcc = 4.5 V to 5.5 V
Load regulation
RegL
—
10
50
mV
Io = 10 mA to 100 mA
[Under-voltage lockout protection]
Off threshold voltage
VROFF
1.7
1.8
1.9
V
On threshold voltage
VRON
1.6
1.7
1.8
V
 This product is not designed for protection against radioactive rays.
*
Design guarantee (No total shipment inspection is made.)
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
2/21
2010.12 - Rev.A
Technical Note
BD8163EFV
3. Charge pump
Parameter
Symbol
Limits
Min.
Typ.
Max.
Unit
Conditions
[Error amp]
Input bias current 2
IFB2
—
0.1
0.5
μA
Input bias current 3
IFB3
—
0.1
0.5
μA
Feedback voltage 2
VFB2
1.183
1.240
1.307
V
Feedback voltage 3
VFB3
0.15
0.2
0.25
V
Source current
IDSO
3
5
7
μA
VDLS = 0.5V
Sinking current
IDSI
0.1
0.5
1.0
mA
VDLS = 0.5V
Startup voltage
VST
0.45
0.60
0.75
V
ON resistance N-channel
RON_NC
0.5
2
4
Ω
Io = 10 mA *
ON resistance P-channel
RON_PC
0.5
4
8
Ω
Io = -10 mA *
Vf
600
710
800
mV
Io = 10 mA
ON resistance N-channel
RON_NGS
2
10
20
Ω
Io = 10 mA *
ON resistance P-channel
RON_PGS
2
10
20
Ω
Io = -10 mA *
Leak current N-channel
ILEAK_NGS
—
—
10
μA
Leak current P-channel
ILEAK_PGS
—
—
10
μA
High voltage
IGH
VDD × 0.7
VDD
—
V
Low voltage
IGL
—
0
VDD × 0.3
V
Input current
IIG
8
16.5
30
μA
[Delay start block]
[Switch]
[Diode]
Voltage of diode
[Gate shading block]
IG = 3.3 V
 This product is not designed for protection against radioactive rays.
*
Design guarantee (No total shipment inspection is made.)
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
3/21
2010.12 - Rev.A
Technical Note
BD8163EFV
4. Overall
Parameter
Symbol
Limits
Min.
Typ.
Max.
Unit
Conditions
[Reference block]
Reference voltage
VREF
1.215
1.240
1.265
V
Drive current
IREF
—
23
—
mA
VREF = 0 V
Load regulation
∆V
—
1
10
mV
IREF = -1 mA
Fosc
0.94
1.1
1.265
MHz
DET 1 On threshold voltage
VDON1
1.7
1.8
1.9
V
DET 1 Off threshold voltage
VDOFF1
1.6
1.7
1.8
V
DET 2 On threshold voltage
VDON2
1.02
1.12
1.22
V
DET 2 Off threshold voltage
VDOFF2
0.90
1.00
1.10
V
DET 3 On threshold voltage
VDON3
0.25
0.30
0.35
V
DET 3 Off threshold voltage
VDOFF3
0.35
0.41
0.47
V
DET 4 On threshold voltage
VDON4
1.02
1.12
1.22
V
DET 4 Off threshold voltage
VDOFF4
0.90
1.00
1.10
V
Icc
0.5
2
5
mA
[Oscillator]
Oscillating frequency
[Oscillator]
[Device]
Average circuit current
No switching
 This product is not designed for protection against radioactive rays.
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
4/21
2010.12 - Rev.A
Technical Note
BD8163EFV
●Reference Data (Unless otherwise specified, Ta = 25℃)
10
1.26
125℃
0.6
25℃
0.4
0.2
-40℃
0
0
1.5
3
4.5
8
6
25℃
4
125℃
2
0
1.5
SUPPLY VOLTAGE : VCC [V]
4.5
1.22
-50
6
1.2
0.8
0.4
3
4.5
1.2
0.8
0.4
5
6
4
2
6
4
2
0
0
1.5
3
4.5
10
15
20
25
30
6
1
0.5
0
-50
-40
120
80
40
0
25
50
75
100 125
0.2
0.4
0.6
0.8
1
SW CURRENT : ISW [A]
Fig. 10
4
3
2
1
0
1
160
0.8
120
N channel
80
P channel
40
SW On Resistance
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
20
40
60
80
INPUT CURRENT : Icp[mA]
Fig. 11 Charge Pump
On Voltage
5/21
4
6
8
10
Fig. 9 REG Current Capacity
200
0
2
BASE CURRENT : IBASE[mA]
0
0
6
0
-25
Fig. 8 Switching Frequency
Temperature
OUTPUT VOLTAGE : Vcp[mV].
160
4.5
5
AMBIENT TEMPERATURE : Ta[℃]
200
3
Fig. 6 SS Source Current
1.5
Fig. 7 DLS Source Current
1.5
SUPPLY VOLTAGE : VDD[V]
2
SUPPLY VOLTAGE : VDD[V]
0
0
VDD VOLTAGE : VDD[V]
SWITCHHING FREQUENCY : f [MHz] .
8
100 125
8
Fig. 5 Internal
Reference Load Regulation
10
75
10
REF CURRENT : IREF[mA]
SUPPLY VOLTAGE : VCC[V]
12
50
0
0
6
Fig. 4 Internal
Reference Line Regulation
25
12
GS VOLTAGE : Vgs[V]
1.5
0
Fig. 3 Internal Reference
Temperature
0
0
-25
AMBIENT TEMPERATURE : Ta[℃]
SS SOURCE CURRENT : ISS[µA] .
REF VOLTAGE : VREF[V]
REF VOLTAGE : VREF[V]
3
1.6
0
.
1.23
Fig. 2 Total Supply Current 2
1.6
DLS SOURCE CURRENT : IDLS[µA]
1.24
SUPPLY VOLTAGE : VDD[V]
Fig. 1 Total Supply Current 1
SW VOLTAGE : VSW [V] .
1.25
-40℃
0
6
REF VOLTAGE : VREF[V]
0.8
SUPPLY CURRENT : IDD[mA]
SUPPLY CURRENT : ICC[mA]
.
.
1
100
0.6
N channel
0.4
P channel
0.2
0
0
20
40
60
80
100
GS CURRENT : Igs[mA]
Fig. 12 Gate Shading
On Voltage
2010.12 - Rev.A
Technical Note
BD8163EFV
●Reference Data (Unless otherwise specified, Ta = 25℃)
12.5
5
15
10
5
Vo1 VOLTAGE : VO1[V]
OUTPUT VOLTAGE : VDD[V]
3
2
1
0
1.5
3
4.5
EFFICIENCY [ % ]
0.4
0.8
1.2
1.6
11.9
11.8
11.7
2
2
3
4
5
6
SUPPLY VOLTAGE : VCC[V]
Fig. 14 VDD Load Regulation
Fig. 15 Vo1 Line Regulation
100
100
95
90
12V
12
10.8V
11
90
10.8V 12V 13V
85
300
400
500 600
0
700
150
300
450
600
OUTPUT CURRENT : IO1[mA]
Fig. 16 Vo1 Load Regulation
Fig. 17 Efficiency vs Output Current
OUTPUT VOLTAGE : VO2[V]
800
400
0
1.5
4.5
6
23.7
23.6
23.5
11.5
13
14.5
16
INPUT VOLTAGE : Vo1[v]
SUPPLY VOLTAGE : VCC[V]
4.5
5
5.5
6
23.8
23.6
23.4
23.2
0
50
100
150
OUTPUT CURRENT : IO2[mA]
Fig. 20 Vo2 Line Regulation
-6
4
23
10
Fig. 19 Power Supply Voltage vs
Max. Output Current Capacity
3.5
24
23.4
3
3
Fig. 18 Efficiency vs Power
Supply Voltage
23.8
1200
70
SUPPLY VOLTAGE : VCC[V]
OUTPUT CURRENT : IO[mA]
1600
80
60
2.5
80
100 200
OUTPUT VOLTAGE : VO2[V]
OUTPUT VOLTAGE : VO1[V]
13
0
MAXIMUM CURRENT : IoMAX[mA] .
12.0
13V
10
Fig. 21 Vo2 Load Regulation
-6
OUTPUT VOLTAGE : VO1[V]
OUTPUT VOLTAGE : VO3[V]
12.1
OUTPUT CURRENT : IDD[mA]
SUPPLY VOLTAGE : VCC [V]
14
12.2
11.5
0
6
Fig. 13 Vo1 Line Regulation
12.3
11.6
0
0
EFFICIENCY [ % ]
OUTPUT VOLTAGE : VDD [V]
12.4
4
-6.1
-6.2
-6.3
-6.4
-6.1
IG
-6.2
VO2GS
-6.3
-6.4
10
11
12
13
14
15
INPUT VOLTAGE : VO1[V]
Fig. 22 Negative-side Charge
Pump Line Regulation
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
0
50
100
150
200
OUTPUT CURRENT : IO[mA]
Fig. 23 Negative-side Charge
Pump Load Regulation
6/21
Fig. 24 Gate Shading
Output Waveform
2010.12 - Rev.A
Technical Note
BD8163EFV
●Block Diagram
10µF
VCC
5V
10µF
Vo1=14.5V (18V MAX)
VCC
Vo1
SW
10µF
160kΩ
Step-up
SS
15kΩ
FB1
Controller
PGND
DET2
0.1µF
1.1V
REF
VREF
0.1µF
Vo1
COMP
Vo2 23.5V
Vo2
5.1kΩ
1µF
C2H
1000pF
(30V MAX)
270kΩ
0.1µF
Charge
DLS
C2L
C1H
Vo1
Pump
0.1µF
Control 1
0.1µF
16kΩ
C1L
TSD
UVLO
FB2
DET4
Step-up
Controller
IG
DET2
1.1V
Vo2GS
Gate
Shading
Controller
DET4
Vo2GS
R
0.01µF
GSOUT
Vo3=-5V
Vo1
1µF
Charge
C3
Pump
Control 2
0.1µF
VCC
91kΩ
18kΩ
REF
Regulator
FB3
Control
DET3
0.3V
DET1
1.8V
Vcc
1µF
BASE
VDD
PGND
4.7µF
GND
GND
VDD=2.5V
Fig. 25 Block Diagram
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
7/21
2010.12 - Rev.A
Technical Note
BD8163EFV
●Pin Assignments Diagram
GND
VDD
REF
BASE
GND
FB3
VCC
DLS
C3
Vo1
COMP
FB1
C1H
C1L
SS
C2L
PGND
SW
C2H
GSOUT
IG
FB2
Vo2GS
Vo2
Pin Arrangements
●Pin Assignments and Function
PIN
NO.
Pin
name
PIN
NO.
Pin
name
1
GND
Ground pin
13
Vo2
2
VDD
LDO feedback input pin
14
Vo2GS
Gate shading source output pin
3
BASE
LDO base drive output pin
15
GSOUT
Gate shading sink output pin
4
VCC
Power supply input pin
16
C2H
Flying capacitor connection pin
5
DLS
Capacity connection pin for delay start
17
C2L
Flying capacitor connection pin
6
COMP
DC/DC difference amplifier output
18
C1L
Flying capacitor connection pin
7
FB1
DC/DC feedback input
19
C1H
Flying capacitor connection pin
8
SS
Soft start capacitor connection pin
20
Vo1
Negative-side charge pump power
supply input pin
9
PGND
Ground pin
21
C3
Negative-side charge pump driver output
10
SW
Switch output
22
GND
Ground pin
11
IG
Gate shading input
23
FB3
Negative-side charge pump feedback
input
12
FB2
Positive-side charge pump feedback
input
24
REF
Internal standard output pin
Function
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
8/21
Function
Positive-side charge pump output
2010.12 - Rev.A
Technical Note
BD8163EFV
●Block Function
・Step-up Controller
A controller circuit for DC/DC boosting.
The switching duty is controlled so that the feedback voltage FB1 is set to 1.24 V (typ.). A soft start operates at the time of
starting. Therefore, the switching duty is controlled by the SS pin voltage.
・Charge Pump Control 1
A controller circuit for the positive-side charge pump.
The switching amplitude is controlled so that the feedback voltage FB2 will be set to 1.24 V (typ.). The start delay time can
be set in the DLS terminal at the time of starting. When the DLS voltage reaches 0.6 V (Typ.), switching waves will be
output from the C1L and C2L pins.
・Charge Pump Control 2
A controller circuit for the negative-side charge pump.
The switching amplitude is controlled so that the feedback voltage FB2 will be set to 0.6 V (Typ.).
・Gate Shading Controller
A controller circuit of gate shading.
The Vo2GS and GSOUT are in on/off control according to IG pin input.
・Regulator Control
A regulator controller circuit for VDD voltage generation.
The base pin current is controlled so that VDD voltage will be set to 2.5 V (typ.).
・DET 1 to DET 4
A detection circuit of each output voltage. This detected signal is used for the starting sequential circuit.
・Start-up Controller
A control circuit for the starting sequence.
Controls to start in order of VCC VDD Vo1 Vo3 Vo2.
・VREF
A block that generates internal reference voltage. 1.24V (Typ.) is output.
・TSD/UVLO
Thermal shutdown/Under-voltage lockout protection/circuit blocks.
The thermal shutdown circuit is shut down at an IC internal temperature of 175℃ and reset at 160℃. The under-voltage
lockout protection circuit shuts down the IC when the VCC is 1.8 V (typ.) or below.
・Starting sequence
For malfunction prevention, starting logic control operates so that each output will rise in order of
VCCVDD Vo1 Vo3 Vo2.
As shown below, detectors DET1 to DET3 detect that the output on the detection side has reached 90% (typ.) of the set
voltage, and starts the next block.
VCC
VDD
Reg
DET1
CTL1
Vo1
Step up
DET2
CTL2
Negative
Charge
Pump
Vo3
DET3
CTL3
Positive
Charge
Pump
DET4
Vo2
CLT4
Starting sequence model
5V
0
Vcc
2.5V
VDD
0
Vo2
Vo1
0
Vo3
Fig. 26 Starting Timing Chart
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
9/21
2010.12 - Rev.A
Technical Note
BD8163EFV
●Selecting Application Components
(1) Setting the Output L Constant
The coil to use for output is decided by the rating current ILR and input current maximum value IINMAX of the coil.
VCC
IINMAX + ∆IL should not reach
the rating value level
IL
L
IL
ILR
Vo
IINMAX
average current
Fig. 27 Coil Current Waveform
Co
Fig. 28 Output Application Circuit Diagram
Adjust so that IINMAX +∆IL do not reach the rating current value ILR. At this time, ∆IL can be obtained by the following
equation.
1
Vo-Vcc
1
ΔIL =
[A]
Here, f is the switching frequency.
Vcc 

L
Vcc
f
Set with sufficient margin because the coil value may have the dispersion of 30%. If the coil current exceeds the rating
current ILR of the coil, it may damage the IC internal element.
BD8163EFV uses the current mode DC/DC converter control and has the optimized design at the coil value. A coil
inductance (L) of 4.7 µH to 15 µH is recommended from viewpoints of electric power efficiency, response, and stability.
(2) Output Capacity Settings
For the capacitor to use for the output, select the capacitor which has the larger value in the ripple voltage VPP allowance
value and the drop voltage allowance value at the time of sudden load change. Output ripple voltage is decided by the
following equation.
1
Vcc
ΔIL
ΔVPP = ILMAX  RESR +
[V]
Here, f is the switching frequency.


(ILMAX )
fCo
Vo
2
Perform setting so that the voltage is within the allowable ripple voltage range.
For the drop voltage during sudden load change; VDR, please perform the rough calculation by the following equation.
ΔI
 10 µs
[V]
Co
However, 10 µs is the rough calculation value of the DC/DC response speed. Please set the capacitance considering
the sufficient margin so that these two values are within the standard value range.
VDR
=
(3) Selecting the Input Capacitor
Since the peak current flows between the input and output at the DC/DC converter, a capacitor is required to install at
the input side. For the reason, the low ESR capacitor is recommended as an input capacitor which has the value more
than 10 µF and less than 100 mΩ. If a capacitor out of this range is selected, the excessive ripple voltage is superposed
on the input voltage; accordingly it may cause the malfunction of IC.
However these conditions may vary according to the load current, input voltage, output voltage, inductance and
switching frequency. Be sure to perform the margin check using the actual product.
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
10/21
2010.12 - Rev.A
Technical Note
BD8163EFV
(4) Setting RC, CC of the Phase Compensation Circuit
In the current mode control, since the coil current is controlled, a pole (phase lag) made by the CR filter composed of the
output capacitor and load resistor will be created in the low frequency range, and a zero (phase lead) by the output
capacitor and ESR of capacitor will be created in the high frequency range. In this case, to cancel the pole of the power
amplifier, it is easy to compensate by adding the zero point with CC and RC to the output from the error amp as shown in
the illustration.
1
[Hz]
Fp =
Open loop gain characteristics
2   RO  CO
fp(Min)
A
fp(Max)
fz(ESR) =
0
Gain
1
2   ESR  CO
[Hz]
[dB]
lOUTMin
fz(ESR)
lOUTMax
Pole at the power amplification stage
When the output current reduces, the load resistance
Ro increases and the pole frequency lowers.
0
Phase
[deg]
-90
fp(Min) =
Error amp phase
compensation characteristics
fz(Max) =
A
[dB]
0
[deg]
2   ROMax  CO
1
2   ROMin  CO
[Hz] at light load
[Hz] at heavy load
Zero at the power amplification stage
When the output capacitor is set larger, the pole
frequency lowers but the zero frequency will not
change. (This is because the capacitor ESR becomes
1/2 when the capacitor becomes 2 times.)
1
[Hz]
fp(Amp.) =
2   Rc  Cc
Gain
Phase
1
0
-90
Fig. 29 Gain vs Phase
L
VCC
Vcc,PVcc
Cin
Ro
ESR
SW
COMP
Rc
Vo
Co
GND,PGND
Cc
Fig. 30 Application Circuit Diagram
It is possible to realize the stable feedback loop by canceling the pole fp(Min.), which is created by the output capacitor
and load resistor, with CR zero compensation of the error amp as shown below.
fz(Amp.) = fp(Min.)
1
2   Rc  Cc
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
=
1
[Hz]
2   Romax  Co
11/21
2010.12 - Rev.A
Technical Note
BD8163EFV
(5) Regulator Controller Settings
The IC incorporates a 2.5 V regulator controller, and a regulator can be formed by using an external PNP transistor.
Design the current capability of the regulator with a margin according to the following formula.
VCC=5 V
VCC
IOMAX = 7mA  hfe [A]
The hfe is the current gain of the external PNP transistor.
7 mA is the sinking current of the internal transistor.
VDD=2.5 V
Regulator
controller
VDD
To inside
IC
Ceramic capacitor
with a capacity of
4.7 F or over
Fig.31
2.5 V
It is not necessary to use the regulator if the input voltage
is 2.5 V. In that case, input 2.5 V to both VCC and VDD.
VCC
Base
Regulator
controller
VDD
IC To inside
Fig.32
5V
When incorporating a regulator into the external
transistor, input the output voltage into the regulator.
VCC
3 pin
regulator
Regulator
controller
To inside
IC
Voltage other
than 2.5 V
Base
(Open)
VDD
Fig.33
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
12/21
2010.12 - Rev.A
Technical Note
BD8163EFV
(6) Setting the Soft Start Time
Soft start is required to prevent the coil current at the time of start from increasing and the overshoot of the output
voltage at the starting time. The relation between the capacity and soft start time is shown in the following figure. Refer
to the figure and set capacity C1. Soft start is required to prevent the coil current at the time of start from increasing and
the overshoot of the output voltage at the starting time. Fig. 34 shows the relation between the capacitance and soft start
time. Please refer to it to set the capacitance.
DELAY TIME[ms]
10
1
0.1
0.01
0.001
0.01
SS CAPACITANCE[uF]
0.1
Fig. 34 SS Pin Capacitance vs Delay Time
As the capacitance, 0.001 µF to 0.1 µF is recommended. If the capacitance is set lower than 0.001 µF, the overshooting
may occur on the output voltage. If the capacitance is set larger than 0.1µF, the excessive back current flow may occur
in the internal parasitic elements when the power is turned OFF and it may damage IC. When there is the activation
relation (sequences) with other power supplies, be sure to use the high accuracy product (such as X5R). Soft start time
may vary according to the input voltage, loads, coils and output capacity. Be sure to verify the operation using the actual
product.
(7) Design of the Feedback Resistor Constant
Refer to the following equation to set the feedback resistor. As the setting range, 10 kΩto 330 kΩis recommended. If
the resistor is set lower than a 10 kΩ, it causes the reduction of power efficiency. If it is set more than 330 kΩ, the offset
voltage becomes larger by the input bias current 0.4 µA(Typ.) in the internal error amplifier.
Sep-up
Reference voltage 1.24 V
Vo =
R8 + R9
R9
 1.24
Vo
[V]
R8
＋
ERR
7
R9
FB1
－
Fig. 35
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
13/21
2010.12 - Rev.A
Technical Note
BD8163EFV
(8) Positive-side Charge Pump Settings
The IC incorporates a charge pump controller, thus making it possible to generate stable gate voltage.
The output voltage is determined by the following formula. As the setting range, 10 kΩto 330 kΩis recommended. If the
resistor is set lower than a 10kΩ, it causes the reduction of power efficiency. If it is set more than 330 kΩ, the offset
voltage becomes larger by the input bias current 0.4 µA (Typ.) in the internal error amp.
Vo2
Vo =
R8 + R9
R9
 1.24
[V]
C8
Reference voltage 1.24 V
R8
＋
ERR
12
1000 pF to 4700 pF
FB2
R9
－
Fig. 36
In order to prevent output voltage overshooting, add capacitor C8 in parallel with R8. The recommended capacitance is
1000 pF to 4700 pF. If a capacitor outside this range is inserted, the output voltage may oscillate.
By connecting capacitance to the DLS, a rising delay time can be set for the positive-side charge pump.
The delay time is determined by the following formula.
 Delay time of charge pump block t DELAY
t DELAY = ( CDLS  0.6 )/5 µA [s6]
where, CDLS is the external capacitance.
(9) Negative-side Charge Pump Settings
This IC incorporates a charge pump controller for negative voltage, thus making it possible to generate stable gate
voltage. The output voltage is determined by the following formula. As the setting range, 10 kΩto 330 kΩis
recommended. If the resistor is set lower than a 10 kΩ, it causes the reduction of power efficiency. If it is set more than
330 kΩ, the offset voltage becomes larger by the input bias current 0.4 µA (Typ.) in the internal error amp.
Vo3
Vo3 =
-
R6
R7
C6
 1.04 + 0.2 V
[V]
0.2 V
R6
1000 pF to 4700 pF
R7
－
23
FB3
24
REF
ERR
＋
1.24 V
Fig.37
The delay time is internally fixed at 200 µs.
In order to prevent output voltage overshooting, insert capacitor C6 in parallel with R6. The recommended capacitance
is 1000 pF to 4700 pF. If a capacitor outside this range is inserted, the output voltage may oscillate.
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
14/21
2010.12 - Rev.A
Technical Note
BD8163EFV
●Gate Shading Setting Method
The IG input signal allows the high-level and low-level control of the positive-side gate voltage. The slope of output can be
set by the external RC. The recommended resistance set value is 200 Ωto 5.1 kΩand the recommended capacitor set
value is 0.001 µF to 0.1 µF. The aggravation of efficiency may be caused if settings outside this range are made.
Determine ∆V by referring to the following value. The following calculation formula is used for ∆V.
ΔV =
Vo2GS
tWL
CR
( 1 - exp ( -
))
[V]
tWH
IG
H
L
tWL
tLH
Vo2GS
H
ΔV
L
Fig. 38
TIMING STANDARD VALUE
Parameter
Symbol
Limits
Min.
Typ.
Max.
Unit
Condition
IG “L” Time
tWL
1
2
-
µs
-
IG “H” Time
tWH
1
18
-
µs
-
Vo2GS “H” to “L Voltage difference
ΔV
-
10
-
V
TWL = 2 µs, R = 500Ω*
Vo2GS “L” to “H” Time
tLH
-
0.1
-
µs
∆V = 10 V *
From positive-side pump
Vo2
Gate
Shading
Control
IG
Vo2GS
R
Gate driver
C
GSOUT
IC
Fig. 39
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
15/21
2010.12 - Rev.A
Technical Note
BD8163EFV
●Application Examples
Although we are confident that the application circuit diagram reflects the best possible recommendations, be sure to verify
circuit characteristics for your particular application. When a circuit is used modifying the externally connected circuit
constant, be sure to decide allowing sufficient margins considering the dispersion of values by external parts as well as our
IC including not only the static but also the transient characteristic. For the patent, we have not acquired the sufficient
confirmation. Please acknowledge the status.
(a) Input voltage
5V
Vo3
Vo2GS
Vo2
REF
VDD
Vo1
Fig. 40
(b) Input voltage
2.5 V
Vo3
Vo2GS
Vo2
REF
Vo1
VDD
Fig. 41
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
16/21
2010.12 - Rev.A
Technical Note
BD8163EFV
(c) When Inserting PMOS Switch
Vo3
Vo2GS
Vo2
REF
Vo1
VDD
Fig. 42
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
17/21
2010.12 - Rev.A
Technical Note
BD8163EFV
●I/O Equivalent Circuits
2.VDD
3.BASE
5.DLS,8.SS
VCC
VDD
VCC
120kΩ
30kΩ
6.COMP
7.FB1,12.FB2
VDD
10.SW
VDD
VDD
11.IG
13.Vo2
14.Vo2GS
VDD
VDD
Vo2
Vo2
200KΩ
15.GSOUT
16.C2H,19.C1H
17.C2L,18.C1L,21.C3
Vo2
23.FB3
Vo1
Vo1
24.REF
VDD
VDD
VDD
Fig. 43
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
18/21
2010.12 - Rev.A
Technical Note
BD8163EFV
●Power Dissipation Reduction
Power Dissipation : Pd (mW)
1200
On 70 mm × 70 mm × 1.6 mm
Glass-epoxy PCB
1100mW
1000
800
600
400
200
0
0
25
50
75
100
125
150
Ambient Temperature: Ta(℃)
Fig.44
●Notes for use
1) Absolute maximum ratings
Use of the IC in excess of absolute maximum ratings such as the applied voltage or operating temperature range may
result in IC damage. Assumptions should not be made regarding the state of the IC (short mode or open mode) when such
damage is suffered. A physical safety measure such as a fuse should be implemented when use of the IC in a special
mode where the absolute maximum ratings may be exceeded is anticipated.
2) GND potential
Ensure a minimum GND pin potential in all operating conditions.
3) Setting of heat
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
4) Pin short and mistake fitting
Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result in
damage to the IC. Shorts between output pins or between output pins and the power supply and GND pins caused by the
presence of a foreign object may result in damage to the IC.
5) Actions in strong magnetic field
Use caution when using the IC in the presence of a strong magnetic field as doing so may cause the IC to malfunction.
6) Testing on application boards
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress.
Always discharge capacitors after each process or step. Ground the IC during assembly steps as an antistatic measure,
and use similar caution when transporting or storing the IC. Always turn the IC's power supply off before connecting it to or
removing it from a jig or fixture during the inspection process.
7) Ground wiring patterns
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns,
placing a single ground point at the application's reference point so that the pattern wiring resistance and voltage
variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the
GND wiring patterns of any external components.
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
19/21
2010.12 - Rev.A
Technical Note
BD8163EFV
8) This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.
P/N junctions are formed at the intersection of these P layers with the N layers of other elements to create a variety of
parasitic elements. For example, when the resistors and transistors are connected to the pins as shown in Fig.45, a
parasitic diode or a transistor operates by inversing the pin voltage and GND voltage. The formation of parasitic elements
as a result of the relationships of the potentials of different pins is an inevitable result of the IC's architecture. The
operation of parasitic elements can cause interference with circuit operation as well as IC malfunction and damage. For
these reasons, it is necessary to use caution so that the IC is not used in a way that will trigger the operation of parasitic
elements, such as the application of voltages lower than the GND (P board) voltage to input and output pins.
Resistor
Transistor (NPN)
B
C
C
B
E
～
～
～
～
(Pin B)
(Pin B)
～
～
(Pin A)
GND
P
P＋
N
N
N
(Pin A)
P substrate
Parasitic element
GND
Parasitic elements
P＋
N
N
～
～
P+
N
P
GND
N
P
P+
Parasitic elements
E
Parasitic element
GND
GND
Fig.45 Example of a Simple Monolithic IC Architecture
9) Overcurrent protection circuits
An overcurrent protection circuit designed according to the output current is incorporated for the prevention of IC
destruction that may result in the event of load shorting. This protection circuit is effective in preventing damage due to
sudden and unexpected accidents. However, the IC should not be used in applications characterized by the continuous
operation or transitioning of the protection circuits. At the time of thermal designing, keep in mind that the current capability
has negative characteristics to temperatures.
10) Thermal shutdown circuit
This IC incorporates a built-in thermal shutdown circuit for the protection from thermal destruction. The IC should be used
within the specified power dissipation range. However, in the event that the IC continues to be operated in excess of its
power dissipation limits, the attendant rise in the chip's temperature Tj will trigger the thermal shutdown circuit to turn off all
output power elements. The circuit automatically resets once the chip's temperature Tj drops.
Operation of the thermal shutdown circuit presumes that the IC's absolute maximum ratings have been exceeded.
Application designs should never make use of the thermal shutdown circuit.
11) Testing on application boards
At the time of inspection of the installation boards, when the capacitor is connected to the pin with low impedance, be sure
to discharge electricity per process because it may load stresses to the IC. Always turn the IC's power supply off before
connecting it to or removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps as
an antistatic measure, and use similar caution when transporting or storing the IC.
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
20/21
2010.12 - Rev.A
Technical Note
BD8163EFV
●Ordering part number
B
D
8
Part No.
1
6
3
Part No.
E
F
V
-
Package
EFV: HTSSOP-B24
E
2
Packaging and forming specification
E2: Embossed tape and reel
HTSSOP-B24
<Tape and Reel information>
7.8±0.1
(MAX 8.15 include BURR)
(5.0)
1.0±0.2
0.53±0.15
(3.4)
1
0.325
Tape
Embossed carrier tape (with dry pack)
Quantity
2000pcs
Direction
of feed
E2
The direction is the 1pin of product is at the upper left when you hold
( reel on the left hand and you pull out the tape on the right hand
)
12
1PIN MARK
+0.05
0.17 -0.03
S
0.08±0.05
0.85±0.05
1.0MAX
+6°
4° −4°
13
5.6±0.1
7.6±0.2
24
0.65
0.08 S
+0.05
0.24 -0.04
0.08
1pin
M
Reel
(Unit : mm)
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
21/21
Direction of feed
∗ Order quantity needs to be multiple of the minimum quantity.
2010.12 - Rev.A
Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the
consent of ROHM Co.,Ltd.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specifications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
information, ROHM shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
implicitly, any license to use or exercise intellectual property or other rights held by ROHM and
other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the
use of such technical information.
The Products specified in this document are intended to be used with general-use electronic
equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices).
The Products specified in this document are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a
Product may fail or malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard
against the possibility of physical injury, fire or any other damage caused in the event of the
failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM
shall bear no responsibility whatsoever for your use of any Product outside of the prescribed
scope or not in accordance with the instruction manual.
The Products are not designed or manufactured to be used with any equipment, device or
system which requires an extremely high level of reliability the failure or malfunction of which
may result in a direct threat to human life or create a risk of human injury (such as a medical
instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuelcontroller or other safety device). ROHM shall bear no responsibility in any way for use of any
of the Products for the above special purposes. If a Product is intended to be used for any
such special purpose, please contact a ROHM sales representative before purchasing.
If you intend to export or ship overseas any Product or technology specified herein that may
be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to
obtain a license or permit under the Law.
Thank you for your accessing to ROHM product informations.
More detail product informations and catalogs are available, please contact us.
ROHM Customer Support System
http://www.rohm.com/contact/
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
R1010A