74F827 10-bit buffer/line driver; non-inverting; 3-state Rev. 04 — 29 January 2010 Product data sheet 1. General description The 74F827 10-bit buffer, provides high performance bus interface buffering for wide data/address paths or buses carrying parity. The device has NOR output enables (OE0, OE1) for maximum control flexibility. 2. Features n High impedance NPN base inputs for reduced loading (20 µA input current in HIGH and LOW states) n IIL = 20 µA compared to 600 µA in FAST family specification n Ideal for high speed, light bus loading with increased fan-in n Controlled rise and fall times to minimize ground bounce n Glitch-free power-up in 3-state n Flow-through pinout architecture for microprocessor oriented applications n Output sink capability, IOL = 64 mA 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version N74F827D 0 °C to 70 °C SO24 plastic small outline package; 24 leads; body width 7.5 mm SOT137-1 N74F827DB 0 °C to 70 °C SSOP24 plastic shrink small outline package; 24 leads; body width 5.3 mm SOT340-1 74F827 NXP Semiconductors 10-bit buffer/line driver; non-inverting; 3-state 4. Functional diagram 1 & EN1 13 2 1 13 3 4 5 6 7 8 9 10 11 2 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 OE0 OE1 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9 23 22 21 20 19 18 17 16 15 14 001aae885 23 1 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 001aae886 Fig 1. Logic symbol Fig 2. A0 OE0 OE1 A1 A2 A3 A4 IEC logic symbol A5 A6 A7 2 3 4 5 6 7 8 9 23 Y0 22 Y1 21 Y2 20 Y3 19 Y4 18 Y5 17 Y6 16 Y7 A8 A9 10 11 15 Y8 14 Y9 1 13 001aae887 Fig 3. Logic diagram 74F827_4 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 04 — 29 January 2010 2 of 13 74F827 NXP Semiconductors 10-bit buffer/line driver; non-inverting; 3-state 5. Pinning information 5.1 Pinning 74F827 OE0 1 24 VCC A0 2 23 Y0 A1 3 22 Y1 A2 4 21 Y2 A3 5 20 Y3 A4 6 19 Y4 A5 7 18 Y5 A6 8 17 Y6 A7 9 16 Y7 A8 10 15 Y8 A9 11 14 Y9 13 OE1 GND 12 001aal243 Fig 4. Pin configuration 5.2 Pin description Table 2. Pin description Symbol Pin Description Unit load HIGH/LOW Load value[1] HIGH/LOW OE0 1 output enable input (active LOW) 1.0/0.033 20 µA/20 µA A0 to A9 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 data input 1.0/0.033 20 µA/20 µA GND 12 ground (0 V) - - OE1 13 output enable input (active LOW) 1.0/0.033 20 µA/20 µA Y0 to Y9 23, 22, 21, 20, 19, 18, 17, 16, 15, 14 data output 1200/106.7 24 mA/64 mA VCC 24 - - [1] supply voltage One FAST Unit Load (UL) is defined as 20 µA in HIGH state, 0.6 µA in LOW state. 74F827_4 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 04 — 29 January 2010 3 of 13 74F827 NXP Semiconductors 10-bit buffer/line driver; non-inverting; 3-state 6. Functional description 6.1 Function table Table 3. Function selection[1] Input Output OEn An L L L L H H H X Z [1] Status Yn transparent disabled H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions VCC supply voltage VI input voltage VO output voltage output in HIGH-state IIK input clamping current VI < 0 V IO output current output in LOW-state Tamb ambient temperature in free-air Tstg storage temperature Min Max Unit −0.5 +7.0 V [1] −0.5 +7.0 V [1] −0.5 +7.0 V −30 +5 mA [2] - 128 mA 0 70 °C −65 +150 °C [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150 °C. 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions VCC supply voltage VIH HIGH-level input voltage 2.0 - - V VIL LOW-level input voltage - - 0.8 V IIK input clamping current −18 - - mA IOH HIGH-level output current −24 - - mA IOL LOW-level output current - - 64 mA 74F827_4 Product data sheet Min Typ Max Unit 4.5 5.0 5.5 V © NXP B.V. 2010. All rights reserved. Rev. 04 — 29 January 2010 4 of 13 74F827 NXP Semiconductors 10-bit buffer/line driver; non-inverting; 3-state 9. Static characteristics Table 6. Static characteristics Symbol Parameter 25 °C Conditions 0 °C to 70 °C Unit Min Typ[1] Max Min Max −1.2 −0.73 - −1.2 - V VCC = ±10 % - - - 2.4 - V VCC = ±5 % - 3.3 - 2.4 - V VCC = ±10 % - - - 2.0 - V VCC = ±5 % - - - 2.0 - V VCC = ±10 % - - - - 0.55 V VCC = ±5 % - 0.42 - - 0.55 V VCC = 0 V; VI = 7.0 V - - - - 100 µA VIK input clamping voltage VCC = 4.5 V; IIK = −18 mA VOH HIGH-level output voltage VCC = 4.5 V; VIL = 0.8 V; VIH = 2.0 V IOH = −15 mA IOH = −24 mA LOW-level output voltage VOL II input leakage current VCC = 4.5 V; VIL = 0.8 V; VIH = 2.0 V IOL = 64 mA IIH HIGH-level input current VCC = 5.5 V; VI = 2.7 V - - - - 20 µA IIL LOW-level input current - - - - −20 µA IOZ OFF-state output current VCC = 5.5 V - - - - 50 µA −50 µA VCC = 5.5 V; VI = 0.5 V VO = 2.7 V VO = 0.5 V - - - - - - - −100 outputs HIGH-state - 50 - - 70 mA outputs LOW-state - 70 - - 100 mA outputs OFF-state - 60 - - 90 mA [2] IO output current VCC = 5.5 V ICC supply current VCC = 5.5 V; VI = GND or VCC [1] All typical values are measured at VCC = 5 V. [2] Not more than one output should be tested at a time, and the duration of the test should not exceed one second. −225 mA 10. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V; for test circuit, see Figure 7. Symbol Parameter tPLH LOW to HIGH propagation delay 25 °C; VCC = 5.0 V Conditions Typ Max Min Max An to Yn; see Figure 5 2.0 5.5 8.5 2.0 9.0 ns CL = 300 pF, 1 output switching CL = 50 pF - 9.5 13.0 - 14.0 ns CL = 300 pF, 10 outputs switching - 12.0 16.0 - 17.0 ns 74F827_4 Product data sheet Min 0 °C to 70 °C; Unit VCC = 5.0 V ± 0.5 V © NXP B.V. 2010. All rights reserved. Rev. 04 — 29 January 2010 5 of 13 74F827 NXP Semiconductors 10-bit buffer/line driver; non-inverting; 3-state Table 7. Dynamic characteristics …continued GND = 0 V; for test circuit, see Figure 7. Symbol Parameter tPHL tPZH tPZL tPHZ tPLZ HIGH to LOW propagation delay OFF-state to HIGH propagation delay OFF-state to LOW propagation delay HIGH to OFF-state propagation delay LOW to OFF-state propagation delay 25 °C; VCC = 5.0 V Conditions 0 °C to 70 °C; Unit VCC = 5.0 V ± 0.5 V Min Typ Max Min Max 2.0 4.5 8.5 2.0 9.0 ns CL = 300 pF, 1 output switching - 7.5 10.0 - 11.0 ns CL = 300 pF, 10 outputs switching - 14.0 17.0 - 18.0 ns 5.0 8.0 12.0 4.5 14.0 ns CL = 300 pF, 1 output switching - 15.0 20.0 - 21.0 ns CL = 300 pF, 10 outputs switching - 15.0 20.0 - 21.0 ns 4.0 6.0 10.5 4.0 11.5 ns CL = 300 pF, 1 output switching - 9.5 13.0 - 14.0 ns CL = 300 pF, 10 outputs switching - 17.0 21.0 - 21.5 ns 2.5 5.0 8.0 2.0 8.5 ns CL = 300 pF, 1 output switching - 15.0 19.0 - 20.0 ns CL = 300 pF, 10 outputs switching - 15.0 19.0 - 20.0 ns 2.5 5.0 8.0 2.0 8.5 ns CL = 300 pF, 1 output switching - 9.5 13.5 - 14.0 ns CL = 300 pF, 10 outputs switching - 12.5 15.5 - 16.0 ns An to Yn; see Figure 5 CL = 50 pF OEn to Yn; see Figure 6 CL = 50 pF OEn to Yn; see Figure 6 CL = 50 pF OEn to Yn; see Figure 6 CL = 50 pF OEn to Yn; see Figure 6 CL = 50 pF 11. Waveforms VI An input VM VM GND tPLH tPHL VOH VM Yn output VM VOL 001aal244 VM = 1.5 V VOL and VOH are typical voltage output levels that occur with the output load. Fig 5. Propagation delay input (An) to output (Yn) 74F827_4 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 04 — 29 January 2010 6 of 13 74F827 NXP Semiconductors 10-bit buffer/line driver; non-inverting; 3-state VI OEn input VM GND tPZL tPLZ 3.5 V output LOW-to-OFF OFF-to-LOW VM VOL + 0.3 V VOL tPHZ VOH tPZH VOH − 0.3 V output HIGH-to-OFF OFF-to-HIGH VM GND outputs enabled outputs disabled outputs enabled 001aal293 VM = 1.5 V VOL and VOH are typical voltage output levels that occur with the output load. Fig 6. Propagation delay 3-state output enable time to LOW-level and output disable time from LOW-level 74F827_4 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 04 — 29 January 2010 7 of 13 74F827 NXP Semiconductors 10-bit buffer/line driver; non-inverting; 3-state VI tW 90 % 90 % negative pulse VM 0V VCC tf tr tr tf VI VI RL VO G DUT RT 90 % positive pulse 0V VEXT VM 10 % CL RL VM VM 10 % mna616 10 % tW 001aac221 a. Input pulse definition b. Test circuit Test data and VEXT levels are given in Table 8. RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. VEXT = Test voltage for switching times. Fig 7. Table 8. Test circuit for measuring switching times Test data Input Load VEXT VI fI tW tr, tf CL RL tPHL, tPLH tPZH, tPHZ tPZL, tPLZ 3.0 V 1 MHz 500 ns ≤ 2.5 ns 50 pF 500 Ω open open 7.0 V 74F827_4 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 04 — 29 January 2010 8 of 13 74F827 NXP Semiconductors 10-bit buffer/line driver; non-inverting; 3-state 12. Package outline SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1 D E A X c HE y v M A Z 24 13 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 12 e detail X w M bp 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.3 0.1 2.45 2.25 0.25 0.49 0.36 0.32 0.23 15.6 15.2 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.01 0.019 0.013 0.014 0.009 0.61 0.60 0.30 0.29 0.05 0.419 0.043 0.055 0.394 0.016 inches 0.1 0.012 0.096 0.004 0.089 0.043 0.039 0.01 0.01 Z (1) 0.9 0.4 0.035 0.004 0.016 θ o 8 o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. Fig 8. REFERENCES OUTLINE VERSION IEC JEDEC SOT137-1 075E05 MS-013 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Package outline SOT137-1 (SO24) 74F827_4 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 04 — 29 January 2010 9 of 13 74F827 NXP Semiconductors 10-bit buffer/line driver; non-inverting; 3-state SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm D SOT340-1 E A X c HE y v M A Z 24 13 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 12 bp e detail X w M 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 8.4 8.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 0.8 0.4 8 o 0 o Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION SOT340-1 Fig 9. REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-150 Package outline SOT340-1 (SSOP24) 74F827_4 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 04 — 29 January 2010 10 of 13 74F827 NXP Semiconductors 10-bit buffer/line driver; non-inverting; 3-state 13. Abbreviations Table 9. Abbreviations Acronym Description DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 14. Revision history Table 10. Revision history Document ID Release date Data sheet status Change notice Supersedes 74F827_4 20100129 Product data sheet - 74F827_3 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • • Legal texts have been adapted to the new company name where appropriate. DIP 24 (SOT222-1) package removed from Section 3 “Ordering information” and Section 12 “Package outline” 74F827_3 20040121 Product specification - 74F827_74F828_2 74F827_74F828_2 19941205 Product specification - - 74F827_4 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 04 — 29 January 2010 11 of 13 74F827 NXP Semiconductors 10-bit buffer/line driver; non-inverting; 3-state 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 15.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 15.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] 74F827_4 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 04 — 29 January 2010 12 of 13 74F827 NXP Semiconductors 10-bit buffer/line driver; non-inverting; 3-state 17. Contents 1 2 3 4 5 5.1 5.2 6 6.1 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . 12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Contact information. . . . . . . . . . . . . . . . . . . . . 12 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2010. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 29 January 2010 Document identifier: 74F827_4