Philips Semiconductors Linear Products Product specification General purpose CMOS timer ICM7555 DESCRIPTION PIN CONFIGURATION The ICM7555 is a CMOS timer providing significantly improved performance over the standard NE/SE555 timer, while at the same time being a direct replacement for those devices in most applications. Improved parameters include low supply current, wide operating supply voltage range, low THRESHOLD, TRIGGER, and RESET currents, no crowbarring of the supply current during output transitions, higher frequency performance and no requirement to decouple CONTROL VOLTAGE for stable operation. D and N Packages The ICM7555 is a stable controller capable of producing accurate time delays or frequencies. GND 1 8 VDD TRIGGER 2 7 DISCHARGE OUTPUT 3 6 THRESHOLD RESET 4 5 CONTROL VOLTAGE In the one-shot mode, the pulse width of each circuit is precisely controlled by one external resistor and capacitor. For astable operation as an oscillator, the free-running frequency and the duty cycle are both accurately controlled by two external resistors and one capacitor. Unlike the bipolar 555 device, the CONTROL VOLTAGE terminal need not be decoupled with a capacitor. The TRIGGER and RESET inputs are active low. The output inverter can source or sink currents large enough to drive TTL loads or provide minimal offsets to drive CMOS loads. • Timing from microseconds through hours • Operates in both astable and monostable modes • Adjustable duty cycle • High output source/sink driver can drive TTL/CMOS • Typical temperature stability of 0.005%/oC at 25°C • Rail-to-rail outputs FEATURES APPLICATIONS • Precision timing • Pulse generation • Sequential timing • Time delay generation • Pulse width modulation • Pulse position modulation • Missing pulse detector • Exact equivalent in most applications for NE/SE555 • Low supply current: 80µA (typ) • Extremely low trigger, threshold, and reset currents: 20pA (typ) • High-speed operation: 500kHz guaranteed • Wide operating supply voltage range guaranteed 3 to 16V over full automotive temperatures • Normal reset function; no crowbarring of supply during output transition • Can be used with higher-impedance timing elements than the bipolar 555 for longer time constants ORDERING INFORMATION TEMPERATURE RANGE ORDER CODE 8-Pin Plastic Dual In-Line Package (DIP) DESCRIPTION 0 to +70°C ICM7555CN 0404B 8-Pin Plastic Small Outline (SO) Package 0 to +70°C ICM7555CD 0174C 8-Pin Plastic Dual In-Line Package (DIP) -40 to +85°C ICM7555IN 0404B 8-Pin Plastic Small Outline (SO) Package -40 to +85°C ICM7555ID 0174C August 31, 1994 337 DWG # 853-1192 13721 Philips Semiconductors Linear Products Product specification General purpose CMOS timer ICM7555 EQUIVALENT BLOCK DIAGRAM FLIP–FLOP VDD RESET 8 4 R THRESHOLD CONTROL VOLTAGE COMPARATOR A + 6 5 OUTPUT DRIVERS 3 OUTPUT – R DISCHARGE COMPARATOR B + 2 7 N – TRIGGER 1 R 1 NOTE: UNUSED INPUTS SHOULD BE CONNECTED TO APPROPRIATE VOLTAGE FROM TRUTH TABLE. TRUTH TABLE RESET1 OUTPUT DISCHARGE SWITCH DON’T CARE LOW LOW ON > 1/3(V+) HIGH LOW ON VTH < 2/3 VTR > 1/3 HIGH STABLE STABLE DON’T CARE <1/3(V+) HIGH HIGH OFF THRESHOLD VOLTAGE TRIGGER VOLTAGE DON’T CARE >2/3(V+) NOTES: 1. RESET will dominate all other inputs: TRIGGER will dominate over THRESHOLD. ABSOLUTE MAXIMUM RATINGS1 SYMBOL VDD VTRIG1 PARAMETER Supply voltage UNITS +18 V Trigger input voltage VCV Control voltage VTH Threshold input voltage VRST RESET input voltage IOUT Output current PDMAX RATING > -0.3 to <VDD + 0.3 V 100 mA N package 1160 mW D package 780 mW -65 to +150 °C 300 °C Maximum power dissipation, TA = 25°C (still air)2 TSTG Storage temperature range TSOLD Lead temperature (Soldering 60s) NOTES: 1. Due to the SCR structure inherent in the CMOS process used to fabricate these devices, connecting any terminal to a voltage greater than VDD + 0.3V or less than GND -0.3V may cause destructive latch-up. For this reason it is recommended that no inputs from external sources not operating from the same power supply be applied to the device before its power supply is established. In multiple systems, the supply of the ICM7555 must be turned on first. 2. Derate above 25°C, at the following rates: N package at 9.3mW/°C D package at 6.2mW/°C 3. See “Power Dissipation Considerations” section. August 31, 1994 338 Philips Semiconductors Linear Products Product specification General purpose CMOS timer ICM7555 DC AND AC ELECTRICAL CHARACTERISTICS TA = 25°C unless otherwise specified. LIMITS SYMBOL PARAMETER TEST CONDITIONS ICM7555 MIN VDD IDD Supply voltage Supply current1 Astable mode timing2 Initial accuracy Drift with supply voltage Drift with temperature3 VTH TMIN < TA < TMAX TYP 3 VDD = VMIN VDD = VMAX UNITS MAX 16 V 50 180 200 300 µA µA 1.0 0.1 5.0 3.0 % %/V RA, RB = 1k to 100k, C = 0.1µF 5V <VDD <15V VDD = 5V VDD = 10V VDD = 15V ppm/oC ppm/oC ppm/oC 50 75 100 Threshold voltage VDD = 5V 0.63 0.65 0.67 xVDD VTRIG Trigger voltage VDD = 5V 0.29 0.31 0.34 xVDD ITRIG Trigger current VDD = VTRIG = VMAX VDD = VTRIG = 5V VDD = VTRIG = VMIN 50 10 1 pA pA pA ITH Threshold current VDD = VTH = VMAX VDD = VTH = 5V VDD = VTH = VMIN 50 10 1 pA pA pA IRST Reset current VDD = VRST = VMAX VDD = VRST = 5V VDD = VRST = VMIN 100 20 2 pA pA pA VRST Reset voltage VDD = VMIN and VMAX 0.4 0.7 1.0 V VCV Control voltage VDD = 5V 0.62 0.65 0.67 xVDD VOL Output voltage (low) 0.1 0.2 0.4 0.4 V V VOH Output voltage (high) VDIS Discharge output voltage VDD = VMAX, ISINK = 3.2mA VDD = 5V, ISINK = 3.2mA VDD = VMAX, VDD = 5V, ISOURCE = -1.0mA ISOURCE = -1.0mA 15.25 4.0 15.7 4.5 VDD VDD VDD = 5V, IDIS = 10.0mA 0.2 0.4 V tR Rise time of output3 RL = 10MΩ, CL = 10pF, VDD = 5V 45 75 ns tF Fall time of output3 RL = 10MΩ, CL = 10pF, VDD = 5V 20 75 ns FMAX Maximum oscillator frequency (astable mode) 500 NOTES: 1. The supply current value is essentially independent of the TRIGGER, THRESHOLD, and RESET voltages. 1.38 . The components are defined in Figure 2. 2. Astable timing is calculated using the following equation: f = (RA + 2RB)C 3. Parameter is not 100% tested. August 31, 1994 339 kHz Philips Semiconductors Linear Products Product specification General purpose CMOS timer ICM7555 TYPICAL PERFORMANCE CHARACTERISTICS 225 200 TA = –55°C SUPPLY CURRENT (IDD ) ( µ A) 175 150 TA = +25°C 125 100 TA = +125°C 75 50 25 0 0 5 10 15 20 SUPPLY VOLTAGE (VDD) Supply Current vs Supply Voltage 100.0 OUTPUT SOURCE CURRENT 9mA) TA = +25°C VDD = 18V 10.0 VDD = 5V 1.0 VDD = 2V 0.1 0.1 1.0 10.0 VDD – VOUT (V) High Output Voltage Drop vs Output Source Current August 31, 1994 340 Philips Semiconductors Linear Products Product specification General purpose CMOS timer ICM7555 TYPICAL PERFORMANCE CHARACTERISTICS (continued) 100.0 TA = 25°C DISCHARGE CURRENT (mA) VDD = 18V VDD = 5V 10.0 VDD = 2V 1.0 0.1 0.1 1.0 10.0 DISCHARGE VOLTAGE (V) Discharge Low Output Voltage vs Discharge Sink Current 100.0 OUTPUT CURRENT (mA) TA = +125°C VDD = 18V 10.0 VDD = 5V 1.0 VDD = 2V 0.1 0.1 1.0 OUTPUT VOLTAGE (V) Low Output Voltage vs Output Sink Current August 31, 1994 341 10.0 Philips Semiconductors Linear Products Product specification General purpose CMOS timer ICM7555 TYPICAL PERFORMANCE CHARACTERISTICS (continued) 100.0 TA = 25°C OUTPUT CURRENT (mA) VDD = 18V 10.0 VDD = 5V VDD = 2V 1.0 0.1 0.1 1.0 10.0 OUTPUT VOLTAGE (V) Low Output Voltage vs Output Sink Current 100.0 OUTPUT CURRENT (mA) VDD = 18V TA = -55°C VDD = 5V 10.0 VDD = 2V 1.0 0.1 0.1 1.0 10.0 OUTPUT VOLTAGE (V) Low Output Voltage vs Output Sink Current PULSE WIDTH FOR TRIGGER (ns) 500 400 300 VDD = 2V 200 VDD = 5V 100 VDD = 18V 0 0 10 20 30 LOWEST LEVEL OF TRIGGER PULSE (%V DD) Minimum Pulse Width for Triggering August 31, 1994 342 40 Philips Semiconductors Linear Products Product specification General purpose CMOS timer ICM7555 TYPICAL PERFORMANCE CHARACTERISTICS (continued) 3 1.0 PROPAGATION DELAY (ns) VDD = 5V 750.0 TA = +125°C 500.0 TA = +25°C 250.0 TA = –55°C 0.0 0 10 20 30 40 LOWEST VOLTAGE OF TRIGGER PULSE (%VDD) Propagation Delay vs Voltage Level of Trigger Pulse NORMALIZED FREQUENCY (%) 6 TA = +25°C RA = RB = 10kΩ 4 C = 0.1µF 2 0 –2 –4 0 5 10 15 20 SUPPLY VOLTAGE (VDD) Normalized Frequency Stability as a Function of Supply Voltage (Astable Mode) NORMALIZED FREQUENCY (%) 4 RA = RB = 1kΩ C = 0.1µF 2 VDD = 18V 0 VDD = 5V –2 VDD = 2V –4 –5.0E1 –2.5E1 0.0 25.0 50.0 75.0 100.0 125.0 TEMPERATURE (°C) Normalized Frequency Stability as a Function of Temperature (Astable Mode) August 31, 1994 343 Philips Semiconductors Linear Products Product specification General purpose CMOS timer ICM7555 TYPICAL PERFORMANCE CHARACTERISTICS (continued) 100.0 (RA + 2RB) VDD = 5V CAPACITANCE (µ F) 10.0 TA = +25°C 1.0 1kΩ 0.1 10kΩ 0.01 100kΩ 0.001 1MΩ 0.0001 10MΩ 0.0 0.1 1.0 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) Free-Running Frequency as a Function of RA, RB, and C 100.0 VDD = 5V CAPACITANCE (µ F) 10.0 TA = +25°C 1kΩ 1.0 RA 0.1 10kΩ 0.01 100kΩ 0.001 1MΩ 0.0001 10MΩ 0.0 1µs 100ns TA = +25°C SUPPLY CURRENT (mA) 100µs 1ms 10ms TIME DELAY 400 200 ICM7555 0 10s Power Supply Considerations 0 200 400 TIME (ns) 600 Although the supply current consumed by the ICM7555 device is very low, the total system supply can be high unless the timing components are high impedance. Therefore, high values for R and low values for C in Figures 2 and 3 are recommended. 800 Figure 1. Supply Current Transient Compared With a Standard Bipolar 555 During an Output Transition Output Drive Capability The output driver consists of a CMOS inverter capable of driving most logic families including CMOS and TTL. As such, if driving CMOS, the output swing at all supply voltages will equal the supply voltage. At a supply voltage of 4.5V or more, the ICM7555 will drive at least 2 standard TTL loads. APPLICATION NOTES General The ICM7555 device is, in most instances, a direct replacement for the NE/SE555 device. However, it is possible to effect economies in the external component count using the ICM7555. Because the August 31, 1994 1s The ICM7555 produces supply current spikes of only 2-3mA instead of 300-400mA and supply decoupling is normally not necessary. Secondly, in most instances, the CONTROL VOLTAGE decoupling capacitors are not required since the input impedance of the CMOS comparators on chip are very high. Thus, for many applications, 2 capacitors can be saved using an ICM7555. NE/SE555 100 100ms Monostable Time Delay vs RA and C bipolar 555 device produces large crowbar currents in the output driver, it is necessary to decouple the power supply lines with a good capacitor close to the device. The 7555 device produces no such transients. See Figure 1. 500 300 10µs 344 Philips Semiconductors Linear Products Product specification General purpose CMOS timer ICM7555 improved over the standard bipolar 555 in that it controls only the internal flip-flop, which in turn controls simultaneously the state of the OUTPUT and DISCHARGE pins. This avoids the multiple threshold problems sometimes encountered with slow falling edges in the bipolar devices. Astable Operation If the circuit is connected as shown in Figure 2, it will trigger itself and free run as a multivibrator. The external capacitor charges through RA and RB and discharges through RB only. Thus, the duty cycle (D) may be precisely set by the ratio of these two resistors. In this mode of operation, the capacitor charges and discharges between 1/3 VDD and 2/3 VDD. Since the charge rate and the threshold levels are directly proportional to the supply voltage, the frequency of oscillation is independent of the supply voltage. V DD 1 RA 1.38 F= (RA + 2RB) C D= 2 RA + RB OUTPUT RA + 2RB 3 RB Monostable Operation 4 V DD In this mode of operation, the timer functions as a one-shot. Initially, the external capacitor (C) is held discharged by a transistor inside the timer. Upon application of a negative pulse to Pin 2,TRIGGER, the internal flip-flop is set which releases the low impedance on DISCHARGE; the external capacitor charges and drives the OUTPUT High. The voltage across the capacitor increases exponentially with a time constant t = RAC. When the voltage across the capacitor equals 2/3 V+, the comparator resets the flip-flop, which in turn discharges the capacitor rapidly and also drives the OUTPUT to its low state. TRIGGER must return to a high state before the OUTPUT can return to a low state. 8 GND TRIGGER DISHCARGE OUTPUT THRESHOLD RESET CONTROL VOLTAGE V DD 7 6 5 C Figure 2. Astable Operation V DD 1 8 RA Control Voltage The CONTROL VOLTAGE terminal permits the two trip voltages for the THRESHOLD and TRIGGER internal comparators to be controlled. This provides the possibility of oscillation frequency modulation in the astable mode, or even inhibition of oscillation, depending on the applied voltage. In the monostable mode, delay times can be changed by varying the applied voltage to the CONTROL VOLTAGE pin. 2 3 4 DISHCARGE OUTPUT THRESHOLD RESET CONTROL VOLTAGE 7 6 5 OPTIONAL CAPACITOR RESET VDD < 18V The RESET terminal is designed to have essentially the same trip voltage as the standard bipolar 555, i.e., 0.6 to 0.7V. At all supply voltages it represents an extremely high input impedance. The mode of operation of the RESET function is, however, much t = 1.05 RA C August 31, 1994 TRIGGER Figure 3. Monostable Operation 345 C