LINER LTC3805-5 Adjustable frequency current mode flyback/ boost/sepic dc/dc controller Datasheet

LTC3805-5
Adjustable Frequency
Current Mode Flyback/
Boost/SEPIC DC/DC Controller
DESCRIPTION
FEATURES
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VIN and VOUT Limited Only by External Components
4.5V Undervoltage Lockout Threshold
Adjustable Slope Compensation
Adjustable Overcurrent Protection with Automatic
Restart
Adjustable Operating Frequency (70kHz to 700kHz)
With One External Resistor
Synchronizable to an External Clock
±1.5% Reference Accuracy
Only 100mV Current Sense Voltage Drop
RUN Pin with Precision Threshold and Adjustable
Hysteresis
Programmable Soft-Start with One External Capacitor
Low Quiescent Current: 360µA
Small 10-Lead MSOP and 3mm × 3mm DFN
APPLICATIONS
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The LTC®3805-5 is a current mode DC/DC controller designed to drive an N-channel MOSFET in flyback, boost
and SEPIC converter applications. Operating frequency
and slope compensation can be programmed by external
resistors. Programmable overcurrent sensing protects
the converter from overload and short-circuit conditions.
Soft-start can be programmed using an external capacitor
and the soft-start capacitor also programs an automatic
restart feature.
The LTC3805-5 provides ±1.5% output voltage accuracy
and consumes only 360µA of quiescent current during
normal operation and only 40µA during micropower startup. Using a 9.5V internal shunt regulator, the LTC3805-5
can be powered from a high VIN through a resistor or it
can be powered directly from a low impedance DC voltage
from 4.7V to 8.8V.
The LTC3805-5 is available in the 10-lead MSOP package
and the 3mm × 3mm DFN package.
Automotive Power Supplies
Telecom Power Supplies
Isolated Electronic Equipment
Auxiliary/Housekeeping Power Supplies
Power over Ethernet
L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered
trademarks, No RSENSE and ThinSOT are trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
Efficiency and Power Loss vs Load Current
5V to 12V/1A Boost Converter
100
VCC
RUN
100µF
GATE
LTC3805-5
OC
ITH
20k
470pF
0.1µF
118k
SSFLT
ISENSE
FS
1.33k
3k
191k
95
2.5
2.0
5V EFFICIENCY
8.5V EFFICIENCY
90
1.5
8.5V LOSS
85
5V LOSS
1
FB
SYNC
GND
8mΩ
13.7k
38055 TA01a
80
75
0.01
POWER LOSS (W)
22µF
×2
VOUT
12V
1A
EFFICIENCY (%)
VIN
5V
UPS840
4.3µH
0.5
1
0.1
LOAD CURRENT (A)
10
0
38055TA01b
38055fe
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LTC3805-5
ABSOLUTE MAXIMUM RATINGS
(Note 1)
VCC to GND
Low Impedance Source......................... –0.3V to 8.8V
Current Fed.........................................25mA into VCC*
SYNC............................................................ –0.3V to 6V
SSFLT........................................................... –0.3V to 5V
FB, ITH, FS.................................................. –0.3V to 3.5V
RUN............................................................ –0.3V to 18V
OC, ISENSE..................................................... –0.3V to 1V
Operating Junction Temperature Range
(Notes 2, 3) ............................................ –55°C to 150°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
MSE Package..................................................... 300°C
*LTC3805-5 internal clamp circuit regulates VCC voltage to 9.5V
PIN CONFIGURATION
TOP VIEW
SSFLT
1
ITH
2
TOP VIEW
10 GATE
11
SSFLT
ITH
FB
RUN
FS
9 VCC
FB
3
RUN
4
7 ISENSE
FS
5
6 SYNC
8 OC
DD PACKAGE
10-LEAD (3mm × 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 45°C/W
EXPOSED PAD (PIN 11) IS GND, MUST BE CONNECTED TO GND
1
2
3
4
5
11
10
9
8
7
6
GATE
VCC
OC
ISENSE
SYNC
MSE PACKAGE
10-LEAD PLASTIC MSOP
TJMAX = 125°C, θJA = 45°C/W
EXPOSED PAD (PIN 11) IS GND, MUST BE CONNECTED TO GND
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3805EMSE-5#PBF
LTC3805EMSE-5#TRPBF
LTDGX
10-Lead Plastic MSOP
–40°C to 85°C
LTC3805IMSE-5#PBF
LTC3805IMSE-5#TRPBF
LTDGX
10-Lead Plastic MSOP
–40°C to 125°C
LTC3805HMSE-5#PBF
LTC3805HMSE-5#TRPBF
LTDGX
10-Lead Plastic MSOP
–40°C to 150°C
LTC3805MPMSE-5#PBF
LTC3805MPMSE-5#TRPBF
LTDGX
10-Lead Plastic MSOP
–55°C to 150°C
LTC3805EDD-5#PBF
LTC3805EDD-5#TRPBF
LDHB
10-Lead (3mm × 3mm) Plastic DFN
–40°C to 85°C
LTC3805IDD-5#PBF
LTC3805IDD-5#TRPBF
LDHB
10-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
38055fe
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LTC3805-5
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C, VCC = 5V, unless otherwise noted (Note 2).
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
VTURNON
VCC Turn-On Voltage
VCC Rising
l
4.3
4.5
4.7
V
VTURNOFF
VCC Turn-Off Voltage
VCC Falling
l
3.75
3.95
4.15
V
0.55
UNITS
VHYST
VCC Hysteresis
VCLAMP1mA
VCC Shunt Regulator Voltage
ICC = 1mA, VRUN = 0
l
8.8
9.25
9.65
V
V
VCLAMP25mA
VCC Shunt Regulator Voltage
ICC = 25mA, VRUN = 0
l
8.9
9.5
9.9
V
ICC
Input DC Supply Current
Normal Operation (fOSC = 200kHz)
(Note 4)
360
VRUN < VRUNON or VCC < VTURNON – 100mV
(Micropower Start-Up)
l
µA
40
90
µA
VRUNON
RUN Turn-On Voltage
VCC = VTURNON + 100mV
l
1.122
1.207
1.292
V
VRUNOFF
RUN Turn-Off Voltage
VCC = VTURNON + 100mV
l
1.092
1.170
1.248
V
IRUN(HYST)
RUN Hysteresis Current
l
4
5
5.8
µA
VFB
Regulated Feedback Voltage
l
l
l
l
0.788
0.780
0.780
0.770
0.770
0.800
0.800
0.800
0.800
0.800
0.812
0.812
0.812
0.820
0.820
V
V
V
V
V
0°C ≤ TJ ≤ 85°C (E-Grade) (Note 5)
–40°C ≤ TJ ≤ 85°C (E-Grade) (Note 5)
–40°C ≤ TJ ≤ 125°C (I-Grade) (Note 5)
–40°C ≤ TJ ≤ 150°C (H-Grade) (Note 5)
–55°C ≤ TJ ≤ 150°C (MP-Grade)
IFB
VFB Input Current
VITH = 1.3V (Note 5)
gm
Error Amplifier Transconductance
ITH Pin Load = ±5µA (Note 5)
333
µA/V
DVO(LINE)
Output Voltage Line Regulation
VTURNOFF < VCC < VCLAMP1mA (Note 5)
0.05
mV/V
DVO(LOAD)
Output Voltage Load Regulation
ITH Sinking 5µA (Note 5)
ITH Sourcing 5µA (Note 5)
3
3
mV/µA
mV/µA
fOSC
Oscillator Frequency
RFS = 350k
70
kHz
RFS = 36k
700
kHz
20
DCON(MIN)
Minimum Switch-On Duty Cycle
fOSC = 200kHz
DCON(MAX)
Maximum Switch-On Duty Cycle
fOSC = 200kHz
70
fSYNC
As a Function of fOSC
70kHz < fOSC < 700kHz,
70kHz < fSYNC < 700kHz
67
nA
6
9
%
80
95
%
133
%
VSYNC
Minimum SYNC Amplitude
ISS
Soft-Start Current
–6
2.9
µA
IFTO
Fault Timeout Current
2
µA
tSS(INT)
Internal Soft-Start Time
No External Capacitor on SSFLT
1.8
ms
tFTO(INT)
Internal Fault Timeout
No External Capacitor on SSFLT
4.5
ms
tRISE
Gate Drive Rise Time
CLOAD = 3000pF
30
ns
tFALL
Gate Drive Fall Time
CLOAD = 3000pF
VI(MAX)
Peak Current Sense Voltage
RSL = 0 (Note 6)
ISL(MAX)
Peak Slope Compensation Output Current
(Note 7)
VOCT
Overcurrent Threshold
ROC = 0 (Note 8)
IOC
Overcurrent Threshold Adjust Current
30
l
85
100
l
85
100
ns
115
mV
115
mV
10
10
V
µA
µA
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LTC3805-5
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3805-5 is tested under pulsed conditions such that
TJ ≈ TA. The LTC3805E-5 is guaranteed to meet specifications from
0°C to 85°C. Specifications over the –40°C to 85°C operating junction
temperature range are assured by design, characterization and correlation
with statistical process controls. The LTC3805I-5 is guaranteed over the
–40°C to 125°C operating junction temperature range, the LTC3805H-5 is
guaranteed over the full –40°C to 150°C operating junction temperature
range and the LTC3805MP-5 is tested and guaranteed over the full –55°C
to 150°C operating temperature range. High junction temperatures
degrade operating lifetimes. Operating lifetime is derated at junction
temperatures greater than 125°C. Note that the maximum ambient
temperature consistent with these specifications is determined by specific
operating conditions in conjunction with board layout, the rated package
thermal resistance and other environmental factors.
Note 3: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formula:
TJ = TA + (PD • 45°C/W)
Note 4: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency.
Note 5: The LTC3805-5 is tested in a feedback loop that servos VFB to the
output of the error amplifier while maintaining ITH at the midpoint of the
current limit range.
Note 6: Peak current sense voltage is reduced dependent on duty cycle
and an optional external resistor in series with the SENSE pin. For
details, refer to Programmable Slope Compensation in the Applications
Information section.
Note 7: Guaranteed by design.
Note 8: Overcurrent threshold voltage is reduced dependent on an
optional external resistor in series with the OC pin. For details, refer to
Programmable Overcurrent in the Applications Information section.
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LTC3805-5
TYPICAL PERFORMANCE CHARACTERISTICS
Reference Voltage
vs Temperature
Reference Voltage
vs Supply Voltage
Oscillator Frequency vs RFS
812
0.800300
800
808
0.800200
700
804
0.800100
800
fOSC (kHz)
VFB (V)
VFB VOLTAGE (mV)
600
0.800000
796
0.799900
792
0.799800
788
–75 –50 –25
0.799700
500
400
300
200
0 25 50 75 100 125 150
TEMPERATURE (°C)
100
4
5
6
7
VCC (V)
8
9
198
197
5
6
7
8
9
201
RFS = 124kΩ
200
199
1.195
1.190
1.185
VRUN(OFF)
1.180
1.175
198
–75 –50 –25
VCC (V)
0 25 50 75 100 125 150
TEMPERATURE (°C)
38055 G04
1.170
–75 –50 –25
0 25 50 75 100 125 150
TEMPERATURE (°C)
38055 G05
RUN Hysteresis Current
vs Temperature
38055 G06
VCC Undervoltage Lockout
Thresholds vs Temperature
5.20
5.0
5.10
5.00
4.90
4.80
4.70
–75 –50 –25
VRUN(ON)
1.200
VCC UNDERVOLTAGE LOCKOUT (V)
4
400
1.205
RUN VOLTAGE (V)
OSCILLATOR FREQUENCY (kHz)
199
IRUN(HYST)
fOSC (kHz)
200
300
RUN Undervoltage Lockout
Thresholds vs Temperature
202
RFS = 124kΩ
200
38055 G03
Oscillator Frequency
vs Temperature
203
201
100
38055 G02
Oscillator Frequency
vs Supply Voltage
202
0
RFS (kΩ)
38055 G01
196
0
10
0 25 50 75 100 125 150
TEMPERATURE (°C)
38055 G07
4.5
4.0
VTURN(ON)
VTURN(OFF)
3.5
3.0
–75 –50 –25
0 25 50 75 100 125 150
TEMPERATURE (°C)
38055 G08
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LTC3805-5
TYPICAL PERFORMANCE CHARACTERISTICS
Start-Up ICC Supply Current
vs Temperature
VCC Shunt Regulator Voltage
vs Temperature
ICC Supply Current
vs Temperature
360
50
9.60
9.55
350
SUPPLY CURRENT (µA)
46
44
42
40
38
36
34
340
330
320
300
–75 –50 –25
Internal Soft-Start Time
vs Temperature
2.20
100.2
100.0
99.8
99.6
99.4
99.2
INTERNAL SOFT-START TIME (ms)
104
OVERCURRENT THRESHOLD (mV)
PEAK CURRENT SENSE VOLTAGE (mV)
100.8
100.4
102
100
0 25 50 75 100 125 150
TEMPERATURE (°C)
98
96
94
–75 –50 –25
0 25 50 75 100 125 150
TEMPERATURE (°C)
38055 G12
2.15
2.10
2.05
2.00
1.95
1.90
–75 –50 –25
0 25 50 75 100 125 150
TEMPERATURE (°C)
38055 G14
38055 G13
External Soft-Start Current
vs Temperature
External Timeout Current
vs Temperature
2.1
IFTO EXTERNAL TIMEOUT CURRENT (µA)
5.4
5.3
ISS SOFT-START CURRENT (µA)
0 25 50 75 100 125 150
TEMPERATURE (°C)
38055 G11
Overcurrent Threshold
vs Temperature
100.6
VCLAMP1mA
38055 G10
Peak Current Sense Voltage
vs Temperature
5.2
5.1
5.0
4.9
4.8
4.7
4.6
4.5
4.4
–75 –50 –25
9.35
9.20
–75 –50 –25
0 25 50 75 100 125 150
TEMPERATURE (°C)
38055 G09
99.0
–75 –50 –25
9.40
9.25
32
0 25 50 75 100 125 150
TEMPERATURE (°C)
9.45
9.30
310
30
–75 –50 –25
VCLAMP25mA
9.50
VCLAMP (V)
START-UP SUPPLY CURRENT (µA)
48
0 25 50 75 100 125 150
TEMPERATURE (°C)
38055 G15
2.0
1.9
1.8
1.7
1.6
1.5
–75 –50 –25
0 25 50 75 100 125 150
TEMPERATURE (°C)
38055 G16
38055fe
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LTC3805-5
PIN FUNCTIONS
SSFLT (Pin 1): Soft-Start Pin. A capacitor placed from
this pin to GND (Exposed Pad) controls the rate of rise of
converter output voltage during start-up. This capacitor is
also used for time out after a fault prior to restart.
ISENSE (Pin 7): Performs two functions: for current mode
control, it monitors the switch current, using the voltage
across an external current sense resistor. Pin 7 also injects
a current ramp that develops slope compensation voltage
across an optional external programming resistor.
ITH (Pin 2): Error Amplifier Compensation Point. Normal
operating voltage range is clamped between 0.7V and
1.9V.
OC (Pin 8): Overcurrent Pin. Connect this pin to the external switch current sense resistor. An additional resistor
programs the overcurrent trip level.
FB (Pin 3): Receives the feedback voltage from an external
resistor divider across the output.
VCC (Pin 9): Supply Pin. A capacitor must closely decouple
VCC to GND (Exposed Pad).
RUN (Pin 4): An external resistor divider connects this pin
to VIN and sets the thresholds for converter operation.
GATE (Pin 10): Gate Drive for the External N-Channel
MOSFET. This pin swings from GND to VCC.
FS (Pin 5): A resistor connected from this pin to ground
sets the frequency of operation.
GND (Exposed Pad Pin 11): Ground. A capacitor must
closely decouple GND to VCC (Pin 9). The exposed pad
must be soldered to electrical ground on PCB for electrical
contact and rated thermal performance.
SYNC (Pin 6): Input to synchronize the oscillator to an
external source.
BLOCK DIAGRAM
9
4
VCC
SOFT-START RAMP
800mV
REFERENCE
1
UNDERVOLTAGE
LOCKOUT
SSFLT
OC
SHUTDOWN
SOFT-START
FAULT
OVERCURRENT
COMPARATOR
10µA
8
RUN
+
–
100mV
+
–
ERROR
AMPLIFIER
CURRENT
COMPARATOR
R
+
Q
S
3
FB
GATE
DRIVER
GATE
10
–
SHUTDOWN
SLOPE
COMP
CURRENT
RAMP
20mV
OSCILLATOR
ITH CLAMPS
11
SWITCHING
LOGIC AND
BLANKING
CIRCUIT
GND
ISENSE
1.2V
2
ITH
5
FS
6
7
SYNC
38055 BD
38055fe
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LTC3805-5
OPERATION
The LTC3805-5 is a programmable-frequency current mode
controller for flyback, boost and SEPIC DC/DC converters.
The LTC3805-5 is designed so that none of its pins need
to come in contact with the input or output voltages of
the power supply circuit of which it is a part, allowing
the conversion of voltages well beyond the LTC3805-5’s
absolute maximum ratings.
Main Control Loop
Please refer to the Block Diagram of this data sheet and
the Typical Application shown on the front page. An external resistive voltage divider presents a fraction of the
output voltage to the FB pin. The divider is designed so
that when the output is at the desired voltage, the FB pin
voltage equals the 800mV internal reference voltage. If
the load current increases, the output voltage decreases
slightly, causing the FB pin voltage to fall below the 800mV
reference. The error amplifier responds by feeding current
into the ITH pin causing its voltage to rise. Conversely, if
the load current decreases, the FB voltage rises above the
800mV reference and the error amplifier sinks current away
from the ITH pin causing its voltage to fall.
The voltage at the ITH pin controls the pulse-width modulator formed by the oscillator, current comparator and SR
latch. Specifically, the voltage at the ITH pin sets the current comparator’s trip threshold. The current comparator’s
ISENSE input monitors the voltage across an external current
sense resistor in series with the source of the external
MOSFET. At the start of a cycle, the LTC3805-5’s oscillator
sets the SR latch and turns on the external power MOSFET.
The current through the external power MOSFET rises as
does the voltage on the ISENSE pin. The LTC3805-5’s current comparator trips when the voltage on the ISENSE pin
exceeds a voltage proportional to the voltage on the ITH pin.
This resets the SR latch and turns off the external power
MOSFET. In this way, the peak current levels through the
external MOSFET and the flyback transformer’s primary
and secondary windings are controlled by the voltage on
the ITH pin. If the current comparator does not trip, the
LTC3805-5 automatically limits the duty cycle to 80%,
resets the SR latch, and turns off the external MOSFET.
The path from the FB pin, through the error amplifier,
current comparator and the SR latch implements the
closed-loop current mode control required to regulate the
output voltage against changes in input voltage or output
current. For example, if the load current increases, the
output voltage decreases slightly, and sensing this, the
error amplifier sources current from the ITH pin, raising
the current comparator threshold, thus increasing the peak
currents through the transformer primary and secondary.
This delivers more current to the load and restores the
output voltage to the desired level.
The ITH pin serves as the compensation point for the control
loop. Typically, an external series RC network is connected
from ITH to ground and is chosen for optimal response to
load and line transients. The impedance of this RC network
converts the output current of the error amplifier to the
ITH voltage which sets the current comparator threshold
and commands considerable influence over the dynamics
of the voltage regulation loop.
38055fe
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LTC3805-5
OPERATION
Start-Up/Shutdown
Setting the Oscillator Frequency
The LTC3805-5 has two shutdown mechanisms to disable
and enable operation: an undervoltage lockout on the VCC
supply pin voltage, and a precision-threshold RUN pin. The
voltage on both pins must exceed the appropriate threshold
before operation is enabled. The LTC3805-5 transitions
into and out of shutdown according to the state diagram
shown in Figure 1. Operation in fault timeout is discussed
in a subsequent section. During shutdown the LTC3805-5
draws only a small 40µA current.
Connect a frequency set resistor RFS from the FS pin to
ground to set the oscillator frequency over a range from
70kHz to 700kHz. The oscillator frequency is calculated
from:
The undervoltage lockout (UVLO) mechanism prevents
the LTC3805-5 from trying to drive the external MOSFET
gate with insufficient voltage on the VCC pin. The voltage
at the VCC pin must initially exceed VTURNON = 4.5V to enable LTC3805-5 operation. After operation is enabled, the
voltage on the VCC pin may fall as low as VTURNOFF = 4V
before undervoltage lockout disables the LTC3805-5. See
the Applications Information section for more detail.
The RUN pin is connected to the input voltage using a
voltage divider. Converter operation is enabled when the
voltage on the RUN pin exceeds VRUNON = 1.207V and
disabled when the voltage falls below VRUNOFF = 1.170V.
Additional hysteresis is added by a 5µA current source
acting on the voltage divider’s Thevenin resistance. Setting
the input voltage range and hysteresis is further discussed
in the Applications Information section.
fOSC =
24 • 109
RFS − 1500
The oscillator may be synchronized to an external clock
using the SYNC input. The rising edge of the external clock
on the SYNC pin triggers the beginning of a switching
period, i.e., the GATE pin going high. The pulse width of
the external clock is quite flexible.
Overcurrent Protection
With the OC pin connected to the external MOSFET’s current
sense resistor, the converter is protected in the event of
an overload or short-circuit on the output. During normal
operation the peak value of current in the external MOSFET,
as measured by the current sense resistor (plus any adjustment for slope compensation), is set by the voltage on the
ITH pin operating through the current comparator. As the
output current increases, so does the voltage on the ITH
pin and so does the peak MOSFET current.
VRUN > VRUNON
AND VCC > VTURNON
LTC3805-5
SHUTDOWN
VRUN < VRUNOFF
LTC3805-5
ENABLED
VCC < VTURNOFF
VSSFLT < 0.7V
LTC3805-5
FAULT
TIMEOUT
VOC > 100mV
38055 F01
Figure 1. Start-Up/Shutdown State Diagram
38055fe
9
LTC3805-5
OPERATION
First, consider operation without overcurrent protection.
For some maximum converter output current, the voltage
on the ITH pin rises to and is clamped at approximately 1.9V.
This corresponds to a 100mV limit on the voltage at the
ISENSE pin. As the output current is further increased, the
duty cycle is reduced as the output voltage sags. However,
the peak current in the external MOSFET is limited by the
100mV threshold at the ISENSE pin.
As the output current is increased further, eventually,
the duty cycle is reduced to the 6% minimum. Since the
external MOSFET is always turned on for this minimum
amount of time, the current comparator no longer limits
the current through the external MOSFET based on the
100mV threshold. If the output current continues to increase, the current through the MOSFET could rise to a
level that would damage the converter.
To prevent damage, the overcurrent pin, OC, is also
connected to the current sense resistor, and a fault is
triggered if the voltage on the OC pin exceeds 100mV. To
protect itself, the converter stops operating as described
in the next section. External resistors can be used to adjust the overcurrent threshold to voltages higher or lower
than 100mV as described in the Applications Information
section.
Soft-Start and Fault Timeout Operation
The soft-start and fault timeout of the LTC3805-5 uses either
a fixed internal timer or an external timer programmed
by a capacitor from the SSFLT pin to GND. The internal
soft-start and fault timeout times are minimums and can
be increased by placing a capacitor from the SSFLT pin
to GND. Operation is shown in Figure 1.
Leave the SSFLT pin open to use the internal soft-start and
fault timeout. The internal soft-start is complete in about
1.8ms. In the event of an overcurrent as detected by the
OC pin exceeding 100mV, the LTC3805-5 shuts down and
an internal timing circuit waits for a fault timeout of about
4.25ms and then restarts the converter.
Add a capacitor CSS from the SSFLT pin to GND to increase
both the soft-start time and the time for fault timeout. During soft-start, CSS is charged with a 6µA current. When the
LTC3805-5 comes out of shutdown, the LTC3805-5 quickly
charges CSS to about 0.7V at which point GATE begins
switching. From that point, GATE continues switching with
increasing duty cycle until the SSFLT pin reaches about
2.25V at which point soft-start is over and closed-loop
regulation begins. The voltage on the SSFLT pin additionally further charges to about 4.75V.
CSS also performs the timeout function in the event of a
fault. After a fault, CSS is slowly discharged from about
4.75V to about 0.7V by a 2µA current. When the voltage
on the SSFLT pin reaches 0.7V the converter attempts to
restart. More detail on programming the external soft-start
fault timeout is described in the Applications Information
section.
Powering the LTC3805-5
A built-in shunt regulator from the VCC pin to GND limits
the voltage on the VCC pin to approximately 9.5V as long
as the shunt regulator is not forced to sink more than
25mA. The shunt regulator is always active, even when
the LTC3805-5 is in shutdown, since it serves the vital
function of protecting the VCC pin from overvoltage. The
shunt regulator permits the use of a wide variety of powering schemes for the LTC3805-5 even from high voltage
sources that exceed the LTC3805-5’s absolute maximum
ratings. Further details on powering schemes are described
in the Applications Information section.
Adjustable Slope Compensation
The LTC3805-5 injects a 10µA peak current ramp out of
its ISENSE pin which can be used, in conjunction with an
external resistor, for slope compensation in designs that
require it. This current ramp is approximately linear and
begins at zero current at 6% duty cycle, reaching peak
current at 80% duty cycle. Additional details are provided
in the Applications Information section.
38055fe
10
LTC3805-5
APPLICATIONS INFORMATION
Many LTC3805-5 application circuits can be derived from
the topologies shown on the first page or in the Typical
Applications section of this data sheet.
The LTC3805-5 itself imposes no limits on allowed input
voltage VIN or output voltage VOUT. These are all determined
by the ratings of the external power components. In Figure 8,
the factors are: Q1 maximum drain-source voltage (BVDSS),
on-resistance (RDS(ON)) and maximum drain current, T1
saturation flux level and winding insulation breakdown
voltages, CIN and COUT maximum working voltage, equivalent series resistance (ESR), and maximum ripple current
ratings, and D1 and RSENSE power ratings.
VCC Bias Power
The VCC pin must be bypassed to the GND pin with a
minimum 1µF ceramic or tantalum capacitor located immediately adjacent to the two pins. Proper supply bypassing
is necessary to supply the high transient currents required
by the MOSFET gate driver.
For maximum flexibility, the LTC3805-5 is designed so
that it can be operated from voltages well beyond the
LTC3805-5’s absolute maximum ratings. Figure 2 shows
the simplest case, in which the LTC3805-5 is powered
with a resistor RVCC connected between the input voltage
and VCC. The built-in shunt regulator limits the voltage on
the VCC pin to around 9.5V as long as the internal shunt
regulator is not forced to sink more than 25mA. This powering scheme has the drawback that the power loss in the
resistor reduces converter efficiency and the 25mA shunt
regulator maximum may limit the maximum-to-minimum
range of input voltage.
The typical application circuit in Figure 9 shows a different
flyback converter bias power strategy for a case in which
neither the input or output voltage is suitable for providing
bias power to the LTC3805-5. A small NPN preregulator
transistor and a Zener diode are used to accelerate the
rise of VCC and reduce the value of the VCC bias capacitor.
The flyback transformer has an additional bias winding to
provide bias power. Note that this topology is very powerful because, by appropriate choice of transformer turns
ratio, the output voltage can be chosen without regard to
the value of the input voltage or the VCC bias power for
the LTC3805-5. The number of turns in the bias winding
is chosen according to
NBIAS = NSEC
VCC + VD2
VOUT + VD1
where NBIAS is the number of turns in the bias winding,
NSEC is the number of turns in the secondary winding,
VCC is the desired voltage to power the LTC3805-5, VOUT
is the converter output voltage, VD1 is the forward voltage
drop of D1 and VD2 is the forward voltage drop of D2.
Note that since VOUT is regulated by the converter control
loop, VCC is also regulated although not as precisely. If an
“off-the-shelf” transformer with excessive bias windings
is used, the resistor, RBIAS in Figure 9, can be added to
limit the current.
Transformer Design Considerations
Transformer specification and design is perhaps the most
critical part of applying the LTC3805-5 successfully. In
addition to the usual list of caveats dealing with high frequency power transformer design, the following should
prove useful.
VIN
RVCC
LTC3805-5
VCC
CVCC
GND
38055 F02
Figure 2. Powering the LTC3805-5 via the
Internal Shunt Regulator
Turns Ratios
Due to the use of the external feedback resistor divider
ratio to set output voltage, the user has relative freedom
in selecting transformer turns ratio to suit a given application. Simple ratios of small integers, e.g., 1:1, 2:1,
3:2, etc. can be employed which yield more freedom in
setting total turns and transformer inductance. Simple
integer turns ratios also facilitate the use of “off-the-shelf”
configurable transformers. Turns ratio can be chosen on
38055fe
11
LTC3805-5
APPLICATIONS INFORMATION
the basis of desired duty cycle. However, remember that
the input supply voltage plus the secondary-to-primary
referred version of the flyback pulse (including leakage
spike) must not exceed the allowed external MOSFET
breakdown rating.
Leakage Inductance
Transformer leakage inductance (on either the primary
or secondary) causes a voltage spike to occur after the
turn off of MOSFET (Q1) in Figure 8. This is increasingly
prominent at higher load currents, where more stored
energy must be dissipated. In some cases an RC “snubber”
circuit will be required to avoid overvoltage breakdown at
the MOSFET’s drain node. Application Note 19 is a good
reference on snubber design. A bifilar or similar winding
technique is a good way to minimize troublesome leakage inductances. However, remember that this will limit
the primary-to-secondary breakdown voltage, so bifilar
winding is not always practical.
To introduce further user-programmable hysteresis, the
LTC3805-5 sources 5µA out of the RUN pin when operation
of LTC3805-5 is enabled. As a result, the falling threshold
for the RUN pin also depends on the value of R1 and can
be programmed by the user. The falling threshold for VIN
is therefore
VIN(RUN,FALLING) = VRUNOFF •
R1+ R2
− R1• 5µA
R2
where R1(5µA) is the additional hysteresis introduced
by the 5µA current sourced by the RUN pin. When in
shutdown, the RUN pin does not source the 5µA current
and the rising threshold for VIN is simply
VIN(RUN,RISING) = VRUNON •
R1+ R2
R2
Note that for some applications the RUN pin can be connected to VCC in which case the VCC thresholds, VTURNON
and VTURNOFF, control operation.
Setting Undervoltage and Hysteresis on VIN
External Run/Stop Control
The RUN pin is connected to a resistive voltage divider
connected to VIN as shown in Figure 3. The voltage threshold for the RUN pin is VRUNON rising and VRUNOFF falling.
Note that VRUNON – VRUNOFF = 35mV of built-in voltage
hysteresis that helps eliminate false trips.
To implement external run control, place a small N-channel
MOSFET from the RUN pin to GND as shown in Figure 3.
Drive the gate of this MOSFET high to pull the RUN pin
to ground and prevent converter operation.
Selecting Feedback Resistor Divider Values
The regulated output voltage is determined by the resistor
divider across VOUT (R3 and R4 in Figure 8). The ratio
of R4 to R3 needed to produce a desired VOUT can be
calculated:
VIN
R1
RUN
LTC3805-5
R2
GND
RUN/STOP
CONTROL
(OPTIONAL)
38055 F03
Figure 3. Setting RUN Pin Voltage and Run/Stop Control
R3 =
VOUT − 0.8V
R4
0.8V
Choose resistance values for R3 and R4 to be as large as
possible in order to minimize any efficiency loss due to the
static current drawn from VOUT, but just small enough so
that when VOUT is in regulation the input current to the VFB
pin is less than 1% of the current through R3 and R4. A
good rule of thumb is to choose R4 to be less than 80k.
38055fe
12
LTC3805-5
APPLICATIONS INFORMATION
Feedback in Isolated Applications
Isolated applications do not use the FB pin and error amplifier but control the ITH pin directly using an opto-isolator
driven on the other side of the isolation barrier as shown
in Figure 4. For isolated converters, the FB pin is grounded
which provides pull-up on the ITH pin. This pull-up is not
enough to properly bias the opto-isolator which is typically
biased using a resistor to VCC. Since the ITH pin cannot
sink the opto-isolator bias current, a diode is required to
block it from the ITH pin. A low leakage Schottky diode,
or low forward voltage PN junction diode, should be used
to ensure that the opto-isolator is able to pull ITH down
to its lower clamp.
Oscillator Synchronization
The oscillator may be synchronized to an external clock
by connecting the synchronization signal to the SYNC pin.
The LTC3805-5 oscillator and turn-on of the switch are
synchronized to the rising edge of the external clock. The
frequency of the external sync signal must be ±33% with
respect to fOSC (as programmed by RFS). Additionally, the
value of fSYNC must be between 70kHz and 700kHz.
Current Sense Resistor Considerations
The external current sense resistor (RSENSE in Figure 8)
allows the user to optimize the current limit behavior for
the particular application. As the current sense resistor
is varied from several ohms down to tens of milliohms,
peak switch current goes from a fraction of an ampere to
several amperes. Care must be taken to ensure proper
circuit operation, especially with small current sense
resistor values.
ISOLATION
BARRIER
VCC
LTC3805-5
ITH
For example, with the peak current sense voltage of 100mV
on the ISENSE pin, a peak switch current of 5A requires
a sense resistor of 0.020W. Note that the instantaneous
peak power in the sense resistor is 0.5W and it must be
rated accordingly. The LTC3805-5 has only a single sense
line to this resistor. Therefore, any parasitic resistance
in the ground side connection of the sense resistor will
increase its apparent value. In the case of a 0.020W sense
resistor, one milliohm of parasitic resistance will cause a
5% reduction in peak switch current. So the resistance of
printed circuit copper traces and vias cannot necessarily
be ignored.
Programmable Slope Compensation
The LTC3805-5 injects a ramping current through its ISENSE
pin into an external slope compensation resistor RSLOPE.
This current ramp starts at zero right after the GATE pin
has been high for the LTC3805-5’s minimum duty cycle
of 6%. The current rises linearly towards a peak of 10µA
at the maximum duty cycle of 80%, shutting off once the
GATE pin goes low. A series resistor RSLOPE connecting the
ISENSE pin to the current sense resistor RSENSE develops a
ramping voltage drop. From the perspective of the ISENSE
pin, this ramping voltage adds to the voltage across the
sense resistor, effectively reducing the current comparator
threshold in proportion to duty cycle. This stabilizes the
control loop against subharmonic oscillation. The amount
of reduction in the current comparator threshold (DVSENSE)
can be calculated using the following equation:
DVSENSE =
DutyCycle − 6%
10µA • RSLOPE
80%
Note: LTC3805-5 enforces 6% < Duty Cycle < 80%. A good
starting value for RSLOPE is 3k, which gives a 30mV drop
in current comparator threshold at 80% duty cycle.
Designs that do not operate at greater than 50% duty cycle
do not need slope compensation and may replace RSLOPE
with a direct connection.
FB
GND
38055 F04
Figure 4. Circuit for Isolated Feedback
38055fe
13
LTC3805-5
APPLICATIONS INFORMATION
Overcurrent Threshold Adjustment
Figure 5 shows the connection of the overcurrent pin, OC,
along with the ISENSE pin and the current sense resistor
RSENSE located in the source circuit of the power NMOS
which is driven by the GATE pin. The internal overcurrent
threshold on the OC pin is set at VOCT = 100 mV which is the
same as the peak current sense voltage VI(MAX) = 100 mV on
the ISENSE pin. The role of the slope compensation adjustment resistor RSLOPE and the slope compensation current
ISLOPE is discussed in the prior section. In combination with
the overcurrent threshold adjust current IOC = 10µA, an
external resistor ROC can be used to lower the overcurrent
trip threshold from 100mV. This section describes how
to pick ROC to achieve the desired performance. In the
discussion that follows be careful to distinguish between
“current limit” where the converter continues to run with
the ISENSE pin limiting current on a cycle-by-cycle basis
while the output voltage falls below the regulation point
and “overcurrent protection” where the OC pin senses an
overcurrent and shuts down the converter for a timeout
period before attempting an automatic restart.
One overcurrent protection strategy is for the converter
to never enter current limit but to maintain output voltage regulation up to the point of tripping the overcurrent
protection. Operation at minimum input voltage VIN(MIN)
hits current limiting for the smallest output current and
is the design point for this strategy.
First, for operation at VIN(MIN), calculate the duty cycle Duty
Cycle VIN(MIN) using the appropriate formula depending on
whether the converter is a boost, flyback or SEPIC. Then
GATE
LTC3805-5
ISENSE
OC
RSLOPE
ISLOPE
ROC
IOC = 10µA
RSENSE
GND
38055 F05
Figure 5. Circuit to Decrease Overcurrent Threshold
use Duty Cycle VIN(MIN) to calculate DVSENSE(VIN(MIN))
using the formula in the prior section. For overcurrent
protection to trip at exactly the point where current limiting would begin set:
ROC(CRIT) =
DVSENSE ( VIN(MIN))
10µA
To find the actual output current that trips overcurrent
protection, calculate the peak switch current IPK(VIN(MIN))
from:
IPK ( VIN(MIN)) =
100mV − DVSENSE ( VIN(MIN))
RSENSE
Then calculate the converter output current that corresponds to IPK(VIN(MIN)). Again, the calculation depends
both on converter type and the details of converter design
including inductor current ripple. For minimum input voltage, ROC(CRIT) produces an overcurrent trip at an output
current just before loss of output voltage regulation and
the onset of current limiting. Note that the output current
that causes an overcurrent trip is higher for higher input
voltages but that an overcurrent trip will always occur
before loss of output voltage regulation. If desired to
meet a specific design target, an increase in ROC above
ROC(CRIT) can be used to reduce the trip threshold and
make the converter trip for a lower output current.
This calculation is based on steady-state operation. Depending on design, overcurrent protection can also be
triggered during a start-up transient, particularly if large
output filter capacitors are being charged as output voltage
rises. If that is a problem, output capacitor charging can
be slowed by using a larger value of SSFLT capacitor. It is
also possible to trip overcurrent protection during a load
step especially if the trip threshold is lowered by making
ROC > ROC(CRIT).
Another overcurrent protection strategy is keep the converter running as current limiting reduces the duty cycle
and the output voltage sags. In this case, the goal is often
keep the converter in normal operation over as wide a range
as possible, including current limiting, and to trigger the
38055fe
14
LTC3805-5
APPLICATIONS INFORMATION
overcurrent trip only to prevent damage. To implement
this strategy use a value of ROC smaller than ROC(CRIT).
This also reduces sensitivity to overcurrent trips caused by
transient operation. In the limit, set ROC = 0 and connect
the OC pin directly to RSENSE. This causes an overcurrent
trip near minimum duty cycle or around 6%.
In some cases it may be desirable to increase the trip
threshold even further. In this strategy, the converter is
allowed to operate all the way down to minimum duty
cycle at which point the cycle-by-cycle current limit of
the ISENSE pin is lost and switch current goes up proportionally to the output current. Figures 6 and 7 show two
ways to do this. Figure 6 is for relatively low currents with
relatively large values of RSENSE. Using this circuit the
overcurrent trip threshold is increased from 100mV to:
VOC =
RSENSE1 + RSENSE2
100mV
RSENSE1
where it is assumed that the values of RSENSE1 and
RSENSE2 are so small that the IOC = 10µA threshold adjustment current produces a negligible change in VOC.
For larger currents, values of the current sense resistors
must be very small and the circuit of Figure 6 becomes
impractical. The circuit of Figure 7 can be substituted and the
current sense threshold is increased from 100mV to:
VOC =
R1+ R2
100mV
R1
OC
t SS(EXT) = CSS
After soft-start is complete, the voltage on the SSFLT pin
continues to charge to about a final value of 4.75V. Note
that choosing a value of CSS less than 5.8nF has no effect
since it would attempt to program an external soft-start
time tSS(EXT) less than the mandatory minimum internal
soft-start time tSS(IN) = 1.8ms.
If there is an overcurrent fault detected on the OC pin, the
LTC3805-5 enters a shutdown mode while a 2µA current
discharges the voltage on the SSFLT pin from 4.75V to
about 0.7V. The fault timeout tFTO(EXT) is therefore:
tFTO(EXT) = CSS
4.75V − 0.7V
2µA
In the event of a persistent fault, such as a short-circuit
on the converter output, the converter enters a “hiccup”
mode where it continues to try and restart at repetition
rate determined by CSS. If the fault is eventually removed
the converter successfully restarts.
RSLOPE
LTC3805-5
ISLOPE
IOC = 10µA
ISENSE
RSENSE2
OC
38055 F06
Figure 6. Circuit to Increase the Overcurrent
Threshold for Small Switch Currents
RSLOPE
ISLOPE
IOC = 10µA
R2
R1
RSENSE1
GND
2.25 − 0.7V
6µA
GATE
GATE
ISENSE
The external soft-start is programmed by a capacitor CSS
from the SSFLT pin to GND. At the initiation of soft-start
the voltage on the SSFLT pin is quickly charged to 0.7V
at which point GATE begins switching. From that point,
a 6µA current charges the voltage on the SSFLT pin until
the voltage reaches about 2.25V at which point soft-start
is over and the converter enters closed-loop regulation.
The soft-start time tSS(EXT) as a function of the soft-start
capacitor CSS is therefore:
At this point, the LTC3805-5 attempts a restart.
where the values of R1 and R2 should be kept below 10W
to prevent the IOC = 10µA threshold adjustment current
from producing a shift in VOC.
LTC3805-5
External Soft-Start Fault Timeout
GND
RSENSE
38055 F07
Figure 7. Circuit to Increase the Overcurrent
Threshold for Large Switch Currents
38055fe
15
LTC3805-5
TYPICAL APPLICATIONS
VIN
5.5V T0 40V
4.56µH
BH510-1009
CIN
10µF
50V
•
BAS516
57.6k
MMBT6428LT1
301W
T1
10µF
50V
•
D1
PDS760
PDZ6.8B
0.1µF
COUT
47µF
16V
4.7µF
1
6.8nF
10k
221k
R4 7.15k
69.8k
80.6k
10
GATE
SSFLT
LTC3805-5
2
9
ITH
VCC
3
8
OC
FB
4
7
ISENSE
RUN
5
6
FS
SYNC
GND
11
VOUT
12V
2A
Q1
HAT2266
RSENSE
0.005Ω
3.01k
R3
100k
38055 F08
Figure 8. 5.5V to 40V to 12V/2A SEPIC Converter
Efficiency and Power Loss vs Load Current
100
90
3.0
EFFICIENCY
70
2.5
60
2.0
50
40
POWER LOSS
30
5.5V
10V
20V
30V
40V
20
10
0
0.01
1.5
0.1
1
LOAD CURRENT (A)
1.0
POWER LOSS (W)
EFFICIENCY (%)
80
3.5
0.5
10
0
38055 TA04b
38055fe
16
LTC3805-5
TYPICAL APPLICATIONS
VIN+
18V TO
72V
2.2µF
100V
2.2µF
100V
PA1277NL
4
5
6
7
3
8
2
221k
221k
MMBTA42
PDZ6.8B
6.8V
D2
BAS516
VIN–
150pF
200V
VOUT+
3.3V
3A
100µF
6.3V
D1
PDS1040
RBIAS
68Ω 402Ω 1
100µF
6.3V
VOUT–
BAS516
10W
FDC2512
0.04Ω
VCC
BAS516
100µF
6.3V
BAS516
BA760
274Ω
100k
47pF
6.8k
0.022µF
1
2
3
4
5
221k
15.8k
75k
U1
LTC3805-5
GATE
SSFLT
ITH
VCC
FB
OC
ISENSE
RUN
FS GND SYNC
11
1µF
10
9
8
7
6
U2
LT4430
1µF
0.47µF
2200pF
250VAC
3.01k
1
VIN
2
GND
3
OC
6
OPTO
5
COMP
4
FB
2.2nF
56k
38055 F09
Figure 9. Isolated Telecom Supply: 18V to 72V Input to 3.3V/3A Output
Efficiency and Power Loss vs Load Current and VIN
100
90
80
4.0
18V
36V
48V
60V
72V
3.5
3.0
70
60
2.5
EFFICIENCY
2.0
50
1.5
40
1.0
30
20
0.01
0.5
POWER LOSS
0.1
1
LOAD CURRENT (A)
POWER LOSS (W)
EFFICIENCY (%)
VIN
22.1k
PS2801-1-K
VCC
10
0
38055 TA03b
38055fe
17
LTC3805-5
PACKAGE DESCRIPTION
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev B)
R = 0.125
TYP
0.40 ± 0.10
6
10
5
1
0.70 ±0.05
3.55 ±0.05
1.65 ±0.05
2.15 ±0.05 (2 SIDES)
3.00 ±0.10
(4 SIDES)
PACKAGE
OUTLINE
0.25 ± 0.05
1.65 ± 0.10
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
0.75 ±0.05
0.200 REF
0.50
BSC
2.38 ±0.05
(2 SIDES)
0.00 – 0.05
(DD) DFN REV B 0309
0.25 ± 0.05
0.50 BSC
2.38 ±0.10
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
MSE Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1664 Rev C)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.794 ± 0.102
(.110 ± .004)
5.23
(.206)
MIN
0.889 ± 0.127
(.035 ± .005)
1
0.05 REF
10
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
DETAIL “B”
CORNER TAIL IS PART OF
DETAIL “B” THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
10 9 8 7 6
DETAIL “A”
0° – 6° TYP
1 2 3 4 5
GAUGE PLANE
0.53 ± 0.152
(.021 ± .006)
DETAIL “A”
0.18
(.007)
0.497 ± 0.076
(.0196 ± .003)
REF
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
0.254
(.010)
0.29
REF
1.83 ± 0.102
(.072 ± .004)
2.083 ± 0.102 3.20 – 3.45
(.082 ± .004) (.126 – .136)
0.50
0.305 ± 0.038
(.0197)
(.0120 ± .0015)
BSC
TYP
RECOMMENDED SOLDER PAD LAYOUT
2.06 ± 0.102
(.081 ± .004)
SEATING
PLANE
0.86
(.034)
REF
1.10
(.043)
MAX
0.17 – 0.27
(.007 – .011)
TYP
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.1016 ± 0.0508
(.004 ± .002)
MSOP (MSE) 0908 REV C
38055fe
18
LTC3805-5
REVISION HISTORY
(Revision history begins at Rev D)
REV
DATE
DESCRIPTION
D
04/10
Updates to Absolute Maximum Ratings
PAGE NUMBER
2
Changes to Electrical Characteristics Table
3
Updates to Note 2
4
Update to Pin 11 in Pin Functions
7
Edits to Start-Up Shutdown in Operation Section
Change to Typical Application
Updated Related Parts Table
E
05/11
Added MP-grade part. Reflected throughout the data sheet
9
17, 20
20
1-20
38055fe
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTC3805-5
TYPICAL APPLICATION
5V to 40V to 12V/1A Nonisolated Flyback Converter
VIN
5V TO 40V
2.2µF
100V
2.2µF
100V
10k
MMBTA42
6.8V
PDZ6.8B
4 T3772 7
8
10
9
1
D2
BAS516
CSS
0.1µF
20k
1
2
3
4
5
VCC
75k
100µF
16V
100µF
16V
220Ω
47pF
U1
LTC3805-5
GATE
SSFLT
ITH
VCC
FB
OC
I
RUN
SENSE
FS GND SYNC
11
4.7µF
10
9
8
7
6
51.1k
FDC2512
VCC
470pF
VOUT
12V
1A
680Ω
150pF
200V
100pF
D1
UPS840
RSENSE
0.005Ω
3.65k
3.01k
38055 TA02
90
8
80
7
70
6
60
5
50
4
40
3
5.5V
10V
20V
30V
40V
30
20
10
0.01
0.1
1
LOAD CURRENT (A)
10
POWER LOSS (W)
EFFICIENCY (%)
Efficiency and Power Loss
vs Load Current
2
1
0
38055 TA02b
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT3748
100V No Opto Flyback Controller
5V ≤ VIN ≤ 100V, Boundary Mode Operation, MSOP-16 with Extra High
Voltage Pin Spacing
LT3758
Boost, Flyback, SEPIC and Inverting Controller
5.5V ≤ VIN ≤ 100V, 100kHz to 1MHz Programmable Operating Frequency,
3mm × 3mm DFN-10 and MSOP-10E
LT3575
No Opto-Isolated Flyback with 60V Integrated Switch 3V ≤ VIN ≤ 40V, Up to 14W, Boundary Mode Operation, TSSOP-16E
LTC3803/LTC3803-3/ Flyback DC/DC Controller with Fixed 200kHz or
LTC3803-5
300kHz Operating Frequency
VIN and VOUT Limited Only by External Components, 6-Pin ThinSOT™
Package
LTC3873/LTC3873-5
No RSENSE™ Constant Frequency Flyback, Boost,
SEPIC Controller
VIN and VOUT Limited Only by External Components, 8-Pin ThinSOT
or 2mm × 3mm DFN-8 Packages
LT3825
No Opto-Isolated Synchronous Flyback Controller
VIN 16V to 75V Limited by External Components, Up to 60W, TSSOP-16E
38055fe
20 Linear Technology Corporation
LT 0511 REV E • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
 LINEAR TECHNOLOGY CORPORATION 2008