IS31AP4990D 1.2W AUDIO POWER AMPLIFIER WITH ACTIVE-LOW SHUTDOWN MODE June 2014 DESCRIPTION FEATURES The IS31AP4990D has been designed for demanding audio applications such as mobile phones and permits the reduction of the number of external components. An externally-controlled shutdown mode reduces the supply current to less than 1μA. It also includes internal thermal shutdown protection. The unity-gain stable amplifier can be configured by external gain setting resistors. APPLICATIONS It is capable of delivering 1.2W of continuous RMS output power into an 8Ω load @ 5V. Operating from VCC = 2.7V ~ 5.5V 1.2W output power @ VCC = 5V, THD+N= 1%, f = 1kHz, with 8Ω load Ultra-low consumption in shutdown mode (1μA) Near-zero pop & click Ultra-low distortion Unity gain stable UTQFN-9L (1.5mm × 1.5mm) package Mobile phones PDAs Portable electronic devices Notebook computer TYPICAL APPLICATION CIRCUIT Figure 1 Typical Application Circuit (Single-ended Input) Integrated Silicon Solution, Inc. – www.issi.com Rev. C, 06/24/2014 1 IS31AP4990D Figure 2 Typical Application Circuit (Differential Input) Integrated Silicon Solution, Inc. – www.issi.com Rev. C, 06/24/2014 2 IS31AP4990D PIN CONFIGURATION Package Pin Configuration (Top View) UTQFN-9L PIN DESCRIPTION No. Pin Function Description A1 IN- Negative input of the first amplifier. Connected to the feedback resistor RF- and to the input resistor RIN-. A2 OUT- Negative output. Connected to the load and to the feedback resistor RF-. A3 IN+ Positive input of the first amplifier. B1,B2 GND Ground. B3 VCC Supply voltage. C1 BYPASS Bypass capacitor pin which provides the common mode voltage (VCC/2). C2 OUT+ Positive output. Connected to the load. C3 SDB The device enters in shutdown mode when a low level is applied on this pin. Integrated Silicon Solution, Inc. – www.issi.com Rev. C, 06/24/2014 3 IS31AP4990D ORDERING INFORMATION Industrial Range: -40°C to +85°C Order Part No. Package QTY/Reel IS31AP4990D-UTLS2-TR UTQFN-9, Lead-free 3000 Copyright © 2014 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized; b.) the user assume all such risks; and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. – www.issi.com Rev. C, 06/24/2014 4 IS31AP4990D ABSOLUTE MAXIMUM RATINGS Supply voltage, VCC Voltage at any input pin Maximum junction temperature, TJMAX Storage temperature range, TSTG Operating temperature range, TA ESD (HBM) ESD (CDM) -0.3V ~ +6.0V -0.3V ~ VCC+0.3V 150°C -65°C ~ +150°C −40°C ~ +85°C 7kV 500V Note: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS TA = -40°C ~ +85°C, VCC = 2.7V ~ 5.5V, unless otherwise noted. Typical value are TA = +25°C. Symbol Parameter Condition Min. Typ. 2.7 Max. Unit 5.5 V VCC Power supply ICC Quiescent current ISD Shutdown current VIH Shutdown voltage input high VIL Shutdown voltage input low 0.4 V VOS Output offset voltage 25 mV VCC = 5V, VIN = 0V, IO = 0A, no load 3.8 6.4 VCC = 3V, VIN = 0V, IO = 0A, no load 2.8 5.1 VSDB = GND, no load 1.4 VCC = 5V Po Output power (8Ω) VCC = 3V tWU THD+N PSRR Wake-up time (Note 1) Total harmonic distortion + noise (Note 1) Power supply rejection ratio (Note 1) 1 mA μA V THD+N = 1%, f = 1kHz 1.20 THD+N = 10%, f = 1kHz 1.50 THD+N = 1%, f = 1kHz 0.418 THD+N = 10%, f = 1kHz 0.525 VCC = 5V, CBYPASS = 1μF 115 VCC = 3V, CBYPASS = 1μF 102 VCC = 5V, PO = 0.5Wrms, f = 1kHz 0.23 VCC = 3V, Po = 0.3Wrms, f = 1kHz VCC = 5V f = 217Hz VRipple p-p = 200mV f = 1kHz Input grounded VCC = 3.6V, 4.2V f = 217Hz VRipple p-p = 200mV f = 1kHz Input grounded 0.15 W ms % 61 65 62 dB 66 Note 1: Guaranteed by design. Integrated Silicon Solution, Inc. – www.issi.com Rev. C, 06/24/2014 5 IS31AP4990D TYPICAL PERFORMANCE CHARACTERISTIC 20 20 RL = 8Ω f = 1kHz 10 5 VCC = 5V THD+N(%) THD+N(%) RL = 8Ω 10 2 VCC = 3V 1 2 1 VCC = 5V PO = 800mW 0.2 0.1 0.5 VCC = 3V PO = 250mW 0.05 0.2 0.02 0.1 10m 20m 100m 50m 500m 200m 0.01 2 1 20 50 100 200 THD+N vs. Output Power 5k 10k 20k 5k 10k THD+N vs. Frequency Figure 4 VCC = 3.6V, 4.2V RL = 8Ω Input Grounded VCC = 5V RL = 8Ω -20 -40 PSRR(dB) -40 PSRR(dB) 2k +0 +0 -20 1k Frequency(Hz) Output Power(W) Figure 3 500 -60 -80 Input Grounded -60 -80 Input Float -100 -100 -120 20 50 100 200 500 1k 2k 5k -120 20 10k 20k 50 100 PSRR vs. Frequency Figure 6 VCC = 3V, 5V RL = 8Ω 2k 20k PSRR vs. Frequency RL = 8Ω f = 1kHz 1.8 1.6 Output Power(W) Output Voltage(V) 1k 2.0 100u 70u 500 Frequency(Hz) Frequency(Hz) Figure 5 200 50u 30u 20u THD+N = 10% 1.4 1.2 1.0 0.8 THD+N = 1% 0.6 0.4 0.2 10u 0 20 50 100 200 500 1k 2k 5k 10k 20k 3 3.5 Noise Floor Integrated Silicon Solution, Inc. – www.issi.com Rev. C, 06/24/2014 4.5 5 5.5 Power Supply(V) Frequency(Hz) Figure 7 4 Figure 8 Output Power vs. Power Supply 6 IS31AP4990D 70 VCC = 5V RL = 8Ω f = 1kHz THD+N<1% Efficiency(%） 60 50 40 30 20 10 0 0 0.2 0.4 0.6 0.8 1 1.2 Output Power(W) Figure 9 Efficiency vs. Output Power Integrated Silicon Solution, Inc. – www.issi.com Rev. C, 06/24/2014 7 IS31AP4990D APPLICATION INFORMATION BTL CONFIGURATION PRINCIPLE The IS31AP4990D is a monolithic power amplifier with a BTL output type. BTL (bridge tied load) means that each end of the load is connected to two single-ended output amplifiers. Thus, we have: Single-ended output 1 = VOUT+ = VOUT (V) Single ended output 2 = VOUT- = -VOUT (V) and VOUT+ - VOUT- = 2VOUT (V) The output power is: POUT (2VOUT RMS ) 2 RL For the same power supply voltage, the output power in BTL configuration is four times higher than the output power in single ended configuration. GAIN IN A TYPICAL APPLICATION SCHEMATIC The typical application schematic is shown in Figure 1 on page 1. In the flat region (no CIN effect), the output voltage of the first stage is (in Volts): VOUT (VIN ) RF RIN For the second stage: VOUT+ = -VOUT- (V) The differential output voltage is (in Volts): VOUT VOUT 2VIN RF RIN The differential gain, Gv, in shourt, is given by: Gv VOUT VOUT R 2 F VIN RIN VOUT+ is in phase with VIN and VOUT- is phased 180° with VIN. This means that the positive terminal of the loudspeaker should be connected to VOUT+ and the negative to VOUT-. LOW AND HIGH FREQUENCY RESPONSE In the low frequency region, CIN starts to have an effect. CIN forms with RIN a high-pass filter with a -3dB cut-off frequency. fCL is in Hz. f CL 1 2RIN C IN In the high frequency region, you can limit the bandwidth by adding a capacitor (CF) in parallel with RF. It forms a low-pass filter with a -3dB cut-off frequency. fCH is in Hz. Integrated Silicon Solution, Inc. – www.issi.com Rev. C, 06/24/2014 f CH 1 2RF C F DECOUPLING OF THE CIRCUIT Two capacitors are needed to correctly bypass the IS31AP4990D: a power supply bypass capacitor CS and a bias voltage bypass capacitor CBYPASS. CS has particular influence on the THD+N in the high frequency region (above 7kHz) and an indirect influence on power supply disturbances. With a value for CS of 1μF, you can expect THD+N levels similar to those shown in the datasheet. In the high frequency region, if CS is lower than 1μF, it increases THD+N and disturbances on the power supply rail are less filtered. On the other hand, if CS is higher than 1μF, those disturbances on the power supply rail are more filtered. CBYPASS has an influence on THD+N at lower frequencies, but its function is critical to the final result of PSRR (with input grounded and in the lower frequency region). If CBYPASS is lower than 1μF, THD+N increases at lower frequencies and PSRR worsens. If CBYPASS is higher than 1μF, the benefit on THD+N at lower frequencies is small, but the benefit to PSRR is substantial. Note that CIN has a non-negligible effect on PSRR at lower frequencies. The lower the value of CIN, the higher the PSRR is. WAKE-UP TIME (tWU) When the SDB pin is released to put the device ON, the bypass capacitor CBYPASS will not be charged immediately. As CBYPASS is directly linked to the bias of the amplifier, the bias will not work properly until the CBYPASS voltage is correct. The time to reach this voltage is called wake-up time or tWU and specified in the electrical characteristics table with CBYPASS = 1μF. POP PERFORMANCE Pop performance is intimately linked with the size of the input capacitor CIN and the bias voltage bypass capacitor CBYPASS. The size of CIN is dependent on the lower cut-off frequency and PSRR values requested. The size of CBYPASS is dependent on THD+N and PSRR values requested at lower frequencies. Moreover, CBYPASS determines the speed with which the amplifier turns ON. 8 IS31AP4990D CLASSIFICATION REFLOW PROFILES Profile Feature Pb-Free Assembly Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) 150°C 200°C 60-120 seconds Average ramp-up rate (Tsmax to Tp) 3°C/second max. Liquidous temperature (TL) Time at liquidous (tL) 217°C 60-150 seconds Peak package body temperature (Tp)* Max 260°C Time (tp)** within 5°C of the specified classification temperature (Tc) Max 30 seconds Average ramp-down rate (Tp to Tsmax) 6°C/second max. Time 25°C to peak temperature 8 minutes max. Figure 10 Classification Profile Integrated Silicon Solution, Inc. – www.issi.com Rev. C, 06/24/2014 9 IS31AP4990D PACKAGING INFORMATION UTQFN-9L Note: All dimensions in millimeters unless otherwise stated. Integrated Silicon Solution, Inc. – www.issi.com Rev. C, 06/24/2014 10