Fairchild FSA2859UCX Dual-voltage, 0.8î© dpdt analog switch with power-off isolation Datasheet

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FSA2859 — Dual-Voltage, 0.8Ω DPDT Analog Switch with
Power-Off Isolation
Features
Description
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The FSA2859 is a high-performance Double-Pole /
Double-Throw (DPDT) analog switch for audio
applications driven by low voltage (1.8V) baseband
processors or ASICs. The device features ultra-low RON
of 0.8Ω (maximum) at 4.5V VCC and operates over the
wide VCC range of 1.65V to 5.5V. The device is
fabricated with sub-micron CMOS technology to
achieve fast switching speeds and is designed for
break-before-make operation.
Power-Off Isolation (VCC=0V)
0.8Ω Maximum On Resistance (RON) for 4.5V VCC
0.25Ω Maximum RON Flatness for 4.5V VCC
Broad VCC Operating Range: 1.65V to 5.5V
Fast Turn-On and Turn-Off Times
Control Input Referenced to VIO
Break-Before-Make Enable Circuitry
The FSA2859 interfaces between the low-voltage ASIC
and regular audio amplifiers and CODECs operating up
to the supply range of 5.5V through the dual-voltage
supplies of VIO and VCC. The VIO supply operates the
control circuitry, allowing for 1.8V (typical) signals on
the control pin (Sn).
0.5mm WLCSP packaging
ESD Performance
-
HBM: JESD22-A114, I/O to GND
CDM: JESD22-C101
IEC61000-4-2 Contact / Air
8kV
500V
8kV / 15kV
Applications
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IMPORTANT NOTE:
Cellular Phone
For additional performance information, please contact
[email protected].
Portable Media Player
PDA
Ordering Information
Part Number
FSA2859UCX
Operating Temperature Top
Range
Mark
-40°C to +85°C
Eco Status
M2
Green
Package
Packing
Method
12-Ball WLCSP,
0.5mm pitch
Tape and
Reel
For Fairchild’s definition of “green” Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
Analog Symbols
V CC
V IO
Control
S0
S1
1B0
1A
1B1
2B0
2A
2B1
GND
Figure 1. Analog Symbol
© 2007 Fairchild Semiconductor Corporation
FSA2859 Rev. 1.0.1
www.fairchildsemi.com
FSA2859 — Dual-Voltage, 0.8Ω DPDT Analog Switch with Power-Off Isolation
August 2008
KK
X
Y
Z
=
=
=
=
Die Run Code
Year
Work Week
Assembly Site
Figure 2. Top Mark with Pin 1 Orientation
Pin Configuration
D3 3
D2 2
D1 1
S0
VIO
S1
C3 4
1B1
C2 5
GND
B3 9
1A
B2 8
GND
A3 10
A2 11
1B0
VCC
C1 6
2B1
B1 7
2A
A1 12
2B0
Figure 3. Pin Assignments (Top Through View)
Pin Definitions
Pin
Ball
Name
Description
1
D1
S1
Control Input 1
2
D2
VIO
Digital Control Supply
3
D3
S0
Control Input 0
4
C3
1B1
Data Port (Normally Open)
5
C2
GND
Ground
6
C1
2B1
Data Port (Normally Open)
7
B1
2A
8
B2
GND
FSA2859 — Dual-Voltage, 0.8Ω DPDT Analog Switch with Power-Off Isolation
Marking Information
Common Data Port 2
Ground
9
B3
1A
Common Data Port 1
10
A3
1B0
Data Port (Normally Closed)
11
A2
VCC
Supply Voltage
12
A1
2B0
Data Port (Normally Closed)
Truth Table
Control Input (S0,S1)
Function
S0 = Low
S1 = Low
1B0 connected to 1A
2B0 connected to 2A
S0 = High
S1 = High
1B1 connected to 1A
2B1 connected to 2A
© 2007 Fairchild Semiconductor Corporation
FSA2859 Rev. 1.0.1
www.fairchildsemi.com
2
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device
reliability. The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Min.
Max.
Unit
VCC
Supply Voltage
-0.5
6.5
V
VIO
Digital Control Supply Voltage
-0.5
6.5
V
nB0, nB1, nA
-0.5
VCC + 0.5
V
S0,S1
-0.5
6.5
V
(1)
Vsw
Switch Voltage
VIN
Input Voltage
(1)
IIK
Input Diode Current
-50
mA
ISW
Switch Current (Continuous)
200
mA
400
mA
180
mW
+150
°C
ISWPEAK
PD
Pulsed at 1ms Duration,
<10% Duty Cycle
Peak Switch Current
Power Dissipation at 85°C
TSTG
Storage Temperature Range
-65
TJ
Maximum Junction Temperature
+150
°C
TL
Lead Temperature (Soldering, 10 Seconds)
+260
°C
Human Body Model (JEDEC: JESD22-A114)
ESD
I/O to GND: 1A, 2A
8
All Pins
2
kV
Charged Device Model (JEDEC: JESD22-C101)
500
V
Machine Model (JEDEC: JESD22-A115)
100
V
IEC6100-4-2 Discharge system test performed on
Fairchild’s FSA2859 applications testing board
Contact
8
Air
15
kV
Note:
1 The input and output negative ratings may be exceeded if the input and output diode current ratings are observed.
FSA2859 — Dual-Voltage, 0.8Ω DPDT Analog Switch with Power-Off Isolation
Absolute Maximum Ratings
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
Parameter
VCC
Supply Voltage
VIO
Digital Control Supply
VIN
Control Input Voltage
VSW
Switch Input Voltage
(2)
TA
Operating Temperature
θJA
Thermal Resistance, Still Air
Min.
Max.
Unit
1.65
5.50
V
1.65
1.95
V
S0, S1
0
VIO
V
nB0, nB1, nA
0
VCC
V
-40
+85
°C
350
°C/W
Note:
2 Control Input must be held HIGH or LOW; it must not float.
© 2007 Fairchild Semiconductor Corporation
FSA2859 Rev. 1.0.1
www.fairchildsemi.com
3
All typical values are at 25°C unless otherwise specified. VIO=1.65 to 1.95V.
Symbol
Parameter
VCC (V)
Conditions
TA=+25°C
Min.
Typ.
TA=-40 to +85°C
Max.
Min.
Max.
Unit
VIHIO
Input Voltage
High - VIO
1.95 to 5.50
0.65•VIO
VIO
V
VILIO
Input Voltage
Low - VIO
1.95 to 5.50
0
0.35•VIO
V
IIN
Control Input
Leakage
1.95 to 5.50
nA
INO(0FF),
INC(OFF),
INO(On),
INC(On)
IA(ON)
IOFF
ICC
Off-Leakage
Current of Port
nB0 and nB1(3)
On-Leakage
Current of Port
nB0 and nB1(3)
On Leakage
Current of
Port nA(3)
Power Off
Leakage
Current of Port
A & Port B(3)
Quiescent
Supply Current
VS0,S1=0 or VIO
-2
2
-20
20
5.50
nA=1V,4.5V
nB0 or nB1=4.5, 1V
-10
10
-50
50
3.60
nA=1V,3.0V
nB0 or nB1=3.0, 1V
-10
10
-50
50
2.70
nA=0.5V,2.3V
nB0 or nB1=2.3, 0.5V
-10
10
-50
50
1.95
nA=0.3V,1.65V
nB0 or nB1=1.65 ,0.3 V
-5
5
-20
20
5.50
nA=float
nB0 or nB1=4.5, 1V
-20
20
-100
100
3.60
nA=float
nB0 or nB1=3.0, 1V
-10
10
-20
20
2.70
nA=float
nB0 or nB1=2.3, 0.5V
-10
10
-20
20
1.95
nA=float
nB0 or nB1=1.65, 0.3V
-5
5
-20
20
5.50
nA=1V,4.5V; nB0 or
nB1=1V, 4.5V or floating
-20
20
-100
100
3.60
nA=1V, 3.0V; nB0 or
nB1=1V, 3.0V or floating
-10
10
-20
20
2.70
nA=0.5V, 2.3V;
nB0 or nB1=0.5V, 2.3V
or floating
-10
10
-20
20
1.95
nA=0.3V, 1.65V;
nB0 or nB1=0.3V,
1.65V or floating
-5
5
-20
20
0.01
1.00
-5.00
5.00
nA
nA
0
nA=0 to 5.5V;
nB0 or nB1=0 to 5.5V
5.50
VIN=0 or VCC, IOUT=0
10
50
500
3.60
VIN=0 or VCC, IOUT=0
1.0
25.0
100.0
2.70
VIN=0 or VCC, IOUT=0
0.5
20.0
50.0
1.95
VIN=0 or VCC, IOUT=0
0.5
15.0
50.0
-1.00
nA
FSA2859 — Dual-Voltage, 0.8Ω DPDT Analog Switch with Power-Off Isolation
Electrical Characteristics
µA
nA
Continued on the following page…
© 2007 Fairchild Semiconductor Corporation
FSA2859 Rev. 1.0.1
www.fairchildsemi.com
4
All typical values are at 25°C unless otherwise specified. VIO=1.65 to 1.95V.
Symbol
RON
∆ RON
RFLAT(ON)
Parameter
Switch On
Resistance(3, 4)
On Resistance
Matching
Between
Channels(3, 5)
On Resistance
Flatness(3, 6)
VCC (V)
Conditions
TA=+25°C
Min.
TA=-40 to +85°C
Typ.
Max.
Min.
Max.
4.50
IOUT=-100mA,
nB0 or nB1=2.5V
0.50
0.75
0.80
3.00
IOUT=-100mA,
nB0 or nB1=2.0V
0.75
0.90
1.20
2.25
IOUT=-100mA,
nB0 or nB1=1.8V
1.0
1.3
1.6
1.65
IOUT=-100mA,
nB0 or nB1=1.2V
2.5
5.0
7.0
4.50
IOUT=-100mA,
nB0 or nB1=2.5V
0.05
0.10
0.10
3.00
IOUT=-100mA,
nB0 or nB1=2.0V
0.10
0.15
0.15
2.25
IOUT=-100mA,
nB0 or nB1=1.8V
0.15
0.20
0.20
1.65
IOUT=-100mA,
nB0 or nB1=1.2V
0.15
0.40
0.40
4.50
IOUT=-100mA, nB0 or
nB1=1.0V, 1.5V, 2.5V
0.075
0.250
0.250
3.00
IOUT=-100mA,
nB0 or nB1=0.8V, 2.0V
0.1
0.3
0.3
2.25
IOUT=-100mA,
nB0 or nB1=0.8V, 1.8V
0.25
0.50
0.60
1.65
IOUT=-100mA,
nB0 or nB1=0.6V, 1.2V
3.5
Unit
Ω
Ω
Ω
Notes:
3 Guaranteed by characterization, not production tested for VCC=1.65 – 1.95V.
4 On resistance is determined by the voltage drop between A and B pins at the indicated current through the switch.
5 ∆ RON=RON maximum – RON minimum measured at identical VCC, temperature, and voltage.
6 Flatness is defined as the difference between the maximum and minimum value of on resistance over the
specified range of conditions.
© 2007 Fairchild Semiconductor Corporation
FSA2859 Rev. 1.0.1
FSA2859 — Dual-Voltage, 0.8Ω DPDT Analog Switch with Power-Off Isolation
Electrical Characteristics (Continued)
www.fairchildsemi.com
5
All typical value are at VIO=1.8V and VCC=1.8V, 2.5V, 3.0V, and 5.0V at 25°C unless otherwise specified.
Symbol
Parameter
VCC (V)
TA=+25ºC
Conditions
Min.
Typ.
Max.
Min.
Max.
1.0
12.0
25.0
1.0
30.0
5.0
15.0
30.0
3.0
35.0
5.0
20.0
35.0
5.0
40.0
1.65 to 1.95
10.0
50.0
70.0
10.0
75.0
4.50 to 5.50
1.0
9.5
20.0
1.0
25.0
1.0
9.0
20.0
1.0
25.0
2.0
10.0
20.0
2.0
25.0
2.0
28.0
40.0
2.0
50.0
1.0
10.0
12.0
0.1
14.0
1.0
14.0
16.0
1.0
17.0
1.0
21.0
25.0
1.0
27.0
2.0
50.0
4.50 to 5.50
tON
Turn-On Time(7)
3.00 to 3.60
2.30 to 2.70
3.00 to 3.60
tOFF
Turn-Off Time(7)
2.30 to 2.70
nB0 or
nB1=VCC,
RL=50Ω,
CL=35pF
nB0 or
nB1=VCC,
RL=50Ω,
CL=35pF
1.65 to 1.95
4.50 to 5.50
tBBM
Break-BeforeMake Time(7)
3.00 to 3.60
2.30 to 2.70
nB0 or
nB1=VCC,
RL=50Ω,
CL=35pF
35.0
1.65 to 1.95
5.50
Q
Charge Injection
TA=-40 to +85ºC
3.30
2.50
Unit
Figure
ns
Figure 4
ns
Figure 4
ns
Figure 5
pC
Figure 7
47
CL=1.0nF,
VGEN=0V,
RGEN=0Ω
33
23
10
1.65
OIRR
Off Isolation
1.8 to 5.0
f=1MHz,
RL=50Ω
-60
dB
Figure 6
Xtalk
Crosstalk
1.8 to 5.0
f=1MHz,
RL=50Ω
-65
dB
Figure 6
MHz
Figure 9
%
Figure 10
5.50
BW
-3db Bandwidth
3.30
2.50
60
58
RL=50Ω
55
1.65
THD
Total Harmonic
Distortion
1.80
5.00
50
RL=600Ω,
VIN=0.5VPP,
f=20Hz to
20kHz
FSA2859 — Dual-Voltage, 0.8Ω DPDT Analog Switch with Power-Off Isolation
AC Electrical Characteristics
.015
.002
Note:
7 Guaranteed by characterization, not production tested for VCC=1.65 – 1.95V.
Capacitance
Symbol
CIN
Parameter
Control Pin Input Capacitance
TA=+25ºC
VCC (V)
Conditions
0
f=1MHz
3.2
pF
Min.
Typ.
Max.
Unit
COFF
nB Port Off Capacitance
1.65 to 5.50
f=1MHz
50
pF
CON
nA Port On Capacitance
1.65 to 5.50
f=1MHz
150
pF
© 2007 Fairchild Semiconductor Corporation
FSA2859 Rev. 1.0.1
www.fairchildsemi.com
6
VCC
VBn
B0 or B1
tR = tF = 2.5ns
A
Control
Input
VOUT
RL
50
S
VCC
50%
0V
CL
35pF
tOFF
VOUT
Switch
Output
GND
0.9 x VOUT
0V
0.9 x VOUT
tON
CL includes fixture and stray capacitance.
Logic input waveforms inverted for switches
that have the opposite logic sense.
Figure 4. Turn On / Off Timing
VCC
VBn
B0
A
B1
VOUT
RL
50
S
Control
Input
Control
VCC
Input
0V
50%
tR = tF = 2.5ns
CL
35pF
0.9 x VOUT
VOUT
GND
TD
CL includes fixture and stray capacitance.
Figure 5. Break-Before-Make Timing
FSA2859 — Dual-Voltage, 0.8Ω DPDT Analog Switch with Power-Off Isolation
Test Diagrams
VCC 10nF
Network
Analyzer
0 or VCC
S
VCC
A
BO
B1
50
GND
VIN
VOUT
50
MEAS
50
OFF-ISOLATION = 20log
VOUT
VIN
ON-LOSS = 20log
VOUT
VIN
CROSSTALK = 20log
VOUT
VIN
50
REF
50
Figure 6. Off Isolation and Crosstalk
© 2007 Fairchild Semiconductor Corporation
FSA2859 Rev. 1.0.1
www.fairchildsemi.com
7
VCC
RGEN
A
B0 or B1
VGEN
VOUT
CL
ΔVOUT
VOUT
In
S
GND
Control
Input
In
Off
On
Off
Off
On
Off
Q = ΔVOUT • CL
Figure 7. Charge Injection
10nF
VCC
A
S
Capacitance
Meter
f = 1MHz
B0 or
B1
0V
or
VCC
GND
Figure 8. On / Off Capacitance Measurement Setup
VCC
VCC
10nF
10nF
VIN
Signal
Generator
0dBm
VIN
A
BN
Analyzer
RL
A
BN
Signal
Generator
0dBm
Analyzer
RL
S
Logic Input
0V or VCC
FSA2859 — Dual-Voltage, 0.8Ω DPDT Analog Switch with Power-Off Isolation
Test Diagrams (Continued)
S
Logic Input
0V or VCC
GND
Figure 9. Bandwidth
© 2007 Fairchild Semiconductor Corporation
FSA2859 Rev. 1.0.1
GND
Figure 10. Harmonic Distortion
www.fairchildsemi.com
8
A
E
B
0.03 C
0.50
2X
A1
F
D
(Ø0.200)
CU PAD
(Ø0.300)
SOLDER MASK
OPENING
0.50 1.50
0.03 C
PIN 1 AREA
2X
G
TOP VIEW
RECOMMENDED LAND PATTERN (NSMD)
0.06 C
0.625
0.547
E
0.05 C
D
C
0.378±0.018
0.208±0.021
SEATING PLANE
SIDE VIEWS
NOTES:
A. NO JEDEC REGISTRATION APPLIES.
(X)+/-.018
0.005
0.50
B. DIMENSIONS ARE IN MILLIMETERS.
C A B
C. DIMENSIONS AND TOLERANCE
PER ASMEY14.5M, 1994.
12x Ø0.260±0.02
F
D
0.50
(Y)+/-.018
1 2
C
D. DATUM C IS DEFINED BY THE SPHERICAL
CROWNS OF THE BALLS.
B
A
E. PACKAGE NOMINAL HEIGHT IS 586 MICRONS
±39 MICRONS (547-625 MICRONS).
F. FOR DIMENSIONS D, E, X, AND Y SEE
PRODUCT DATASHEET.
3
BOTTOM VIEW
FSA2859 — Dual-Voltage, 0.8Ω DPDT Analog Switch with Power-Off Isolation
Physical Dimensions
G. BALL D1 IS DESIGNATED PIN 1.
H. BALL COMPOSITION: Sn95.5Ag3.9Cu0.6
I. DRAWING FILNAME: MKT-UC012ABrev2
Figure 11. 12-Ball, WLCSP 0.5mm Pitch
Table 1. Product Specific Dimensions
Product
D
E
X
Y
FSA2859UCX
1.910
1.410
0.205
0.205
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
© 2007 Fairchild Semiconductor Corporation
FSA2859 Rev. 1.0.1
www.fairchildsemi.com
9
FSA2859 — Dual-Voltage, 0.8Ω DPDT Analog Switch with Power-Off Isolation
© 2007 Fairchild Semiconductor Corporation
FSA2859 Rev. 1.0.1
www.fairchildsemi.com
10