LINER LT3513 2mhz high current 5-output regulator for tft-lcd panel Datasheet

LT3513
2MHz High Current
5-Output Regulator
for TFT-LCD Panels
FEATURES
DESCRIPTION
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The LT®3513 5-output adjustable switching regulator
provides power for large TFT-LCD panels. The 38-pin
5mm × 7mm QFN device can generate a 3.3V or 5V logic
supply along with the triple output supply required for the
TFT-LCD panel. A lower voltage secondary logic supply
may also be generated with the addition of an external
NPN driven by the internal linear regulator. A step-down
regulator provides a low voltage output, VLOGIC, with up
to 1.2A of current while capable of operating from a wide
input range of 4.5V to 30V. A high power step-up converter, a lower power step-up converter and an inverting
converter provide the three independent output voltages:
AVDD, VON and VOFF required by the LCD panel. A high-side
PNP provides delayed turn-on of the VON signal and can
handle up to 30mA. Protection circuitry ensures that VON
is disabled if any of the four outputs are more than 10%
below the programmed voltage.
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4.5V to 30V Input Voltage Range
Four Integrated Switches: 2.2A Buck, 1.5A Boost,
0.25A Boost, 0.25A Inverter (Guaranteed Minimum
Current Limit)
External NPN LDO Driver
Fixed Frequency, Low Noise Outputs
Inductor Current Sense for Buck
Soft-Start for All Outputs
Externally Programmable VON Delay
Three Integrated Schottky Diodes
PGOOD Pin for AVDD Output Disconnect
PanelProtectTM Circuitry Disables VON Upon Fault
Thermally Enhanced 38-Lead 5mm × 7mm QFN
Package
APPLICATIONS
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Automotive TFT-LCD Displays
Large TFT-LCD Desktop Monitors
Flat Panel Televisions
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
PanelProtect is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
VIN
8V TO 16V
10μH
VLOGIC
5V
10μF 178k
53.6k
100k
10k
10μF
0.47μF
VOFF
–10V
20mA
2.2μF
60.4k
UVLO LDOPWR VIN
10μH
SW2
SW4
69.8k
PGOOD
D4
BIAS
BOOST
4.7μH
VLOGIC
5V
0.5A
RUN-SS2
RUN-SS3/4
CT
0.22μF
47nF
SW1
SENSE+
SENSE–
FB1
30.1k
22μF
Start-Up Waveforms
RUN-SS1
NFB4
10k
AVDD
8V
80mA
FB2
15nF
15nF
15nF
LT3513
VON_CLK
VON_CLK
VON
VONSINK
10k
VON
22V
20mA
232k
E3
6.8μH
VLDO
3.3V
0.5A
SW3
FB3
BD
FB5
VC1
42.2k
10μF
7.5k
10k
2.7nF
VC2
GND
4.7k
VC3
30k
4.7nF 1.5nF
VC4
VE3 20V/DIV
VON 20V/DIV
165k
VLOGIC
5V
10k
RUN/SS 2V/DIV
VLOGIC 5V/DIV
AVDD 10V/DIV
VOFF 10V/DIV
IIN(AVG) 1A/DIV
0.47μF
2.2μF
5ms/DIV
3513 TA01b
13k
2.2nF
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LT3513
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
FB1
GND
SW1
SW1
VIN
VIN
UVLO
TOP VIEW
38 37 36 35 34 33 32
FB5 1
31 SENSE+
VC1 2
30 SENSE–
RUN-SS3/4 3
29 BIAS
FB3 4
28 BOOST
RUN-SS2 5
27 LDOPWR
SW3 6
26 BD
39
E3 7
25 SW4
VON 8
24 D4
VONSINK 9
23 NFB4
VON_CLK 10
22 RUN-SS1
PGOOD 11
21 VC4
20 VC2
VC3 12
FB2
BIAS
GND
SW2
SW2
CT
13 14 15 16 17 18 19
GND
VIN, LDOPWR Voltage ...............................................32V
UVLO Voltage ............................................................32V
SW2, SW3, SW4 Voltage ..........................................40V
E3 Pin Voltage ...........................................................40V
VON, VONSINK Voltage ................................................40V
PGOOD Voltage .........................................................40V
D4 Voltage ........................................................ 1V, –40V
BOOST Voltage .........................................................37V
BOOST Over SW1 .......................................................8V
SENSE+, SENSE– Voltage ..........................................10V
VON_CLK Voltage ........................................................10V
BIAS, BD Voltage ......................................................10V
CT Pin Voltage .............................................................5V
RUN-SS1, RUN-SS2, RUN-SS3/4 Voltage ..................5V
FB1, FB2, FB3, FB5 Voltage .........................................5V
NFB4 Voltage ...................................................... 5V, –5V
VC1, VC2, VC3, VC4 Voltage ..........................................5V
Junction Temperature ........................................... 125°C
Operating Temperature Range (Note 2).. –40°C to 125°C
Storage Temperature Range................... –65°C to 125°C
UHF PACKAGE
38-LEAD (5mm s 7mm) PLASTIC QFN
TJMAX = 125°C, θJA = 34°C/W, θJC = 1°C/W
EXPOSED PAD (PIN 39) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3513EUHF#PBF
LT3513EUHF#TRPBF
3513
38-Lead (5mm × 7mm) Plastic QFN
–40°C to 125°C
LT3513IUHF#PBF
LT3513IUHF#TRPBF
3513
38-Lead (5mm × 7mm) Plastic QFN
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, BIAS = 3V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
Minimum Input Voltage
Quiescent Current
Not Switching
VRUNSS1 = 0V
RUN-SS1, RUN-SS2, RUN-SS3/4 Pin Current
RUN-SS1= RUN-SS2 = RUN-SS3
= RUN-SS4 = 0.4V
7.5
30
RUN-SS1, RUN-SS2, RUN-SS3/4 Threshold
l
BIAS Pin Voltage to Begin RUN-SS2, RUN-SS3/4
BIAS Pin Current
TYP
l
BIAS = 3.1V, All Switches Off
MAX
UNITS
4.5
V
12
65
mA
μA
2
μA
0.8
V
2.25
2.7
V
16.5
20
mA
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LT3513
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, BIAS = 3V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
FB Threshold Offset to Begin CT Charge
(Note 3)
90
125
160
mV
CT Pin Current Source
All FB Pins = 1.5V
16
20
25
μA
CT Threshold to Power VON
All FB Pins = 1.5V
1
1.1
1.2
V
200
400
VON Switch Drop
VON Current = 30mA
Maximum VON Current
VE3 = 30V
l
VON_CLK Input Voltage High
30
50
1.5
V
VON_CLK Input Voltage Low
VONSINK Voltage On
VONSINK Current = 1μA
●
Master Oscillator Frequency
●
1.90
1.80
mV
mA
2
0.3
V
1.2
V
2.12
2.22
MHz
MHz
Foldback Switching Frequency
All FB = 0V
200
kHz
UVLO Pin Threshold
UVLO Pin Voltage Rising
1.25
V
UVLO Pin Hysteresis Current
VUVLO = 1V
PGOOD Threshold Offset
PGOOD Sink Current
PGOOD Connected to 40V Through 100k
PGOOD Pin Leakage
VPGOOD = 40V
3.4
3.9
4.4
μA
90
125
160
mV
4
mA
1
μA
1.235
1.255
1.265
V
V
0.01
0.03
%/V
30
200
nA
Switch 1 (2.2A Buck)
FB1 Voltage
●
FB1 Voltage Line Regulation
4.5V < VIN < 32V
FB1 Pin Bias Current
(Note 4)
1.215
1.205
●
Error Amplifier 1 Voltage Gain
Error Amplifier 1 Transconductance
ΔI = 10μA
●
Maximum Duty Cycle
75
2.2
250
V/V
220
μmhos
85
%
Switch 1 Current Limit
Duty Cycle = 35% (Note 5)
Switch 1 VCESAT
ISW = 1.5A
3
3.5
Switch 1 Leakage Current
FB1 = 1.5V
0.1
10
μA
Minimum BOOST Voltage Above SW1 Pin
ISW = 1.5A (Note 6)
1.8
2.5
V
BOOST Pin Current
ISW = 1.5A
30
50
mA
BOOST Schottky Diode Drop
I = 170mA
700
430
A
mV
mV
Switch 2 (1.5A BOOST)
FB2 Voltage
●
FB2 Voltage Line Regulation
4.5V < VIN < 32V
FB2 Pin Bias Current
(Note 4)
1.20
1.19
●
Error Amplifier 2 Voltage Gain
Error Amplifier 2 Transconductance
ΔI = 10μA
Switch 2 Current Limit
1.5
1.22
1.24
1.25
V
V
0.01
0.03
%/V
30
200
V/V
220
μmhos
1.85
Switch 2 VCESAT
ISW2 = 1.2A
360
Switch 2 Leakage Current
FB2 = 1.5V
0.1
BIAS Pin Current Due to SW2
ISW2 = 1.2A
Maximum Duty Cycle (SW2)
●
75
nA
250
2.3
A
mV
1
μA
45
mA
90
%
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LT3513
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, BIAS = 3V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
1.20
1.19
1.22
1.24
1.25
V
V
0.01
0.03
%/V
30
200
nA
Switch 3 (250mA BOOST)
FB3 Voltage
●
FB3 Voltage Line Regulation
4.5V < VIN < 32V
FB3 Pin Bias Current
(Note 4)
●
Error Amplifier 3 Voltage Gain
Error Amplifier 3 Transconductance
ΔI = 10μA
Switch 3 Current Limit
0.25
250
V/V
220
μmhos
0.3
Switch 3 VCESAT
ISW3 = 0.2A
200
Switch 3 Leakage Current
FB3 = 1.5V
0.1
BIAS Pin Current Due to SW3
ISW3 = 0.2A
18
●
Maximum Duty Cycle (SW3)
Schottky Diode Drop
84
I = 170mA
0.38
A
mV
1
μA
mA
88
%
900
mV
Switch 4 (250mA Inverter)
NFB4 Voltage
●
NFB4 Voltage Line Regulation
4.5V < VIN < 32V
NFB4 Pin Bias Current
(Note 4)
–1.205
–1.215
●
Error Amplifier 4 Voltage Gain
Error Amplifier 4 Transconductance
ΔI = 10μA
Switch 4 Current Limit
0.28
–1.180
–1.155
–1.145
0.01
0.03
%/V
5
16
μA
200
V/V
220
μmhos
0.3
Switch 4 VCESAT
ISW4 = 0.2A
200
Switch 4 Leakage Current
NFB4 = –1.5V
0.1
BIAS Pin Current Due to SW4
ISW4 = 0.2A
18
Maximum Duty Cycle (SW4)
Schottky Diode Drop (D4)
84
I = 170mA
V
V
0.40
A
mV
1
μA
mA
88
%
700
mV
NPN LDO
FB5 Voltage
●
0.61
0.6
0.625
0.63
0.65
8
10
Base Drive Current
FB5 = 0.5V
6
LDOPWR Minimum Voltage
BD = 3.5V
4.5
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT3513E is guaranteed to meet specified performance from
0°C to 125°C junction temperature. Specifications over the –40°C to
125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LT3513I is guarenteed over the full –40°C to 125°C operating junction
temperature range.
Note 3: The CT pin is held low until FB1, FB2, FB3 and NFB4 all ramp
above the FB threshold offset.
V
V
mA
V
Note 4: Current flows out of FB1, FB2, FB3 and NFB4.
Note 5: Current limit is guaranteed by design and/or correlation to static
test. Slope compensation reduces current limit at higher duty cycles.
Note 6: This is the minimum voltage across the boost capacitor needed to
guarantee full saturation of the internal power switch.
Note 7: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed the maximum operating junction temperature
range when overtemperature protection is active. Continuous operation
above the specified maximum operating junction temperature may impair
device reliability.
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LT3513
TYPICAL PERFORMANCE CHARACTERISTICS
Maximum Output Current for
VLOGIC = 3.3V
Start and Run VLOGIC = 3.3V
SW1 Current Limit vs Duty Cycle
3.0
2.6
8
SW1 CURRENT LIMIT
vs DUTY CYCLE
2.4
7
2.5
2.2
L = 2.4μH
2.0
1.8
1.6
MINIMUM
5
1.5
2
1
0
1.2
5
0
10
25
20
15
35
VIN (V)
45
55
DUTY CYCLE (%)
0
0.001
75
65
BOOST Pin Current
SW3 Current Limit
SW2 Current Limit
500
2.4
450
20
SW CURRENT LIMIT (mA)
2.3
SW CURRENT LIMIT (A)
BOOST CURRENT (mA)
60
30
2.2
2.1
2.0
1.9
1.8
1.7
10
0
500
1000 1500 2000 2500
SWITCH CURRENT (mA)
1.5
–40
3000
350
300
250
200
100
–50 –30 –10 10 30 50 70 90 110
AMBIENT TEMPERATURE (°C)
60
35
110
10
85
–15
AMBIENT TEMPERATURE (°C)
3513 G05
3513 G04
SW4 Current Limit
3513 G06
SW1 VCESAT
500
1000
450
900
SW2 VCESAT
600
500
800
400
300
250
VCE2SAT (mV)
700
350
VCESAT (mV)
SW CURRENT LIMIT (mA)
400
150
1.6
0
600
500
400
200
150
400
300
200
300
200
1
3513 G03
2.5
70
40
0.01
0.1
LOAD CURRENT (A)
3513 G02
3513 G01
50
VIN(MIN) RUN
4
3
1.0
0.5
1.4
VIN(MIN) START
6
2.0
VIN (V)
SW1 CURRENT LIMIT (A)
L = 4.3μH
IOUT(MAX) (A)
TA = 25°C, unless otherwise noted.
100
100
100
–50 –30 –10 10 30 50 70 90 110
AMBIENT TEMPERATURE (°C)
3513 G07
0
0
0
500
1000 1500 2000
SW1 CURRENT (mA)
2500
3000
3513 G08
0
400
800
1200
ISW2 (mA)
1600
2000
3513 G09
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LT3513
TYPICAL PERFORMANCE CHARACTERISTICS
SW3 VCESAT
TA = 25°C, unless otherwise noted.
SW4 VCESAT
300
350
250
300
VON Current Limit
45
40
150
ION LIMIT (mA)
200
VCESAT (mV)
VCE3SAT (mV)
35
250
200
150
100
100
30
25
20
15
10
50
50
0
0
0
50
100
150 200 250
ISW3 (mA)
300
350
5
0
50
100
150 200
ISW (mA)
250
300
3513 G10
0
350
0
5
10
15
20
VE3 (V)
25
3513 G11
Oscillator Frequency
3513 G12
Frequency Foldback
2.5
35
30
Reference Voltage
2500
1.25
2000
1.24
FREQUENCY (MHz)
2.3
2.2
2.1
2.0
1.9
REFERENCE VOLTAGE (V)
SWITCHING FREQUENCY (kHz)
2.4
1500
1000
1.23
1.22
1.21
500
1.8
1.7
–50
0
50
0
100
AMBIENT TEMPERATURE (°C)
0
3513 G13
BIAS Pin Current
EFFICIENCY (%)
BIAS CURRENT (mA)
ISW2 = 0A
ISW3 = 0A
ISW4 = 0A
20
10
0
–50
100
90
90
80
80
70
60
50
100
TEMPERATURE (°C)
150
3513 G16
70
60
50
50
0
110
Efficiency, VLOGIC = 5V
100
EFFICIENCY (%)
L2 = 10μH
L3 = 10μH
L4 = 10μH
30
60
35
10
85
TEMPERATURE (°C)
3513 G15
Efficiency, AVDD = 13V
40
–15
3513 G14
60
50
1.20
–40
150 300 450 600 750 900 1050 1200
VFB (mV)
40
1
100
200
300
400
LOAD CURRENT (mA)
500
3513 G17
40
100 300
500
700 900 1100 1300 1500
IOUT (mA)
3513 G18
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LT3513
TYPICAL PERFORMANCE CHARACTERISTICS
VUVLO vs Temperature
1.33
8
1.32
660
UVLO FOR
START
7
1.31
6
5
4
3
Reference Voltage for FB5, LDO
670
1.30
UVLO MINIMUM
FOR RUN
1.29
1.28
2
0
–50
0
25
–25
75 100
50
AMBIENT TEMPERATURE (°C)
125
1.26
–50
650
640
630
620
610
1.27
1
REFERENCE VOLTAGE (mV)
9
UVLO (V)
BASE CURRENT LIMIT OF INTERNAL PNP (mA)
LDO Current Limit vs Temperature
TA = 25°C, unless otherwise noted.
0
50
100
AMBIENT TEMPERATURE (oC)
3513 G19
3513 G20
600
–40
–15
60
35
85
10
TEMPERATURE (°C)
110
3513 G21
PIN FUNCTIONS
FB5 (Pin 1): Feedback Pin. Tie the resistor tap to this pin
and set the output of the LDO according to VLDO = 0.625 •
(1 + R14/R15). Reference designators refer to Figure 1.
VC1 (Pin 2): Control Voltage and Compensation Pin for
Internal Error Amplifier. Connect a series RC from this pin
to ground to compensate switching regulator 1.
RUN-SS3/4 (Pin 3): Run/Soft-Start Pin. This is the softstart pin for switching regulators 3 and 4. Place a soft-start
capacitor here to limit start-up inrush current and output
voltage ramp rate. When the BIAS pin reaches 2.8V, a 2μA
current source charges the capacitor. When the voltage at
this pin reaches 0.8V, switches 3 and 4 turn on and begin
switching. For slower start-up use a larger capacitor. For
complete shutdown tie RUN-SS3/4 to ground.
FB3 (Pin 4): Feedback Pin. Tie the resistor tap to this
pin and set VON according to VON = 1.23V • (1 + R8/R9)
– 150mV. Reference designators refer to Figure 1.
RUN-SS2 (Pin 5): Run/Soft-Start Pin. This is the soft-start
pin for switching regulator 2. Place a soft-start capacitor
here to limit start-up inrush current and output voltage
ramp rate. When the BIAS pin reaches 2.25V, a 2μA current source charges the capacitor. When the voltage at this
pin reaches 0.8V, switch 2 turns on and begins switching.
For slower start-up use a larger capacitor. For complete
shutdown tie RUN-SS2 to ground.
SW3 (Pin 6): Switch Node. The SW3 pin is the collector of
the internal NPN bipolar transistor for switching regulator
3. Minimize trace area at this pin to keep EMI down.
E3 (Pin 7): This is switching regulator 3’s output and
the emitter of the output disconnect PNP. Tie the output
capacitor and resistor divider here.
VON (Pin 8): This is the delayed output for switching
regulator 3. VON reaches its programmed voltage after the
internal CT timer times out. Protection circuitry ensures
VON is disabled if any of the four outputs are more than
10% below normal voltage. This output is also disabled
when VON_CLK is high.
VONSINK (Pin 9): This is an open-collector output controlled by the VON_CLK pin. When VON_CLK is low, this
pin draws no current and when VON_CLK is high, this pin
draws current.
VON_CLK (Pin 10): This pin controls the output disconnect
device and the open collector of VONSINK. When this pin is
low, the VON pin is enabled and the VONSINK pin is a high
impedance. When this pin is high, the VON pin is disabled
and the VONSINK pin sinks current to ground.
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LT3513
PIN FUNCTIONS
PGOOD (Pin 11): Power Good Comparator Output. This is
the open collector output of the power good comparator
and can be used in conjunction with an external P-channel MOSFET to provide output disconnect for AVDD as
shown in Figure 2. When switcher 2’s output reaches
approximately 90% of its programmed voltage, PGOOD
will be pulled to ground. This will pull down on the gate
of the MOSFET, connecting AVDD. A 100k pull-up resistor
between the source and the gate of the P-channel MOSFET
keeps it off when switcher 2’s output is low.
VC3 (Pin 12): Control Voltage and Compensation Pin for
Internal Error Amplifier. Connect a series RC from this pin
to ground to compensate switching regulator 3.
CT (Pin 13): Timing Capacitor Pin. This is the input to
the VON timer and programs the time delay from all four
feedback pins reaching 1.125V to VON turning on. The CT
capacitor value can be set using the equation C = (20μA
• tDELAY)/1.1V.
GND (Pins 14, 17, 33): Ground.
SW2 (Pins 15, 16): Switch Node. The SW2 pin is the collector of the internal NPN bipolar transistor for switching
regulator 2. Minimize trace area at this pin to keep EMI
down.
BIAS (Pins 18, 29): The BIAS pin is used to improve efficiency when operating at higher input voltages. Connecting this pin to the output of switching regulator 1 forces
most of the internal circuitry to draw its operating current
from VLOGIC rather than VIN. The drivers of switches 2, 3,
4 and 5 are supplied by BIAS. Switches 2, 3, 4 and 5 will
not switch until the BIAS pin reaches approximately 2.7V.
Both BIAS pins must be tied to VLOGIC.
FB2 (Pin 19): Feedback Pin. Tie the resistor divider tap
to this pin and set AVDD according to AVDD = 1.23V •
(1 + R5/R6). Reference designators refer to Figure 2.
VC2 (Pin 20): Control Voltage and Compensation Pin for
Internal Error Amplifier. Connect a series RC from this pin
to ground to compensate switching regulator 2.
VC4 (Pin 21): Control Voltage and Compensation Pin for
Internal Error Amplifier. Connect a series RC from this pin
to ground to compensate switching regulator 4.
RUN-SS1 (Pin 22): Run/Soft-Start Pin. This is the soft-start
pin for switching regulator 1. Place a soft-start capacitor
here to limit start-up inrush current and output voltage
ramp rate. When power is applied to the VIN pin, a 2μA
current source charges the capacitor. When the voltage
at this pin reaches 0.8V, switch 1 turns on and begins
switching. For slower start-up use a larger capacitor. For
complete shutdown tie RUN-SS1 to ground.
NFB4 (Pin 23): Negative Feedback Pin. Tie the resistor divider tap to this pin and set VOFF according to VOFF = –1.18 •
(1 + R3/R4). Reference designators refer to Figure 2.
D4 (Pin 24): Internal Schottky Diode Pin. This pin is the
anode of an internal Schottky diode with the other end
connected to ground. This Schottky diode is used in
generating the VOFF output.
SW4 (Pin 25): Switch Node. The SW4 pin is the collector of
the internal NPN bipolar transistor for switching regulator
4. Minimize trace area at this pin to keep EMI down.
BD (Note 26): NPN LDO Base Drive. This pin controls the
base of the external NPN LDO transistor.
LDOPWR (Pin 27): Input Voltage for LDO Driver. This pin
supplies the current for the NPN LDO base. This pin can be
connected to VIN. To save power at high VIN voltages, the
pin can alternatively be connected to the AVDD supply.
BOOST (Pin 28): The BOOST pin is used to provide a
drive voltage higher than VIN to the switch 1 drive circuit.
An internal Schottky diode is connected between BIAS
and BOOST. A capacitor needs to be connected between
BOOST and SW1.
SENSE– (Pin 30) Negative Current Sense Input. This pin
(along with the SENSE+ pin) is used to sense the inductor
current for the buck switching regulator.
3513fa
8
LT3513
PIN FUNCTIONS
SENSE+ (Pin 31) Positive Current Sense Input. This pin
(along with the SENSE– pin) is used to sense the inductor
current for the buck switching regulator.
FB1 (Pin 32): Feedback Pin. Tie the resistor divider tap
to this pin and set VLOGIC according to VLOGIC = 1.23V •
(1 + R1/R2). Reference designators refer to Figure 2.
SW1 (Pins 34, 35): Switch Node. The SW1 pins are the
emitter of the internal NPN bipolar power transistor for
switching regulator 1. These points must be tied together
for proper operation. Connect these pins to the inductor,
catch diode and boost capacitor.
VIN (Pins 36, 37): Input Voltage. This pin supplies current
to the internal circuitry of the LT3513. This pin must be
locally bypassed with a capacitor.
UVLO (Pin 38): Undervoltage Lockout. A resistor divider
connected to VIN is tied to this pin to program the minimum
input voltage at which the LT3513 will operate. This pin is
compared to the internal 1.25V reference. When UVLO is
less than 1.25V, the switching regulators are not allowed
to operate (the RUN/SS pins are still used to turn on each
switching regulator). When this pin falls below 1.25V,
3.9μA will be pulled from the pin to provide programmable
hysteresis for UVLO.
Exposed Pad (Pin 39): Ground. The Exposed Pad of the
package provides both electrical contact to ground and
good thermal contact to the printed circuit board. The
Exposed Pad must be soldered to the circuit board for
proper operation.
3513fa
9
LT3513
BLOCK DIAGRAM
LDOPWR
+
–
27
+
gm
26
1
BD
VON_CLK
0.625V
VONSINK
MASTER
OSCILLATOR
2MHz
FB5
VIN
36,37
11
19
13
PGOOD
VC1
–
+
BOOST
S
Q
DRIVER
SW1
34, 35
SENSE+
1.1V
UVLO
+
–
1.234V
+
1.1V
+
–
+gm
CURRENT
SENSE AMP
VC2
–
+
31
30
20
BIAS
18, 29
SW2
15, 16
R
FOLDBACK
OSCILLATOR
28
VIN
SENSE–
CT
2
BIAS
R
SLOPE COMP/
ONE-SHOT
FB2
+
+
9
VON_CLK
FB2
1.25V
38
1.234V
+
–
–
–
–
32
FB1
INTERNAL
REGULATOR
AND REFERENCE
+
–
22
RUN-SS1
–
+gm
10
S
Q
DRIVER
UVLO
3μA
VC4
4
RUN-SS2
1.18V
SW3
LOCKOUT
BIAS
+
–
5
RUN-SS3/4
100k
–
+
+
–
3
+
–
+gm
BIAS
S
SW2
LOCKOUT
FB3
1.23V
+
+
–
GND
14,17,33
FOLDBACK
OSCILLATOR
25
D4
VC3
BIAS
8
SW4
–
+
VON
24
12
SW3
6
R
S
23
Q
DRIVER
–
+gm
NFB4
R
FOLDBACK
OSCILLATOR
2.7V
100k
21
Q
DRIVER
1.1V
E3
VON_CLK
Figure 1
7
3513 F01
3513fa
10
LT3513
OPERATION
The LT3513 is a highly integrated power supply IC containing four separate switching regulators and a low dropout
linear regulator (LDO). Switching regulator 1 is a stepdown 2.5A regulator with inductor current sense and an
integrated boost Schottky diode. Switching regulator 2 can
be configured as a step-up or SEPIC converter and has a
1.2A switch. Switching regulator 3 consists of a step-up
regulator with a 0.25A switch as well as an integrated
Schottky diode. Switching regulator 4 is a negative regulator with a switch current limit of 0.25A and an integrated
Schottky diode. Linear regulator 5 is capable of providing
8mA of current to the base of an external NPN transistor.
The regulators share common circuitry including input
source, voltage reference and master oscillator. Operation
can be best understood by referring to the Block Diagram
as shown in Figure 1.
If the RUN-SS1 pin is pulled to ground, the LT3513 is shut
down and draws 30μA from the input source tied to VIN.
An internal 2μA current source charges the external softstart capacitor, generating a voltage ramp at this pin. If the
RUN-SS1 pin exceeds 0.6V, the internal bias circuits turn
on, including the internal regulator, reference and 2MHz
master oscillator. The master oscillator generates four
clock signals, one for each of the switching regulators.
Switching regulator 1 will only begin to operate when the
RUN-SS1 pin reaches 0.8V. Switcher 1 generates VLOGIC,
which must be tied to the BIAS pin. When BIAS reaches 2.8V,
the NPNs pulling down on the RUN-SS2 and RUN-SS3/4
pins turns off, allowing an internal 2μA current source
to charge the external capacitors tied to RUN-SS2 and
RUN-SS3/4 pins. When the voltage on RUN-SS2 reaches
0.8V, switcher 2 is enabled. Correspondingly, when the
voltage on RUN-SS3/4 reaches 0.8V, switchers 3 and 4
are enabled. AVDD, E3 and VOFF will then begin rising at a
rate determined by the capacitors tied to the RUN-SS2 and
RUN-SS3/4 pins. When all four switching outputs reach
90% of their programmed voltages, the NPN pulling down
on the CT pin will turn off, and an internal 20μA current
source will charge the external capacitor tied to the CT pin.
When the CT pin reaches 1.1V, the output disconnect PNP
turns on, connecting VON to E3. In the event of any of the
four outputs dropping below 10% of their programmed
voltage, PanelProtect circuitry pulls the CT pin to GND,
disabling VON.
A power good comparator monitors AVDD and turns on
when FB2 is at or above 90% of its regulated value. The
output is an open-collector transistor that is off when the
output is out of regulation, allowing an external resistor
to pull the pin high. This pin can be used with a P-channel MOSFET that functions as an output disconnect for
AVDD.
The four switchers are current mode regulators. Instead
of directly modulating the duty cycle of the power switch,
the feedback loop controls the peak current in the switch
during each cycle. Compared to voltage mode control, current mode control improves loop dynamics and provides
cycle-by-cycle current limit.
RUN-SS 2V/DIV
VLOGIC 5V/DIV
IL1 1A/DIV
SS-234 2V/DIV
AVDD 10V/DIV
IL2 500μA/DIV
PGOOD 20V/DIV
5ms/DIV
3513 F02a
(2a)
VSS3/4 2V/DIV
VOFF 10V/DIV
IL4 500mA/DIV
VE3 20V/DIV
IL3 500mA/DIV
VCT 2V/DIV
VON 20V/DIV
5ms/DIV
3513 F02b
(2b)
Figure 2. LT3513 Power-Up Sequence. (Traces from Both Photos
are Synchnonized to the Same Trigger)
3513fa
11
LT3513
OPERATION
All four switchers employ a constant-frequency current
mode control scheme. Switcher 1, the step-down regulator, differs slightly from the others with inductor current
sense. Instead of monitoring the current at the switch,
current nodes are used to measure the current through
the inductor. Inductor current sense does not suffer from
minimum on-time problems, therefore always keeping the switch current limited with any input-to-output
voltage ratio. Switcher 1 is always synchronized to the
master oscillator. The other three switchers each have
their own slave oscillator. The slave oscillator reduces the
frequency when the feedback voltage dips below 0.75V
and decreases linearly below the threshold as shown in
the Performance Characteristics’ Frequency Foldback plot.
Other than these two differences, the control loop is similar
in all four switchers. A pulse from the master oscillator
for switcher 1 or a pulse from the slave oscillator for the
other three switchers sets the RS latch and turns on the
internal NPN bipolar power switch. Current in the switch
and the external inductor begins to increase. When this
current exceeds a level determined by the voltage at VC, the
current comparator resets the latch, turning off the switch.
The current in the inductor flows through the Schottky
diode and begins to decrease. The cycle begins again at
the next pulse from the oscillator. In this way, the voltage
on the VC pin controls the current through the inductor to
the output. The internal error amplifier regulates the output
by continually adjusting the VC pin voltage. The threshold
for switching on the VC pin is 0.8V, and an active clamp
of 1.8V limits the VC voltage. Switchers 2, 3 and 4 also
contain an independent current limit not dependent on VC
or duty cycle. Switcher 1’s current limit is controlled by
the VC voltage and varies with duty cycle. All four switchers also use slope compensation to ensure stability with
the current mode scheme at duty cycles above 50%. The
RUN-SS1, RUN-SS2 and RUN-SS3/4 pins control the rate
of rise of the feedback pins.
The switch driver for SW1 operates either from VIN or from
the BOOST pin. An external capacitor and an integrated
Schottky diode are used to generate a voltage at the BOOST
pin that is higher than the input supply. This allows the
driver to saturate the internal bipolar NPN power switch
for efficient operation.
INPUT VOLTAGE RANGE STEP-DOWN CONSIDERATION
The minimum operating voltage of switcher 1 is determined
either by the LT3513’s undervoltage lockout of ~4V or by
its maximum duty cycle. A user defined undervoltage
lockout may be set with the UVLO pin at a voltage higher
than the internal undervoltage lockout. The duty cycle is
the fraction of time that the internal switch is on and is
determined by the input and output voltages:
DC =
VOUT + VF
VIN – VSW + VF
where VF is the forward voltage drop of the catch diode
(~0.4V) and VSW is the voltage drop of the internal switch
(~0.3V at maximum load). This leads to a minimum input
voltage of:
VIN(MIN) =
VOUT + VF
DCMAX – VF + VSW
with DCMAX = 0.75.
The user defined undervoltage is set by a resistor divider
connected to the UVLO pin. The comparator pulls 3μA
from the pin when the UVLO pin is higher than 1.25V.
The hysteresis and minimum input voltage equations are
as follows:
VHYS = (R2 + 2k ) • 3.9µA
VIN(MIN) = 1.25V
R1+ R2
R1
VIN
R2
UVLO
38
R1
3513 A1
3513fa
12
LT3513
OPERATION
INDUCTOR SELECTION AND MAXIMUM OUTPUT
CURRENT
inductance is required to avoid subharmonic oscillations,
see Application Note 19.
A good first choice for the inductor value is:
The current in the inductor is a triangle wave with an average
value equal to the load current. The peak switch current
is equal to the output current plus half the peak-to-peak
inductor ripple current. The LT3513 limits its switch current in order to protect itself and the system from overload
faults. Therefore, the maximum output current that the
LT3513 will deliver depends on the switch current limit, the
inductor value, and the input and output voltages. When
the switch is off, the potential across the inductor is the
output voltage plus the catch diode drop. This gives the
peak-to-peak ripple current in the inductor:
L=
VOUT + VF
1.8
where VF is the voltage drop of the catch diode (~0.4V) and L
is in μH. The inductor’s RMS current rating must be greater
than the maximum load current and its saturation current
should be at least 30% higher. For highest efficiency, the
series resistance (DCR) should be less than 0.1Ω. Table 1
lists several vendors and types that are suitable.
Table 1. Inductor Vendors
VENDOR
Coilcraft
Murata
TDK
URL
www.coilcraft.com
www.murata.com
www.component.tdk.com
Toko
www.toko.com
Sumida
www.sumida.com
PART SERIES
MSS7341
LQH55D
SLF7045
SLF10145
DC62CB
D63CB
D75C
D75F
CR54
CDRH74
CDRH6D38
CR75
TYPE
Shielded
Open
Shielded
Shielded
Shielded
Shielded
Shielded
Open
Open
Shielded
Shielded
Open
The optimum inductor for a given application may differ
from the one indicated by this simple design guide. A larger
value inductor provides a higher maximum load current,
and reduces the output voltage ripple. If your load is lower
than the maximum load current, then you can relax the
value of the inductor and operate with higher ripple current. This allows you to use a physically smaller inductor
or one with a lower DCR resulting in higher efficiency. Be
aware that the maximum load current depends on input
voltage. A graph in the Typical Performance Characteristics section of this data sheet shows the maximum
load current as a function of input voltage and inductor
value for VOUT = 3.3V. In addition, low inductance may
result in discontinuous mode operation, which further
reduces maximum load current. For details of maximum
output current and discontinuous mode operation, see
Linear Technology’s Application Note 44. Finally, for duty
cycles greater than 50% (VOUT/VIN > 0.5), a minimum
ΔIL =
(1– DC)( VOUT + VF )
L•f
where f is the switching frequency of the LT3513 and L
is the value of the inductor. The peak inductor and switch
current is:
ISW(PK ) = ILPK = IOUT +
ΔIL
2
To maintain output regulation, this peak current must be
less than the LT3513’s switch current limit of ILIM. For SW1,
ILIM is at least 2A at DC = 0.35, and decreases linearly to
1.5A at DC = 0.75 as shown in the Typical Performance
Characteristics section. The maximum output current is
a function of the chosen inductor value:
IOUT(MAX ) = ILIM –
ΔIL
ΔI
= 2.5A • (1– 0.57 • DC) – L
2
2
Choosing an inductor value so that the ripple current is
small will allow a maximum output current near the switch
current limit. One approach to choosing the inductor is to
start with the simple rule given above, look at the available
inductors and choose one to meet cost or space goals.
Then use these equations to check that the LT3513 will
be able to deliver the required output current. Note again
that these equations assume that the inductor current is
continuous. Discontinuous operation occurs when IOUT
is less than ΔIL/2.
3513fa
13
LT3513
OPERATION
OUTPUT CAPACITOR SELECTION
For 5V and 3.3V outputs, a 10μF 6.3V ceramic capacitor
(X5R or X7R) at the output results in very low output voltage ripple and good transient response. Other types and
values will also work; the following discussion explores
tradeoffs in output ripple and transient performance.
The output capacitor filters the inductor current to generate
an output with low voltage ripple. It also stores energy in
order satisfy transient loads and stabilizes the LT3513’s
control loop. Because the LT3513 operates at a high
frequency, minimal output capacitance is necessary. In
addition, the control loop operates well with or without
the presence of output capacitor series resistance (ESR).
Ceramic capacitors, which achieve very low output ripple
and small circuit size, are therefore an option.
You can estimate output ripple with the following
equations:
VRIPPLE =
ΔIL
for ceramic capacitors, and
8 • f • COUT
VRIPPLE = ΔIL • ESR for electrolytic capacitors (tantalum
and aluminum)
where ΔIL is the peak-to-peak ripple current in the inductor.
The RMS content of this ripple is very low so the RMS
current rating of the output capacitor is usually not of
concern. It can be estimated with the formula:
IC(RMS) =
ΔIL
12
Another constraint on the output capacitor is that it must
have greater energy storage than the inductor; if the stored
energy in the inductor transfers to the output, the resulting
voltage step should be small compared to the regulation
voltage. For a 5% overshoot, this requirement indicates:
⎛ I
⎞
COUT > 10 • L • ⎜ LIM ⎟
⎝ VOUT ⎠
2
The low ESR and small size of ceramic capacitors make
them the preferred type for LT3513 applications. However,
not all ceramic capacitors are the same. Many of the higher
value capacitors use poor dielectrics with high temperature
and voltage coefficients. In particular, Y5V and Z5U types
lose a large fraction of their capacitance with applied voltage and at temperature extremes.
Because loop stability and transient response depend on
the value of COUT, this loss may be unacceptable. Use X7R
and X5R types. Electrolytic capacitors are also an option.
The ESRs of most aluminum electrolytic capacitors are
too large to deliver low output ripple. Tantalum and newer,
lower ESR organic electrolytic capacitors intended for
power supply use are suitable, and the manufacturers will
specify the ESR. Chose a capacitor with a low enough ESR
for the required output ripple. Because the volume of the
capacitor determines its ESR, both the size and the value
will be larger than a ceramic capacitor that would give
similar ripple performance. One benefit is that the larger
capacitance may give better transient response for large
changes in load current. Table 2 lists several capacitor
vendors.
Table 2. Low ESR Surface Mount Capacitors
VENDOR
TYPE
SERIES
Taiyo Yuden
Ceramic
X5R, X7R
AVX
Ceramic
Tantalum
X5R, X7R
TPS
Kemet
Tantalum
Ta Organic
Al Organic
T491, T494, T495
T520
A700
Sanyo
Ta or Al Organic
POSCAP
Panasonic
Al Organic
SP CAP
TDK
Ceramic
X5R, X7R
DIODE SELECTION
The catch diode (D1 from Figure 1) conducts current only
during switch off time. Average forward current in normal
operation can be calculated from:
ID( AVG) = IOUT
VIN – VOUT
VIN
The only reason to consider a diode with a larger current
rating than necessary for nominal operation is for the
worst-case condition of shorted output. The diode current
will then increase to the typical peak switch current. Peak
reverse voltage is equal to the regulator input voltage.
3513fa
14
LT3513
OPERATION
Use a diode with a reverse voltage rating greater than the
input voltage. Table 3 lists several Schottky diodes and
their manufacturers.
R4 should be 10k or less to avoid bias current errors.
Table 3. Schottky Diodes
PART NUMBER
⎛V
⎞
R3 = R4 ⎜ OUT – 1⎟
⎝ 1.25 ⎠
VR (V)
IAVE (A)
VFAT 1A (mV)
VF at 2A (mV)
MBRM120E
20
1
530
MBRM140
40
1
550
MBRS240
40
2
MBRA340
40
3
B120
20
1
B240
40
2
500
B340A
40
3
450
On Semiconductor
Regulating Negative Output Voltages
The LT3513 contains an inverting op amp with a gain of
1. The NFB4 pin works just as the other FB pins. Choose
the resistors according to:
450
Diodes Inc.
R6 =
VOUT • R5
– R5
1.25
500
R5 should be 2.5kΩ or less to avoid bias current errors.
–VOUT
BOOST PIN CONSIDERATIONS
The minimum operating voltage of an LT3513 application
is limited by the undervoltage lockout ~4V and by the
maximum duty cycle. The boost circuit also limits the
minimum input voltage for proper start-up. If the input
voltage ramps slowly or the LT3513 turns on when the
output is already in regulation, the boost capacitor may
not be fully charged. Because the boost capacitor charges
with the energy stored in the inductor, the circuit will rely
on some minimum load current to get the boost circuit
running properly. This minimum load will depend on input
and output voltages. The Typical Performance Characteristics section shows a plot of the minimum load current
to start as a function of input voltage for a 3.3V output.
The minimum load current generally goes to zero once the
circuit has started. Even without an output load current, in
many cases the discharged output capacitor will present
a load to the switcher that will allow it to start.
R6
NFB4
22
R5
3513 A2
Duty Cycle Range
The maximum duty cycle (DC) of the LT3513 switching
regulator is 75% for SW2, and 84% for SW3 and SW4.
The duty cycle for a given application using the step-up
or charge pump topology is:
DC =
Regulating Positive Output Voltages
The output voltage is programmed with a resistor divider
between the output and the FB pin. Choose the resistors
according to:
VOUT
The duty cycle for a given application using the inverter
or SEPIC is:
DC =
INVERTER/STEP-UP CONSIDERATIONS
VOUT – VIN
VOUT
VIN + VOUT
The LT3513 can still be used in applications where the duty
cycle, as calculated above, is greater than the maximum.
However, the part must be operated in discontinuous mode
so that the actual duty cycle is reduced.
3513fa
15
LT3513
OPERATION
Inductor Selection
Table 1 lists several inductor vendors and types that are
suitable to use with the LT3513. Consult each manufacturer
for detailed information and for their entire selection of
related parts. Use ferrite core inductors to obtain the best
efficiency, as core losses at frequencies above 1MHz are
much lower for ferrite cores than for powdered-iron units.
A 10μH to 22μH inductor will be the best choice for most
LT3513 step-up and charge pump designs. Choose an
inductor that can carry the entire switch current without
saturating. For inverting and SEPIC regulators, a coupled
inductor, or two separate inductors is an option. When
using coupled inductors, choose one that can handle
at least the switch current without saturating. If using
uncoupled inductors, each inductor need only handle approximately one-half of the total switch current. A 4.7μH
to 15μH coupled inductor or two 10μH to 22μH uncoupled
inductors will usually be the best choice for most LT3513
inverting and SEPIC designs.
Output Capacitor Selection
Use low ESR (equivalent series resistance) capacitors at
the output to minimize the output ripple voltage. Multilayer
ceramic capacitors are an excellent choice, as they have
an extremely low ESR and are available in very small packages. X7R dielectrics are preferred, followed by X5R, as
these materials retain their capacitance over wide voltage
and temperature ranges. A 10μF to 22μF output capacitor is sufficient for most LT3513 applications. Even less
capacitance is required for outputs with |VOUT| > 20V or
|IOUT| < 100mA. Solid tantalum or OS-CON capacitors will
also work, but they will occupy more board area and will
have a higher ESR than a ceramic capacitor. Always use
a capacitor with a sufficient voltage rating.
Diode Selection
A Schottky diode is recommended for use with the
LT3513 switcher 2 and switcher 4. The Schottky diode for
switcher 3 is integrated inside the LT3513. Choose diodes
for switcher 2 and switcher 4 rated to handle an average
current greater than the load current and rated to handle
the maximum diode voltage. The average diode current in
the step-up and SEPIC is equal to the load current. Each of
the two diodes in the charge pump configurations carries
an average diode current equal to the load current. The
ground connected diode in the charge pump is integrated
into the LT3513. The maximum diode voltage in the stepup and charge pump configurations is equal to |VOUT|.
The maximum diode voltage in the SEPIC and inverting
configurations is VIN + |VOUT|.
Input Capacitor Selection
Bypass the input of the LT3513 circuit with a 4.7μF or higher
ceramic capacitor of X7R or X5R type. A lower value or
a less expensive Y5V type will work if there is additional
bypassing provided by bulk electrolytic capacitors or if the
input source impedance is low. The following paragraphs
describe the input capacitor considerations in more detail.
Step-down regulators draw current from the input supply in pulses with very fast rise and fall times. The input
capacitor is required to reduce the resulting voltage ripple
at the LT3513 input and to force this switching current
into a tight local loop, minimizing EMI. The input capacitor must have low impedance at the switching frequency
to do this effectively and it must have an adequate ripple
current rating. The input capacitor RMS current can be
calculated from the step-down output voltage and current,
and the input voltage:
CIN(RMS) = IOUT
VOUT ( VIN – VOUT )
VIN
<
IOUT
2
and is largest when VIN = 2VOUT (50% duty cycle). The
ripple current contribution from the other channels will
be minimal. Considering that the maximum load current
from switcher 1 is ~3A, RMS ripple current will always be
less than 1.5A. The high frequency of the LT3513 reduces
the energy storage requirements of the input capacitor, so
that the capacitance required is less than 10μF. The combination of small size and low impedance (low equivalent
series resistance or ESR) of ceramic capacitors makes
3513fa
16
LT3513
OPERATION
them the preferred choice. The low ESR results in very
low voltage ripple. Ceramic capacitors can handle larger
magnitudes of ripple current than other capacitor types of
the same value. Use X5R and X7R types. An alternative to
a high value ceramic capacitor is a lower value along with
a larger electrolytic capacitor, for example a 1μF ceramic
capacitor in parallel with a low ESR tantalum capacitor. For
the electrolytic capacitor, a value larger than 10μF will be
required to meet the ESR and ripple current requirements.
Because the input capacitor is likely to see high surge
currents when the input source is applied, only consider
a tantalum capacitor if it has the appropriate surge current
rating. The manufacturer may also recommend operation
below the rated voltage of the capacitor. Be sure to place
the 1μF ceramic as close as possible to the VIN and GND
pins on the IC for optimal noise immunity.
A final caution is in order regarding the use of ceramic
capacitors at the input. A ceramic input capacitor can
combine with stray inductance to form a resonant tank
circuit. If power is applied quickly (for example by plugging
the circuit into a live power source), this tank can ring,
doubling the input voltage and damaging the LT3513. The
solution is to either clamp the input voltage or dampen the
tank circuit by adding a lossy capacitor (an electrolytic)
in parallel with the ceramic capacitor. For details, see Application Note 88.
Soft-Start and Shutdown
The RUN-SS1(Run/Soft-Start) pin is used to place the
switching regulators and the internal bias circuits in
shutdown mode. It also provides a soft-start function,
along with RUN-SS2 and RUN-SS3/4. If the RUN-SS1
pin is pulled to ground, the LT3513 enters its shutdown
mode with all regulators off and quiescent current reduced
to ~30μA. An internal 2μA current source pulls up on the
RUN-SS1, RUN-SS2, and RUN-SS3/4 pins. If the RUN-SS1
pin reaches ~0.6V, the internal bias circuits start and the
quiescent currents increase to their nominal levels.
If a capacitor is tied from the RUN-SS1, RUN-SS2 or
RUN-SS3/4 pins to ground, then the internal pull-up
current will generate a voltage ramp on these pins. This
voltage clamps the VC pin, limiting the peak switch current
and therefore input current during start-up. The RUN-SS1
pin clamps VC1, the RUN-SS2 pin clamps VC1 and the
RUN-SS3/4 pin clamps the VC3 and VC4 pins. A good value
for the soft-start capacitors is COUT/10,000, where COUT
is the value of the largest output capacitor.
VON Pin Considerations
The VON pin is the delayed output for switching regulator 3.
When the CT pin reaches 1.1V, the output disconnect PNP
turns on, connecting VON to E3. The VON pin is current
limited and will protect the LT3513 and input source from
a shorted output.
The VON pin output is also controlled from the VON_CLK
pin. When VON_CLK is low, the VON output will turn on if the
CT pin is greater than 1.1V. When VON_CLK is high, greater
than 1.5V, the VON output is disabled and the VONSINK open
collector device turns on. If the VONSINK pin is connected
to VON through a resistor, the VON voltage will decay with
a high VON_CLK. VON_CLK may be synced to the horizontal
scanning frequency to improve LCD image quality.
Low Voltage Dropout Linear Regulator
The LT3513 features an output to drive an external NPN
transistor LDO to provide a lower voltage logic supply voltage. The output is capable of providing 10mA of current to
the base of the NPN. The output of the LDO is controlled
by the FB5 pin. Choose the resistor values according to:
⎛ V
⎞
R8 = R7 ⎜ LDO – 1⎟
⎝ 0.625V ⎠
R8 should be 10k or less to avoid bias current errors.
The internal compensation of the LDO relies on a low ESR
ceramic capacitor between the values of 2.2μF and 20μF.
X7R dielectrics are preferred, followed by X5R, as these
materials retain their capacitance over wide voltage and
temperature ranges.
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17
LT3513
OPERATION
Printed Circuit Board Layout
For proper operation and minimum EMI, care must be
taken during printed circuit board (PCB) layout. Figure 3
shows the high current paths in the step-down regulator circuit. Note that in the step-down regulators, large,
switched currents flow in the power switch, the catch
diode and the input capacitor. In the step-up regulators,
large, switched currents flow through the power switch,
the switching diode and the output capacitor. In SEPIC and
inverting regulators, the switched currents flow through
the power switch, the switching diode and the tank capacitor. The loop formed by the components in the switched
current path should be as small as possible. Place these
components, along with the inductor and output capacitor,
on the same side of the circuit board, and connect them
on that layer. Place a local, unbroken ground plane below
these components, and tie this ground plane to system
ground at one location, ideally at the ground terminal of
VIN
the output capacitor C2. Additionally, keep the SW and
BOOST nodes as small as possible.
Thermal Considerations
The PCB must provide heat sinking to keep the LT3513
cool. The Exposed Pad on the bottom of the package must
be soldered to a ground plane. This ground should be tied
to other copper layers below with thermal vias; these layers will spread the heat dissipated by the LT3513. Place
additional vias near the catch diodes. Adding more copper
to the top and bottom layers and tying this copper to the
internal planes with vias can reduce thermal resistance
further. With these steps, the thermal resistance from die
(or junction) to ambient can be reduced to θJA = 25°C
or less. With 100LFPM airflow, this resistance can fall
by another 25%. Further increases in airflow will lead to
lower thermal resistance.
SW
GND
(3a)
VIN
SW
GND
(3b)
VSW
VIN
IC1
C1
L1
SW
D1
GND
C2
Figure 4. Topside PCB Layout
(3c)
3519 F03
Figure 3. Subtracting the Current When the Switch is On (3a)
from the Current When the Switch is Off (3b) Reveals the Path of
the High Frequency Switching Current (3c) Keep this Loop Small.
The Voltage on the SW and BOOST Nodes will Also be Switched;
Keep These Nodes as Small as Possible. Finally, Make Sure The
Circuit is Shielded with a Local Ground Plane
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18
LT3513
PACKAGE DESCRIPTION
UHF Package
38-Lead Plastic QFN (5mm × 7mm)
(Reference LTC DWG # 05-08-1701 Rev C)
0.70 p 0.05
5.50 p 0.05
5.15 ± 0.05
4.10 p 0.05
3.00 REF
3.15 ± 0.05
PACKAGE
OUTLINE
0.25 p 0.05
0.50 BSC
5.5 REF
6.10 p 0.05
7.50 p 0.05
RECOMMENDED SOLDER PAD LAYOUT
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
5.00 p 0.10
0.75 p 0.05
PIN 1 NOTCH
R = 0.30 TYP OR
0.35 s 45o CHAMFER
3.00 REF
37
0.00 – 0.05
38
0.40 p0.10
PIN 1
TOP MARK
(SEE NOTE 6)
1
2
5.15 ± 0.10
7.00 p 0.10
5.50 REF
3.15 ± 0.10
(UH) QFN REF C 1107
0.200 REF 0.25 p 0.05
0.50 BSC
R = 0.125
TYP
R = 0.10
TYP
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE
OUTLINE M0-220 VARIATION WHKD
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LT3513
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT3003
3-Channel LED Ballaster with PWM Dimming
VIN: 3V to 48V, IQ = 3,000:1 True Color PWM , ISD < 5μA,
MSOP10 Package
LT3465/LT3465A
Constant Current, 1.2MHz/2.7MHz, High Efficiency White
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VIN: 2.7V to 16V, VOUT(MAX) = 34V, IQ = 1.9mA, ISD < 1μA,
ThinSOT Package
LT3466/LT3466-1
Dual Constant Current, 2MHz High Efficiency White LED
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VIN: 2.7V to 24V, VOUT(MAX) = 40V, IQ = 5mA, ISD < 16μA,
3mm × 3mm DFN10 Package
LT3474
36V, 1A (ILED), 2MHz Step-Down LED Driver
VIN: 4V to 36V, VOUT(MAX) = 13.5V, IQ = 400:1 True Color PWM,
ISD < 16μA, TSSOP16E Package
LT3475
Dual 1.5A (ILED), 36V, 2MHz Step-Down LED Driver
VIN: 4V to 36V, VOUT(MAX) = 13.5V, IQ = 3,000:1 True Color PWM,
ISD < 1μA, TSSOP20E Package
LT3476
Quad Output 1.5A, 2MHz High Current LED Driver with
1,000:1 Dimming
VIN: 2.8V to 16V, VOUT(MAX) = 36V, IQ = 1,000:1 True Color PWM,
ISD < 10μA, 5mm × 7mm QFN10 Package
LT3478/LT3478-1
42V, 4.5A (ISW), 2.25MHz, LED Drivers with 3,000:1 True
Color PWM Dimming
VIN: 2.8V to 36V, VOUT(MAX) = 42V, IQ = 6.1mA, ISD < 3μA,
TSSOP16E Package
LT3486
Dual 1.3A, 2MHz High Current LED Driver
VIN: 2.5V to 24V, VOUT(MAX) = 36V, IQ = 1,000:1 True Color PWM,
ISD < 1μA, 5mm × 3mm DFN, TSSOP16E Packages
LT3491
Constant Current, 2.3MHz, High Efficiency White LED
Boost Regulator with Integrated Schottky Diode
VIN: 2.5V to 12V, VOUT(MAX) = 27V, IQ = 2.6mA, ISD < 8μA,
2mm × 2mm DFN6, SC70 Packages
LT3494/LT3494A
40V, 180mA/350mA Micropower Low Noise Boost
Converters with Output Disconnect
VIN: 2.3V to 16V, VOUT(MAX) = 40V, IQ = 65μA, ISD < 1μA,
3mm × 2mm DFN8 Package
LT3497
Dual 2.3MHz, Full Function LED Driver with Integrated
Schottkys and 250:1 True Color PWM Dimming
VIN: 2.5V to 10V, VOUT(MAX) = 32V, IQ = 6mA, ISD < 12μA,
3mm × 2mm DFN10 Package
LT3498
2.3MHz, 20mA LED Driver and OLED Driver with
Integrated Schottkys
VIN: 2.5V to 12V, VOUT(MAX) = 32V, IQ = 1.65mA, ISD < 9μA,
3mm × 2mm DFN12 Package
LT3591
Constant Current, 1MHz, High Efficiency White LED Boost VIN: 2.5V to 12V, VOUT(MAX) = 40V, IQ = 4mA, ISD < 9μA,
3mm × 2mm DFN8 Package
Regulator with Integrated Schottky Diode and 80:1 True
Color PWM Dimming
LT3595
16-Channel 48V, 2MHz Buck Mode LED Driver with
3000:1 True Color PWM Dimming
TM
TM
VIN: 4.5V to 50V, IQ = 3,000:1 True Color PWM, ISD < 3μA,
5mm × 9mm QFN56 Package
True Color PWM and ThinSOT are trademarks of Linear Technology Corporation.
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20
Linear Technology Corporation
LT 1108 REV A • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2008