Keysight M3202A PXIe Arbitrary Waveform Generator with Optional Real-Time Sequencing and FPGA Programming 1 GSa/s, 14 Bits, 2/4 Channels Data Sheet 02 | Keysight | M3202A PXIe Arbitrary Waveform Generator with Optional Real-Time Sequencing and FPGA Programming - Data Sheet Generate High-Precision, Complex, Real-World Signals The M3202A high-performance, high-bandwidth arbitrary waveform generator combines an advanced waveform generation system with embedded function generators and modulators (frequency/phase/amplitude) for broadband and IF signal generation. Performance meets simplicity thanks to easy-to-use programming libraries, real-time sequencing technology (Hard Virtual Instrumentation or HVI technology), and graphical FPGA programming technology. Features 1 GS/s, 14 bits, 2/4 ch, 400 MHz BW (800 MHz IQ) Embedded advanced arbitrary waveform generators (AWGs) –– Advanced triggering and marking (up to 8 reconfigurable I/Os) –– Waveform queue system with cycles, delays and prescalers Embedded high-precision function generators (FGs) –– Sinusoidal, triangular, square, DC, and more –– 45-bit frequency resolution (up to ~ 5.68 µHz) –– 24-bit phase resolution (up to ~ 21.5 µdeg) Embedded ultra-flexible amplitude and angle modulators High-quality output signal with low phase noise –– SFDR: ~ 54 dBc @160 MHz –– Average noise density: down to ~ –145 dBm/Hz Optional features –– Simultaneous amplitude and angle modulations Optional HW programming for high-performance applications –– Real-time sequencing (HVI technology) –– FPGA programming –– Xilinx Kintex-7 325T or 410T FPGA Up to 2 GB of onboard RAM (~ 1 Gsamples) Mechanical/interface –– 1 slot 3U (PXIe) –– Up to 1.6 GB/s transfer BW with P2P capabilities (PCIe Gen 2) –– Independent direct memory access (DMA) channels for fast and efficient data transfer Applications Quantum computing, 5 G research Manufacturing in wireless devices, automated test equipment (ATE) MIMO, beam forming and other multi-channel coherent signal generation General purpose, RF/arbitrary waveform generation R&D/scientific research equipment, aerospace & defense (A/D) 03 | Keysight | M3202A PXIe Arbitrary Waveform Generator with Optional Real-Time Sequencing and FPGA Programming - Data Sheet Programming Technology and Software Tools Software programming –– Easy-to-use native programming libraries for most common languages: C, C++, Visual Studio, LabVIEW, MATLAB, Python, and more Hardware programming (optional) –– Real-time sequencing (Hard Virtual Instrumentation or HVI technology) –– Graphical flowchart-style M3601A design environment (-HV1 option required on HW) –– Ultra-fast, fully-parallelized, hard real-time execution –– Ultra-fast, time-deterministic decision-making –– Off-the-shelf inter-module synchronization & data exchange –– FPGA programming –– Graphical M3602A FPGA design environment (-FP1 option required on HW) –– No FPGA know-how required –– Include from high-level to low-level design elements: off-the-shelf DSP blocks, MATLAB/ Simulink designs, Xilinx CORE Generator IP cores, Xilinx VIVADO/ISE projects, VHDL or Verilog code –– Ultra-fast, one-click compiling and on-the-fly programming No programming –– Ready-to-use SD1 SPF (software front panels) PXIe Arbitrary Waveform Generators, Digitizers and Combination Modules Outputs (AWGs) Inputs (Digitizers) Product Type Speed (MSa/s) Bits Ch BW (MHz) M3202A AWG 1000 14 2/4 DC-400 M3201A AWG 500 16 2/4 DC-200 M3102A Speed (MSa/s) Bits Ch BW (MHz) Digitizer 500 14 2/4 DC-200 M3100A Digitizer 100 14 4/8 DC-100 M3302A Combo 500 16 2 DC-200 500 14 2 DC-200 M3300A Combo 500 16 2/4 DC-200 100 14 4/8 DC-100 04 | Keysight | M3202A PXIe Arbitrary Waveform Generator with Optional Real-Time Sequencing and FPGA Programming - Data Sheet Functional Block Diagram Channel 1 Channel x Channel 1 output Frequency Phase Function generator (FGx) Amplitude Offset Angle modulator FM Dual arbitrary waveform generator (AWGx) Amplitude modulator AM DAC LPF Channel x output Quadrature modulator IQ Channel n Odd channels only Even channels only Dual modulation option only Channel n output Figure 1. M3201A output functional block diagram, all channels have identical output structure Ordering Information 1 Product Description M3202A PXI arbitrary waveform generator: 1 GSa/s, 14 Bits Options Description M3202A-CH2 / -CH4 Two channels 2 / four channels M3202A-CLV / -CLF Variable sampling clock 2 / fixed sampling clock, low jitter M3202A-DM1 Dual modulation capability (amplitude and angle simultaneously) M3202A-M01 / -M12 / -M20 Memory 16 MB, 8 MSamples 2 / 128 MB, 60 MSamples / 2 GB, 1 GSamples HW programming options Description M3202A-HVI Enabled HVI programming, requires an HVI design environment license (M3601A) M3202A-FP1 Enabled FPGA programming, requires -K32 or -K41 option and an FPGA design environment license (M3602A) M3202A-K32 / -K41 FPGA, Xilinx 7K325T / 7K410T, required for -FP1 option only (needs memory option -M20) Related software Description M3601A HVI design environment M3602A FPGA design environment 1. All options must be selected at time of purchase and are not upgradable 2. These options represent the standard configuration 05 | Keysight | M3202A PXIe Arbitrary Waveform Generator with Optional Real-Time Sequencing and FPGA Programming - Data Sheet Technical Specifications and Characteristics General characteristics M3202A-CH2 Parameter Min Typ M3202A-CH4 Max Min Typ Max Units Comments Inputs and outputs Channels (single-ended mode) 2 4 Out Channels (differential mode) 1 2 Out clock 1 1 1 Out Reference clock 2 1 1 In Triggers/markers 1, 3 1 1 In/out Reconfigurable Triggers/markers 2, 3 8 8 In/out Reconfigurable Reference Differential uses 2 channels Output channels overview Sampling rate 4 400 Voltage resolution Output frequency 400 400 DC 14 DC Real-time BW Output voltage 1000 14 400 –1.5 1000 Bits 400 400 1.5 –1.5 MSa/s MHz MHz 1.5 Volts Built-in functionalities Function generators 2 4 1 per channel Dual AWGs 2 4 1 per channel IQ modulators 2 4 1 per channel Frequency modulators 2 4 1 per channel Phase modulators 2 4 1 per channel Amplitude modulators 2 4 1 per channel DC offset modulators 2 4 1 per channel Onboard memory RAM memory 1. 2. 3. 4. 16 2048 At front panel At backplane Markers available from firmware version v3.0 or later (-CLV) option: 400 MSa/s to 1 GSa/s; (-CLF) option: fixed 1 GSa/s 16 2048 MBytes 06 | Keysight | M3202A PXIe Arbitrary Waveform Generator with Optional Real-Time Sequencing and FPGA Programming - Data Sheet I/O specifications M3202A-CH2 Parameter Min Typ M3202A-CH4 Max Min Typ Max Units Comments Output channels Sampling rate 1 400 1000 400 1000 MSa/s Output frequency DC 400 DC 400 MHz Limited by a reconstruction filter Output voltage –1.5 1.5 –1.5 1.5 Vp On a 50 Ω load Source impedance 50 50 Ω Reference clock output Frequency 10 or 100 10 or 100 MHz Generated from the internal clock, user selectable Voltage 800 800 mVpp On a 50 Ω load Power 2 2 dBm On a 50 Ω load Source impedance 50 50 Ω AC coupled External I/O trigger/marker VIH 2 5 2 5 V VIL 0 0.8 0 0.8 V VOH 2.4 3.3 2.4 3.3 V On a high Z load VOL 0 0.5 0 0.5 V On a high Z load Input impedance 10 10 KΩ Source impedance TTL TTL – Speed 100 100 MHz 1. (-CLV) option: 400 MSa/s to 1GSa/s; (-CLF) option: fixed 1 GSa/s 07 | Keysight | M3202A PXIe Arbitrary Waveform Generator with Optional Real-Time Sequencing and FPGA Programming - Data Sheet Function generators (FGs) specifications M3202A-CH2 Parameter Min Typ M3202A-CH4 Max Min Typ Max Units Comments General specifications Function generators 2 4 – 1 per channel Waveform types 4 4 – Sinusoidal, triangular, square and DC Frequency range 0 400 0 400 MHz Frequency resolution 45 45 Bits Frequency resolution 11.4 11.4 µHz Phase range 0 360 0 360 Deg Phase resolution 24 24 Bits Phase resolution 21.5 21.5 µdeg Frequency change rate 100 100 MChanges/s With HVI technology Frequency modulation rate 1000 1000 MSamples/s With AWGs and angle modulators Phase change rate 100 100 MChanges/s With HVI technology Phase modulation rate 1000 1000 MSamples/s With AWGs and angle modulators Speed performance Amplitude and offset specifications M3202A-CH2 Parameter Min Typ M3202A-CH4 Max Min 1.5 –1.5 Typ Max Units Comments 1.5 Vp Amplitude + offset values General specifications Amplitude / offset range –1.5 Amplitude / offset resolution 14 14 Bits Amplitude / offset resolution 122.1 122.1 µV Amplitude / offset change rate 1000 1000 MChanges/s With HVI technology Amplitude / offset modulation rate 1000 1000 MSamples/s With AWGs and amplitude modulators Speed performance 08 | Keysight | M3202A PXIe Arbitrary Waveform Generator with Optional Real-Time Sequencing and FPGA Programming - Data Sheet Arbitrary waveform generators (AWGs) specifications M3202A-CH2 Parameter Min Typ Max M3202A-CH4 Min Typ Max Units Comments General specifications Dual AWGs 2 Aggregated speed (16 bits) 4 4000 Aggregated speed (32 bits) 2000 Waveform multiple 10 16-bit waveform length 30 32-bit waveform length 20 1 dual AWG per output channel 4000 MSa/s For all onboard waveforms combined 2000 MSa/s For all onboard waveforms combined Samples Waveform length must be a multiple of this value 10 957M 30 478M 20 Waveform length efficiency 93.5 93.5 Trigger Selec. Selec. 957M Samples Maximum depends on onboard RAM 478M Samples Maximum depends on onboard RAM % Effic. = waveform size / waveform size in RAM External trigger (input connector, backplane triggers), software trigger AWG specifications (16-bit single waveform) Speed 1000 Resolution AWG destination 1000 16 16 Selec. Selec. MSa/s Per AWG Bits Amplitude, offset, frequency or phase AWG specifications (16-bit dual waveform) Speed (waveform A) 1000 1000 MSa/s Per AWG Speed (waveform B) 1000 1000 MSa/s Per AWG Resolution (waveform A) 16 Resolution (waveform B) 16 Bits Bits 16 16 AWG destination (waveform A) Selec. Selec. Amplitude, offset or I AWG destination (waveform B) Selec. Selec. Frequency, phase or Q AWG specifications (32-bit single waveform) Speed Resolution AWG destination 100 100 32 32 Selec. Selec. MSa/s Per AWG, minimum prescaler: 1 Bits Amplitude, offset, frequency or phase AWG specifications (32-bit dual waveform) Speed (waveform A) 100 Speed (waveform B) 100 100 MSa/s Per AWG, minimum prescaler: 1 100 MSa/s Per AWG, minimum prescaler: 1 Resolution (waveform A) 32 32 Bits Resolution (waveform B) 32 32 Bits AWG destination (waveform A) Selec. Selec. Amplitude or offset AWG destination (waveform B) Selec. Selec. Frequency or phase 09 | Keysight | M3202A PXIe Arbitrary Waveform Generator with Optional Real-Time Sequencing and FPGA Programming - Data Sheet Angle modulators specifications M3202A-CH2 Parameter Min Typ M3202A-CH4 Max Min Typ Max Units Comments General specifications Frequency modulators 2 4 1 per output channel Phase modulators 2 4 1 per output channel Carrier signal source Modulating signal source FGs FGs Table 3 on page 7 AWGs AWGs Table 5 on page 8 Frequency modulators (16-bit modulating waveform) Deviation –Dev. gain Modulating signal resolution +Dev. gain –Dev. gain 16 Modulating signal BW 0 Deviation gain 0 Deviation gain resolution +Dev. gain 16 500 0 400 0 16 MHz Bits AWG waveform 500 MHz AWG Nyquist limit 400 MHz 16 Bits Frequency modulators (32-bit modulating waveform) Deviation –Dev. gain Modulating signal resolution +Dev. gain –Dev. gain 32 +Dev. gain 32 MHz Bits AWG waveform AWG Nyquist limit Modulating signal BW 0 100 0 100 MHz Deviation gain 0 400 0 400 MHz Deviation gain resolution 16 16 Bits Phase modulators (16-bit modulating waveform) Deviation –Dev. gain Modulating signal resolution +Dev. gain –Dev. gain 16 +Dev. gain 16 Deg Bits AWG waveform AWG Nyquist limit Modulating signal BW 0 500 0 500 MHz Deviation gain 0 180 0 180 Deg Deviation gain resolution 16 16 Bits ~ 5.5 mdeg Phase modulators (32-bit modulating waveform) Deviation –Dev. gain Modulating signal resolution +Dev. gain –Dev. gain 16 +Dev. gain 16 Deg Bits AWG waveform is truncated AWG Nyquist limit Modulating signal BW 0 100 0 100 MHz Deviation gain 0 180 0 180 Deg Deviation gain resolution 16 16 Bits ~ 5.5 mdeg 10 | Keysight | M3202A PXIe Arbitrary Waveform Generator with Optional Real-Time Sequencing and FPGA Programming - Data Sheet Amplitude modulators specifications M3202A-CH2 Parameter Min Typ M3202A-CH4 Max Min Typ Max Units Comments General specifications Amplitude modulators 2 4 1 per output channel Offset modulators 2 4 1 per output channel Carrier signal source Modulating signal source FGs FGs Table 3 on page 7 AWGs AWGs Table 5 on page 8 Amplitude & offset modulators (16-bit modulating waveform) Deviation -Dev. gain Modulating signal resolution +Dev. gain -Dev. gain 16 Modulating signal BW 0 Deviation gain 0 Deviation gain resolution +Dev. gain 16 500 0 1.5 0 14 Vp Bits AWG waveform 500 MHz AWG Nyquist limit 1.5 Vp 14 Bits Limited by the output DAC Amplitude & offset modulators (32-bit modulating waveform) Deviation -Dev. gain Modulating signal resolution +Dev. gain -Dev. gain 16 +Dev. gain 16 Vp Bits AWG waveform is truncated AWG Nyquist limit Modulating signal BW 0 100 0 100 MHz Deviation gain 0 1.5 0 1.5 Vp Deviation gain resolution 14 14 Bits Limited by the output DAC 11 | Keysight | M3202A PXIe Arbitrary Waveform Generator with Optional Real-Time Sequencing and FPGA Programming - Data Sheet IQ modulators specifications M3202A-CH2 Parameter Min Typ M3202A-CH4 Max Min Typ Max Units Comments General specifications IQ modulators Carrier signal source Modulating signal source 2 4 FGs FGs AWGs 1 per output channel Table 3 on page 7 AWGs Table 5 on page 8 Amplitude deviation –1.5 1.5 –1.5 1.5 Vp Phase deviation –180 180 –180 180 Deg 500 0 I modulating signal resolution 16 I modulating signal BW 0 Q modulating signal resolution 16 16 Q modulating signal BW 0 500 16 500 0 500 Bits AWG waveform MHz AWG Nyquist limit Bits AWG waveform MHz AWG Nyquist limit Clock system specifications M3202A-CH2 Parameter Min Typ M3202A-CH4 Max Min 1000 >400 Typ Max Units Comments 1000 MHz (-CLV) option: 400 MSa/s to 1GSa/s; (-CLF) option: fixed 1 GSa/s General specifications Clock frequency 1 1. >400 (-CLV) option: 400 MSa/s to 1GSa/s; (-CLF) option: fixed 1 GSa/s 12 | Keysight | M3202A PXIe Arbitrary Waveform Generator with Optional Real-Time Sequencing and FPGA Programming - Data Sheet AC performance M3202A-CH2 Parameter Min Typ M3202A-CH4 Max Min Typ Max Units Comments General characteristics Analog output jitter <2 <2 ps RMS (cycle-to-cycle) AWG trigger to output jitter <2 <2 ps RMS (cycle-to-cycle) for any trigger referenced to the chassis clock; independent of input trigger jitter if input jitter < 4nS peak-to-peak Trigger resolution 10 10 ns Channel-to-channel skew <20 <20 ps Between ch 0 & ch 1, and ch 2 & ch 3 <50 <50 ps Between any channel <150 <150 ps Between modules, chassis dependent 2 Clock output jitter <2 <2 ps RMS (cycle-to-cycle) Clock accuracy and stability 100 100 ppm PXIe, cPXIe versions; chassis dependent1 AC characteristics Spurious-free dynamic range (SFDR) Pout = 0 dBm, measured from DC to max frequency fout = 10 MHz 68 68 dBc fout = 40 MHz 66 66 dBc fout = 80 MHz 62 62 dBc fout = 120 MHz 58 58 dBc fout = 160 MHz 54 54 dBc fout = 200 MHz 53 53 dBc fout = 320 MHz 55 55 dBc fout = 390 MHz 58 58 dBc fout = 10 MHz <–105 <–105 dB fout = 40 MHz –85 –85 dB fout = 80 MHz –80 –80 dB fout = 120 MHz –89 –89 dB fout = 160 MHz –76 –76 dB fout = 200 MHz –86 –86 dB fout = 320 MHz –83 –83 dB fout = 10 MHz <–105 <–105 dB fout = 40 MHz –89 –89 dB fout = 80 MHz –81 –81 dB fout = 120 MHz –103 –103 dB fout = 160 MHz –95 –95 dB fout = 200 MHz –102 –102 dB fout = 320 MHz –97 –97 dB Crosstalk (adjacent channels) Crosstalk (non-adjacent channels) continued on next page 13 | Keysight | M3202A PXIe Arbitrary Waveform Generator with Optional Real-Time Sequencing and FPGA Programming - Data Sheet AC performance (continued) M3202A-CH2 Parameter Min Typ M3202A-CH4 Max Min Typ Max Units Comments AC characteristics Phase noise (SSB) offset = 1 kHz <–127 <–127 dBc/Hz offset = 10 kHz <–133 <–133 dBc/Hz offset = 100 kHz <–138 <–138 dBc/Hz <–145 <–145 dBm/Hz Average noise power density 1. This value corresponds to a chassis that fulfils the PXI Express specifications. This value can be improved with an external chassis clock or a System Timing Module. 2. This value corresponds to a M9005A PXIe chassis. 14 | Keysight | M3202A PXIe Arbitrary Waveform Generator with Optional Real-Time Sequencing and FPGA Programming - Data Sheet AC performance, typical Figure 2. Single-tone spectrum @ fout = 40 MHz Figure 4. Single-tone spectrum @ fout = 160 MHz Figure 3. Single-tone spectrum @ fout = 320 MHz Figure 5. Single-tone spectrum @ fout = 400 MHz 15 | Keysight | M3202A PXIe Arbitrary Waveform Generator with Optional Real-Time Sequencing and FPGA Programming - Data Sheet System Specifications Environmental specifications (PXI Express) M3202A-CH2 Parameter Min Typ M3202A-CH4 Max Min Typ Max Units Comments Slot PXI Express (CompactPCI Express compatible) – Automatic gen negotiation, chassis dependent System bus Slots PCI Express type 1 Gen 1 PCI Express link 1 Gen 2 Gen 1 Gen 2 1 4 1 4 Lanes Automatic lane negotiation, chassis dependent PCI Express speed 400 1600 400 1600 MBytes/s Depends on # of lanes, chassis, congestion, and more Sustainable throughput 200 800 200 800 MPoints/s Depends on # of lanes, chassis, congestion, and more Power and temperature 3.3 V PXIe power supply 1.5 1.5 A ~5W 12 V PXIe power supply 2 2 A ~ 24 W Environmental 1 Temperature range Operating Non-operating 0 to +45°C (10,000 feet) -40 to +70 °C (up to 15,000 feet) Max operative altitude 4000 m (10,000 feet) Operating Humidity range (%RH) 10 to 95% at 40 °C Non-operating Humidity range (%RH): 5 to 95 5 to 95% Calibration interval 1 year EMC Complies with European EMC Directive – IEC/EN 61326-1 – CISPR Pub 11 Group 1, class A This ISM device is in compliance with Canadian ICES-001 Cet appareil ISM est conforme à la norme NMB-001 du Canada. This ISM device is in compliance with Australian and New Zealand RCM This ISM device is in compliance with South Korea EMC KCC 1. Samples of this product have been type tested in accordance with the Keysight Environmental Test Manual and verified to be robust against the environmental stresses of Storage, Transportation and End-use; those stresses include but are not limited to temperature, humidity, shock, vibration, altitude and power line conditions. Test Methods are aligned with IEC 60068-2 and levels are similar to MIL-PRF-28800F Class 3. 16 | Keysight | M3202A PXIe Arbitrary Waveform Generator with Optional Real-Time Sequencing and FPGA Programming - Data Sheet Evolving Since 1939 Our unique combination of hardware, software, services, and people can help you reach your next breakthrough. We are unlocking the future of technology. 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DEKRA Certified ISO 9001:2015 Quality Management System This information is subject to change without notice. © Keysight Technologies, 2017 - 2018 Published in USA, February 20, 2018 5992-1798EN www.keysight.com