TI1 LM2941CT/LF03 Lm2941/lm2941c 1a low dropout adjustable regulator Datasheet

LM2941, LM2941C
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SNVS770G – JUNE 1999 – REVISED APRIL 2013
LM2941/LM2941C 1A Low Dropout Adjustable Regulator
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FEATURES
DESCRIPTION
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The LM2941 positive voltage regulator features the
ability to source 1A of output current with a typical
dropout voltage of 0.5V and a maximum of 1V over
the entire temperature range. Furthermore, a
quiescent current reduction circuit has been included
which reduces the ground pin current when the
differential between the input voltage and the output
voltage exceeds approximately 3V. The quiescent
current with 1A of output current and an input-output
differential of 5V is therefore only 30mA. Higher
quiescent currents only exist when the regulator is in
the dropout mode (VIN − VOUT ≤ 3V).
1
2
WSON Space Saving Package
Output Voltage Adjustable From 5V to 20V
Dropout Voltage Typically 0.5V @ IO = 1A
Output Current in Excess of 1A
Trimmed Reference Voltage
Reverse Battery Protection
Internal Short Circuit Current Limit
Mirror Image Insertion Protection
P+ Product Enhancement Tested
TTL, CMOS Compatible ON/OFF Switch
Designed also for vehicular applications, the LM2941
and all regulated circuitry are protected from reverse
battery installations or two-battery jumps. During line
transients, such as load dump when the input voltage
can momentarily exceed the specified maximum
operating voltage, the regulator will automatically shut
down to protect both the internal circuits and the load.
Familiar regulator features such as short circuit and
thermal overload protection are also provided.
Connection Diagrams
TO-220 Plastic Package
8-Lead WSON Surface Mount Package
ON/OFF
1
GND
2
8
ADJ
7
GND
GND*
Figure 1. Top View
See Package Number KC
INPUT
3
6
N/C
N/C
4
5
OUTPUT
TO-263 Surface-Mount Package
* TIE TO GND OR LEAVE FLOATING
Figure 3. Top View
See Package Number NGN
Figure 2. See Package Number KTT
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1999–2013, Texas Instruments Incorporated
LM2941, LM2941C
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1) (2)
Input Voltage (Survival Voltage, ≤ 100ms)
Internal Power Dissipation
LM2941T, LM2941S, LM2941LD
60V
LM2941CT, LM2941CS
45V
(3)
Internally Limited
Maximum Junction Temperature
150°C
−65°C ≤ TJ ≤ +150°C
Storage Temperature Range
Soldering Temperature
ESD Rating
(1)
(2)
(3)
(4)
(5)
(4)
TO-220 (T), Wave
260°C, 10s
TO-263 (S)
235°C, 30s
WSON-8 (LD)
235°C, 30s
(5)
±2 kV
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for
which the device is intended to be functional, but device parameter specifications may not be ensured under these conditions. For
ensured specifications and test conditions, see the Electrical Characteristics.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
The maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (TJ(max) − TA)/θJA. If this dissipation is exceeded, the die temperature will rise above 150°C and the LM2941 will go
into thermal shutdown. If the TO-263 package is used, the thermal resistance can be reduced by increasing the P.C. board copper area
thermally connected to the package: Using 0.5 square inches of copper area, θJA is 50°C/W; with 1 square inch of copper area, θJA is
37°C/W; and with 1.6 or more square inches of copper area, θJA is 32°C/W. Thermal performance for the WSON package was obtained
using a JESD51-7 board with six vias, using no airflow and an ambient temperature of 22°C. The value θJA for the WSON package is
specifically dependent on PCB trace area, trace material, and the number of layers and thermal vias. For improved thermal resistance
and power dissipation for the WSON package, refer to Application Note AN-1187 (literature number SNOA401). It is recommended that
6 vias be placed under the center pad to improve thermal performance.
Refer to JEDEC J-STD-020C for surface mount device (SMD) package reflow profiles and conditions. Unless otherwise stated, the
temperature and time are for Sn-Pb (STD) only.
The Human Body Model (HBM) is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin. Test method is per
JESD22–A114.
Operating Ratings
Maximum Input Voltage
26V
−40°C ≤ TJ ≤ 125°C
LM2941T
0°C ≤ TJ ≤ 125°C
LM2941CT
Temperature Range
−40°C ≤ TJ ≤ 125°C
LM2941S
LM2941CS
0°C ≤ TJ ≤ 125°C
LM2941LD
−40°C ≤ TJ ≤ 125°C
Electrical Characteristics—LM2941T, LM2941S, LM2941LD
5V ≤ VO ≤ 20V, VIN = VO + 5V, CO = 22μF, unless otherwise specified. Specifications in standard typeface apply for TJ = 25°C,
while those in boldface type apply over the full Operating Temperature Range.
Parameter
Conditions
(1)
Typ
LM2941T
LM2941S
LM2941LD
Limit
Units
(Limits)
1.237/1.211
V(min)
1.313/1.339
V(max)
4
10/10
mV/V(max)
7
10/10
mV/V(max)
Reference Voltage
5mA ≤ IO ≤ 1A
Line Regulation
VO + 2V ≤ VIN ≤ 26V, IO = 5mA
Load Regulation
50mA ≤ IO ≤ 1A
Output Impedance
100 mADC and 20 mArms
fO = 120Hz
7
VO + 2V ≤ VIN < 26V, IO = 5mA
10
15/20
mA(max)
VIN = VO + 5V, IO = 1A
30
45/60
mA(max)
Quiescent Current
(1)
2
1.275
mΩ/V
The output voltage range is 5V to 20V and is determined by the two external resistors, R1 and R2. See Typical Application Circuit.
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Electrical Characteristics—LM2941T, LM2941S, LM2941LD (continued)
5V ≤ VO ≤ 20V, VIN = VO + 5V, CO = 22μF, unless otherwise specified. Specifications in standard typeface apply for TJ = 25°C,
while those in boldface type apply over the full Operating Temperature Range.
Parameter
Conditions
Typ
RMS Output Noise, % of VOUT
10Hz–100kHz
IO = 5mA
0.003
Ripple Rejection
fO = 120Hz, 1 Vrms, IL = 100mA
0.005
Long Term Stability
LM2941T
LM2941S
LM2941LD
Limit
Units
(Limits)
%
0.02/0.04
0.4
%/V(max)
%/1000 Hr
IO = 1A
0.5
0.8/1.0
V(max)
IO = 100mA
110
200/200
mV(max)
Short Circuit Current
VIN Max = 26V (2)
1.9
1.6
A(min)
Maximum Line Transient
VO Max 1V Above Nominal VO
RO = 100, t ≤ 100ms
75
60/60
V(min)
31
26/26
VDC
Dropout Voltage
Maximum Operational Input Voltage
Reverse Polarity
DC Input Voltage
RO = 100, VO ≥ −0.6V
−30
−15/−15
V(min)
Reverse Polarity
Transient Input Voltage
t ≤ 100ms, RO = 100Ω
−75
−50/−50
V(min)
ON/OFF Threshold
Voltage ON
IO ≤ 1A
1.30
0.80/0.80
V(max)
ON/OFF Threshold
Voltage OFF
IO ≤ 1A
1.30
2.00/2.00
V(min)
ON/OFF Threshold
Current
VON/OFF = 2.0V, IO ≤ 1A
50
100/300
μA(max)
(2)
Output current capability will decrease with increasing temperature, but will not go below 1A at the maximum specified temperatures.
Electrical Characteristics—LM2941CT, LM2941CS
5V ≤ VO ≤ 20V, VIN = VO + 5V, CO = 22μF, unless otherwise specified. Specifications in standard typeface apply for TJ = 25°C,
while those in boldface type apply over the full Operating Temperature Range.
Parameter
Conditions
(2)
Typ
Limit
(1)
Units
(Limits)
1.237/1.211
V(min)
1.313/1.339
V(max)
4
10
mV/V(max)
7
10
mV/V(max)
Reference Voltage
5mA ≤ IO ≤ 1A
Line Regulation
VO + 2V ≤ VIN ≤ 26V, IO = 5mA
Load Regulation
50mA ≤ IO ≤ 1A
Output Impedance
100 mADC and 20 mArms
fO = 120Hz
7
VO + 2V ≤ VIN < 26V, IO = 5mA
10
15
mA(max)
VIN = VO + 5V, IO = 1A
30
45/60
mA(max)
Quiescent Current
1.275
RMS Output Noise,
% of VOUT
10Hz–100kHz
IO = 5mA
0.003
Ripple Rejection
fO = 120Hz, 1 Vrms, IL = 100mA
0.005
Long Term Stability
Dropout Voltage
Short Circuit Current
(1)
(2)
(3)
mΩ/V
%
0.02
0.4
%/V(max)
%/1000 Hr
IO = 1A
0.5
0.8/1.0
V(max)
IO = 100mA
110
200/200
mV(max)
1.9
1.6
A(min)
VIN Max = 26V
(3)
All limits specified at room temperature (standard typeface) and at temperature extremes (boldface type). All room temperature limits are
100% production tested. All limits at temperature extremes are ensured via correlation using standard Statistical Quality Control (SQC)
methods.
The output voltage range is 5V to 20V and is determined by the two external resistors, R1 and R2. See Typical Application Circuit.
Output current capability will decrease with increasing temperature, but will not go below 1A at the maximum specified temperatures.
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Electrical Characteristics—LM2941CT, LM2941CS (continued)
5V ≤ VO ≤ 20V, VIN = VO + 5V, CO = 22μF, unless otherwise specified. Specifications in standard typeface apply for TJ = 25°C,
while those in boldface type apply over the full Operating Temperature Range.
Parameter
Maximum Line
Transient
Conditions
Typ
VO Max 1V Above Nominal VO
RO = 100Ω, T ≤ 100ms
Maximum Operational
Input Voltage
Limit
(1)
Units
(Limits)
55
45
V(min)
31
26
VDC
Reverse Polarity
DC Input Voltage
RO = 100Ω, VO ≥ −0.6V
−30
−15
V(min)
Reverse Polarity
Transient Input Voltage
T ≤ 100ms, RO = 100Ω
−55
−45
V(min)
ON/OFF Threshold
Voltage ON
IO ≤ 1A
1.30
0.80
V(max)
ON/OFF Threshold
Voltage OFF
IO ≤ 1A
1.30
2.00
V(min)
ON/OFF Threshold
Current
VON/OFF = 2.0V, IO ≤ 1A
50
100
μA(max)
5-Lead TO-220
1
°C/W
5-Lead TO-263
1
°C/W
8-Lead WSON
5.3
°C/W
5-Lead TO-220
53
°C/W
5-Lead TO-263 (See TO-263 Mounting)
73
°C/W
8-Lead WSON (See WSON Mounting)
35
°C/W
Thermal Performance
Thermal Resistance
Junction-to-Case, θJC
Thermal Resistance
Junction-to-Ambient, θJA (1)
(1)
4
The maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (TJ(max) − TA)/θJA. If this dissipation is exceeded, the die temperature will rise above 150°C and the LM2941 will go
into thermal shutdown. If the TO-263 package is used, the thermal resistance can be reduced by increasing the P.C. board copper area
thermally connected to the package: Using 0.5 square inches of copper area, θJA is 50°C/W; with 1 square inch of copper area, θJA is
37°C/W; and with 1.6 or more square inches of copper area, θJA is 32°C/W. Thermal performance for the WSON package was obtained
using a JESD51-7 board with six vias, using no airflow and an ambient temperature of 22°C. The value θJA for the WSON package is
specifically dependent on PCB trace area, trace material, and the number of layers and thermal vias. For improved thermal resistance
and power dissipation for the WSON package, refer to Application Note AN-1187 (literature number SNOA401). It is recommended that
6 vias be placed under the center pad to improve thermal performance.
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Typical Performance Characteristics
Dropout Voltage
Dropout Voltage vs. Temperature
Figure 4.
Figure 5.
Output Voltage
Quiescent Current vs. Temperature
Figure .
Figure 6.
Quiescent Current
Quiescent Current
Figure 7.
Figure 8.
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Typical Performance Characteristics (continued)
6
Line Transient Response
Load Transient Response
Figure 9.
Figure 10.
Ripple Rejection
Output Impedance
Figure 11.
Figure 12.
Low Voltage Behavior
Low Voltage Behavior
Figure 13.
Figure 14.
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Typical Performance Characteristics (continued)
Output Capacitor ESR
Output at Voltage Extremes
Figure 15.
Figure 16.
Output at Voltage Extremes
Peak Output Current
Figure 17.
Figure 18.
Maximum Power Dissipation (TO-220)
Maximum Power Dissipation (TO-263)
Figure 19.
Figure 20.
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Definition of Terms
Dropout Voltage: The input-voltage differential at which the circuit ceases to regulate against further reduction
in input voltage. Measured when the output voltage has dropped 100mV from the nominal value obtained at
(VOUT + 5V) input, dropout voltage is dependent upon load current and junction temperature.
Input Voltage: The DC voltage applied to the input terminals with respect to ground.
Input-Output Differential: The voltage difference between the unregulated input voltage and the regulated
output voltage for which the regulator will operate.
Line Regulation: The change in output voltage for a change in the input voltage. The measurement is made
under conditions of low dissipation or by using pulse techniques such that the average chip temperature is not
significantly affected.
Load Regulation: The change in output voltage for a change in load current at constant chip temperature.
Long Term Stability: Output voltage stability under accelerated life-test conditions after 1000 hours with
maximum rated voltage and junction temperature.
Output Noise Voltage: The rms AC voltage at the output, with constant load and no input ripple, measured over
a specified frequency range.
Quiescent Current: That part of the positive input current that does not contribute to the positive load current.
The regulator ground lead current.
Ripple Rejection: The ratio of the peak-to-peak input ripple voltage to the peak-to-peak output ripple voltage.
Temperature Stability of VO: The percentage change in output voltage for a thermal variation from room
temperature to either temperature extreme.
APPLICATION HINTS
Output Capacitor
A Tantalum capacitor with a minimum capacitance value of 22 μF, and ESR in the range of 0.01Ω to 5Ω, is
required at the output pin for loop stability. It must be located less than 1 cm from the device. There is no
limitation on any additional capacitance.
Alternately, a high quality X5R/X7R 22 μF ceramic capacitor may be used for the output capacitor only if an
appropriate value of series resistance is added to simulate the ESR requirement. The ceramic capacitor selection
must include an appropriate voltage de-rating of the capacitance value due to the applied output voltage. The
series resistor (for ESR simulation) should be in the range of 0.1Ω to 1.0Ω.
Setting the Output Voltage
The output voltage range is 5V to 20V and is set by the two external resistors, R1 and R2. See the Typical
Applications. The output voltage is given by the formula:
VOUT = VREF x ((R1+R2) / R1)
(1)
where VREF is typically 1.275V.
Using 1.00 kΩ for R1 will ensure that the bias current error of the adjust pin will be negligible. Using a R1 value
higher than 10 kΩ may cause the output voltage to shift across temperature due to variations in the adjust pin
bias current.
Calculating the upper resistor (R2) value of the pair when the lower resistor (R1) value is known is accomplished
with the following formula:
R2 = R1 x ((VOUT / VREF) - 1)
(2)
The resistors used for R1 and R2 should be high quality, tight tolerance, and with matching temperature
coefficients. It is important to remember that, although the value of VREF is ensured, the final value of VOUT is not.
The use of low quality resistors for R1 and R2 can easily produce a VOUT value that is unacceptable.
8
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ON/OFF
The ON/OFF pin has no internal pull-up or pull-down to establish a default condition and, as a result, this pin
must be terminated externally, either actively or passively.
The ON/OFF pin requires a low level to enable the output, and a high level to disable the output. To ensure
reliable operation, the ON/OFF pin voltage must rise above the maximum ON/OFF(OFF) voltage threshold (2.00V)
to disable the output, and must fall below the minimum ON/OFF(ON) voltage threshold (0.80V) to enable the
output. If the ON/OFF function is not needed this pin can be connected directly to Ground.
If the ON/OFF pin is being pulled to a high state through a series resistor, an allowance must be made for the
ON/OFF pin current that will cause a voltage drop across the pull-up resistor.
Thermal Overload Protection
The LM2941 incorporates a linear form of thermal protection that limits the junction temperature (TJ) to typically
155°C.
Should the LM2941 see a fault condition that results in excessive power dissipation and the junction temperature
approaches 155°C, the device will respond by reducing the output current (which reduces the power dissipation)
to hold the junction temperature at 155°C.
Thermal Overload protection is not an ensured operating condition. Operating at, or near to, the Thermal
Overload condition for any extended period of time is not encouraged, or recommended, as this may shorten the
lifetime of the device.
Power Dissipation
Consideration should be given to the maximum power dissipation (PD(MAX)) which is limited by the maximum
operating junction temperature (TJ(MAX)) of 125°C, the maximum operating ambient temperature (TA(MAX)) of the
application, and the thermal resistance (θJA) of the package. Under all possible conditions, the junction
temperature (TJ) must be within the range specified in the Operating Ratings. The total power dissipation of the
device is given by:
PD = ( (VIN − VOUT) x IOUT) + (VIN x IGND)
(3)
where IGND is the operating ground pin current of the device (specified under Electrical Characteristics).
The maximum allowable junction temperature rise (ΔTJ) depends on the maximum expected ambient
temperature (TA(MAX)) of the application, and the maximum allowable junction temperature (TJ(MAX)):
ΔTJ = TJ(MAX) − TA(MAX)
(4)
The maximum allowable value for junction to ambient Thermal Resistance, θJA, required to keep the junction
temperature, TJ, from exceeding maximum allowed can be calculated using the formula:
θJA = ΔTJ / PD(MAX)
(5)
The maximum allowable power dissipation, PD(MAX), required allowed for a specific ambient temperature can be
calculated using the formula:
PD(MAX) = ΔTJ / θJA
(6)
Additional information for thermal performance of surface mount packages can be found in AN-1520: A Guide to
Board Layout for Best Thermal Resistance for Exposed Packages (literature number SNVA183), AN-1187:
Leadless Leadframe Package (LLP) (literature number SNOA401), and AN-2020: Thermal Design By Insight, Not
Hindsight (literature number SNVA419).
TO-263 Mounting
The thermal dissipation of the TO-263 package is directly related to the printed circuit board construction and the
amount of additional copper area connected to the TAB.
The TAB on the bottom of the TO-263 package is connected to the die substrate via a conductive die attach
adhesive, and to device pin 3. As such, it is strongly recommend that the TAB area be connected to copper area
directly under the TAB that is extended into the ground plane via multiple thermal vias. Alternately, but not
recommended, the TAB may be left floating (i.e. no direct electrical connection). The TAB must not be connected
to any potential other than ground.
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For the LM2941S in the KTT TO-263 package, the junction-to-case thermal rating, θJC, is 1°C/W, where the
CASE is defined as the bottom of the package at the center of the TAB area. The junction-to-ambient thermal
performance for the LM2941S in the TO-263 package, using the JEDEC JESD51 standards is summarized in the
following table:
Board
Type
Thermal
Vias
θJC
θJA
JEDEC
2-Layer
JESD 51-3
None
1°C/W
73°C/W
1
1°C/W
35°C/W
2
1°C/W
30°C/W
4
1°C/W
26°C/W
8
1°C/W
24°C/W
JEDEC
4-Layer
JESD 51-7
6
POWER DISSIPATION (W)
JA= 35°C/W
5
JA= 30°C/W
JA= 26°C/W
4
JA= 24°C/W
3
2
1
LM2941S (TO-263)
0
0
20
40
60
80
AMBIENT TEMPERATURE (°C)
100
Figure 21. PD(MAX) vs TA for LM2941S (TO-263)
WSON Mounting
The NGN (Pullback) 8-Lead WSON package requires specific mounting techniques which are detailed in
Application Note 1187 (literature number SNOA401). Referring to the section PCB Design Recommendations
in AN-1187 (Page 5), it should be noted that the pad style which should be used with the WSON package is the
NSMD (non-solder mask defined) type.
The thermal dissipation of the WSON package is directly related to the printed circuit board construction and the
amount of additional copper area connected to the DAP.
The DAP (exposed pad) on the bottom of the WSON package is connected to the die substrate via a conductive
die attach adhesive, and to device pin 2 and pin 7. As such, it is strongly recommend that the DAP area be
connected copper area directly under the DAP that is extended into the ground plane via multiple thermal vias.
Alternately, but not recommended, the DAP area may be left floating (i.e. no direct electrical connection). The
DAP area must not be connected to any potential other than ground.
10
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For the LM2941LD in the NGN 8-Lead WSON package, the junction-to-case thermal rating, θJC, is 5.3°C/W,
where the CASE is defined as the bottom of the package at the center of the DAP area. The junction-to-ambient
thermal performance for the LM2941LD in the NGN 8-Lead WSON package, using the JEDEC JESD51
standards is summarized in the following table:
Board
Type
Thermal
Vias
θJC
θJA
JEDEC
2-Layer
JESD 51-3
None
5.3°C/W
181°C/W
1
5.3°C/W
58°C/W
2
5.3°C/W
49°C/W
4
5.3°C/W
40°C/W
6
5.3°C/W
35°C/W
JEDEC
4-Layer
JESD 51-7
POWER DISSIPATION (W)
6
JA= 58°C/W
5
JA= 49°C/W
4
JA= 40°C/W
JA= 35°C/W
3
2
1
LM2941LD (LLP)
0
0
20
40
60
80
AMBIENT TEMPERATURE (°C)
100
Figure 22. PD(MAX) vs TA for LM2941LD (WSON)
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Typical Applications
Note: Using 1k for R1 will ensure that the bias current error from the adjust pin will be negligible. Do not bypass R1 or
R2. This will lead to instabilities.
* Required if regulator is located far from power supply filter.
** COUT must be at least 22μF to maintain stability. May be increased without bound to maintain regulation during
transients. Locate as close as possible to the regulator. This capacitor must be rated over the same operating
temperature range as the regulator and the ESR is critical; see curve.
Figure 23. 5V to 20V Adjustable Regulator
*** To assure shutdown, select Resistor R3 to ensure at least 300μA of pull-up current when S1 is open. (Assume 2V
at the ON/OFF pin.)
Figure 24. 1A Switch
12
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Equivalent Schematic Diagram
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REVISION HISTORY
Changes from Revision F (April 2013) to Revision G
•
14
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Copyright © 1999–2013, Texas Instruments Incorporated
Product Folder Links: LM2941 LM2941C
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
LM2941CS
ACTIVE
DDPAK/
TO-263
KTT
5
45
TBD
Call TI
Call TI
0 to 125
LM2941CS
P+
LM2941CS/NOPB
ACTIVE
DDPAK/
TO-263
KTT
5
45
Pb-Free (RoHS
Exempt)
CU SN
Level-3-245C-168 HR
0 to 125
LM2941CS
P+
LM2941CSX
ACTIVE
DDPAK/
TO-263
KTT
5
500
TBD
Call TI
Call TI
0 to 125
LM2941CS
P+
LM2941CSX/NOPB
ACTIVE
DDPAK/
TO-263
KTT
5
500
Pb-Free (RoHS
Exempt)
CU SN
Level-3-245C-168 HR
0 to 125
LM2941CS
P+
LM2941CT
ACTIVE
TO-220
KC
5
45
TBD
Call TI
Call TI
0 to 125
LM2941CT
P+
LM2941CT/LB03
ACTIVE
TO-220
NDH
5
45
TBD
Call TI
Call TI
LM2941CT
P+
LM2941CT/LF03
ACTIVE
TO-220
NDH
5
45
Green (RoHS
& no Sb/Br)
CU SN
Level-1-NA-UNLIM
LM2941CT
P+
LM2941CT/LF04
ACTIVE
TO-220
NEB
5
45
Green (RoHS
& no Sb/Br)
CU SN
Level-1-NA-UNLIM
LM2941CT
P+
LM2941CT/NOPB
ACTIVE
TO-220
KC
5
45
Green (RoHS
& no Sb/Br)
CU SN
Level-1-NA-UNLIM
0 to 125
LM2941LD
ACTIVE
WSON
NGN
8
1000
TBD
Call TI
Call TI
-40 to 125
L2941LD
LM2941LD/NOPB
ACTIVE
WSON
NGN
8
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
L2941LD
LM2941LDX
ACTIVE
WSON
NGN
8
4500
TBD
Call TI
Call TI
-40 to 125
L2941LD
LM2941LDX/NOPB
ACTIVE
WSON
NGN
8
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
L2941LD
LM2941S
ACTIVE
DDPAK/
TO-263
KTT
5
45
TBD
Call TI
Call TI
-40 to 125
LM2941S
P+
LM2941S/NOPB
ACTIVE
DDPAK/
TO-263
KTT
5
45
Pb-Free (RoHS
Exempt)
CU SN
Level-3-245C-168 HR
-40 to 125
LM2941S
P+
LM2941SX
ACTIVE
DDPAK/
TO-263
KTT
5
500
TBD
Call TI
Call TI
-40 to 125
LM2941S
P+
LM2941SX/NOPB
ACTIVE
DDPAK/
TO-263
KTT
5
500
Pb-Free (RoHS
Exempt)
CU SN
Level-3-245C-168 HR
-40 to 125
LM2941S
P+
Addendum-Page 1
LM2941CT
P+
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
LM2941T
ACTIVE
TO-220
KC
5
45
TBD
Call TI
Call TI
-40 to 125
LM2941T/LB03
ACTIVE
TO-220
NDH
5
45
TBD
Call TI
Call TI
LM2941T
P+
LM2941T/LB04
ACTIVE
TO-220
NEB
5
45
TBD
Call TI
Call TI
LM2941T
P+
LM2941T/LB08
ACTIVE
TO-220
NEC
5
45
TBD
Call TI
Call TI
LM2941T
P+
LM2941T/LF03
ACTIVE
TO-220
NDH
5
45
Green (RoHS
& no Sb/Br)
CU SN
Level-1-NA-UNLIM
LM2941T
P+
LM2941T/NOPB
ACTIVE
TO-220
KC
5
45
Green (RoHS
& no Sb/Br)
CU SN
Level-1-NA-UNLIM
-40 to 125
LM2941T
P+
LM2941T
P+
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 2
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Apr-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LM2941CSX
DDPAK/
TO-263
KTT
5
500
330.0
24.4
10.75
14.85
5.0
16.0
24.0
Q2
LM2941CSX/NOPB
DDPAK/
TO-263
KTT
5
500
330.0
24.4
10.75
14.85
5.0
16.0
24.0
Q2
LM2941LD
WSON
NGN
8
1000
178.0
12.4
4.3
4.3
1.3
8.0
12.0
Q1
LM2941LD/NOPB
WSON
NGN
8
LM2941LDX
WSON
NGN
8
1000
178.0
12.4
4.3
4.3
1.3
8.0
12.0
Q1
4500
330.0
12.4
4.3
4.3
1.3
8.0
12.0
LM2941LDX/NOPB
WSON
NGN
Q1
8
4500
330.0
12.4
4.3
4.3
1.3
8.0
12.0
Q1
LM2941SX
DDPAK/
TO-263
KTT
5
500
330.0
24.4
10.75
14.85
5.0
16.0
24.0
Q2
LM2941SX/NOPB
DDPAK/
TO-263
KTT
5
500
330.0
24.4
10.75
14.85
5.0
16.0
24.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Apr-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM2941CSX
DDPAK/TO-263
KTT
5
500
367.0
367.0
45.0
LM2941CSX/NOPB
DDPAK/TO-263
KTT
5
500
367.0
367.0
45.0
LM2941LD
WSON
NGN
8
1000
210.0
185.0
35.0
LM2941LD/NOPB
WSON
NGN
8
1000
213.0
191.0
55.0
LM2941LDX
WSON
NGN
8
4500
367.0
367.0
35.0
LM2941LDX/NOPB
WSON
NGN
8
4500
367.0
367.0
35.0
LM2941SX
DDPAK/TO-263
KTT
5
500
367.0
367.0
45.0
LM2941SX/NOPB
DDPAK/TO-263
KTT
5
500
367.0
367.0
45.0
Pack Materials-Page 2
MECHANICAL DATA
NDH0005D
www.ti.com
MECHANICAL DATA
NGN0008A
LDC08A (Rev B)
www.ti.com
MECHANICAL DATA
KTT0005B
TS5B (Rev D)
BOTTOM SIDE OF PACKAGE
www.ti.com
MECHANICAL DATA
NEB0005F
www.ti.com
MECHANICAL DATA
NEC0005D
TA05D (Rev A)
www.ti.com
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