NTD4804N Power MOSFET 30 V, 117 A, Single N--Channel, DPAK/IPAK Features Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses Optimized Gate Charge to Minimize Switching Losses These are Pb--Free Devices http://onsemi.com V(BR)DSS Applications • CPU Power Delivery • DC--DC Converters • Low Side Switching RDS(on) MAX 4.0 mΩ @ 10 V 30 V D Value Unit VDSS 30 V VGS 20 V ID 19 A Continuous Drain Current (RθJA) (Note 1) TA = 25°C Power Dissipation (RθJA) (Note 1) TA = 25°C PD 2.5 W Continuous Drain Current (RθJA) (Note 2) TA = 25°C ID 14.5 A Power Dissipation (RθJA) (Note 2) TA = 85°C Steady State TA = 85°C 11 PD 1.43 W Continuous Drain Current (RθJC) (Note 1) TC = 25°C ID 117 A Power Dissipation (RθJC) (Note 1) TC = 25°C TC = 85°C tp=10ms Current Limited by Package 91 PD 93.75 TA = 25°C IDM 230 A TA = 25°C IDmaxPkg 45 A TJ, Tstg -- 55 to 175 °C Operating Junction and Storage Temperature Source Current (Body Diode) S 15 TA = 25°C Pulsed Drain Current N--Channel G 4 4 1 2 1 3 CASE 369AA DPAK (Bent Lead) STYLE 2 2 3 CASE 369AD CASE 369D 3 IPAK IPAK (Straight Lead) (Straight Lead DPAK) W IS 78 A Drain to Source dV/dt dV/dt 6.0 V/ns Single Pulse Drain--to--Source Avalanche Energy (VDD = 24 V, VGS = 10 V, L = 1.0 mH, IL(pk) = 30 A, RG = 25 Ω) EAS 450 mJ Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) TL 260 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. MARKING DIAGRAMS & PIN ASSIGNMENTS 4 Drain 4 Drain YWW 48 04NG Gate--to--Source Voltage Symbol YWW 48 04NG Drain--to--Source Voltage 117 A 5.5 mΩ @ 4.5 V MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter ID MAX 4 Drain YWW 48 04NG • • • • 2 1 2 3 1 Drain 3 Gate Source Gate Drain Source 1 2 3 Gate Drain Source Y WW 4804N G = Year = Work Week = Device Code = Pb--Free Package ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. © Semiconductor Components Industries, LLC, 2010 June, 2010 -- Rev. 6 1 Publication Order Number: NTD4804N/D NTD4804N THERMAL RESISTANCE MAXIMUM RATINGS Symbol Value Unit Junction--to--Case (Drain) Parameter RθJC 1.6 °C/W Junction--to--TAB (Drain) RθJC--TAB 3.5 Junction--to--Ambient -- Steady State (Note 1) RθJA 60 Junction--to--Ambient -- Steady State (Note 2) RθJA 105 1. Surface--mounted on FR4 board using 1 in sq pad size, 1 oz Cu. 2. Surface--mounted on FR4 board using the minimum recommended pad size. ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Test Condition Min Drain--to--Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 30 Drain--to--Source Breakdown Voltage Temperature Coefficient V(BR)DSS/TJ Parameter Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current IDSS Gate--to--Source Leakage Current V 26 VGS = 0 V, VDS = 24 V mV/°C TJ = 25°C 1.0 TJ = 125°C 10 IGSS VDS = 0 V, VGS = 20 V VGS(TH) VGS = VDS, ID = 250 mA 100 mA nA ON CHARACTERISTICS (Note 3) Gate Threshold Voltage Negative Threshold Temperature Coefficient VGS(TH)/TJ Drain--to--Source On Resistance RDS(on) gFS 2.5 7.6 VGS = 10 to 11.5 V VGS = 4.5 V Forward Transconductance 1.5 ID = 30 A 3.4 ID = 15 A 3.4 ID = 30 A 4.7 ID = 15 A 4.6 VDS = 15 V, ID = 15 A V mV/°C 4.0 mΩ 5.5 23 S 4490 pF CHARGES AND CAPACITANCES Input Capacitance Output Capacitance Reverse Transfer Capacitance Ciss Coss Crss Total Gate Charge QG(TOT) Threshold Gate Charge QG(TH) Gate--to--Source Charge QGS Gate--to--Drain Charge QGD Total Gate Charge QG(TOT) VGS = 0 V, f = 1.0 MHz, VDS = 12 V 952 556 30 VGS = 4.5 V, VDS = 15 V, ID = 30 A 40 nC 5.5 13 13 VGS = 11.5 V, VDS = 15 V, ID = 30 A 73 nC 18 ns SWITCHING CHARACTERISTICS (Note 4) Turn--On Delay Time Rise Time Turn--Off Delay Time Fall Time Turn--On Delay Time Rise Time Turn--Off Delay Time Fall Time td(on) tr td(off) VGS = 4.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 Ω 20 24 tf 8 td(on) 10 tr td(off) VGS = 11.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 Ω tf 19 35 5 3. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%. 4. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 ns NTD4804N ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Parameter Symbol Test Condition Min Typ Max Unit TJ = 25°C 0.81 1.2 V TJ = 125°C 0.72 DRAIN--SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD tRR Charge Time ta Discharge Time tb Reverse Recovery Time VGS = 0 V, IS = 30 A 34 VGS = 0 V, dIs/dt = 100 A/ms, IS = 30 A ns 19 15 QRR 30 nC Source Inductance LS 2.49 nH Drain Inductance, DPAK LD 0.0164 Drain Inductance, IPAK LD Gate Inductance LG 3.46 Gate Resistance RG 0.6 PACKAGE PARASITIC VALUES TA = 25°C http://onsemi.com 3 1.88 Ω NTD4804N TYPICAL PERFORMANCE CURVES 240 TJ = 25°C ID, DRAIN CURRENT (AMPS) 200 4.5 V 160 4V 120 80 3.6 V 40 3.2 V 0 1 3 2 4 5 TJ = 125°C TJ = 25°C 40 TJ = --55°C 0 1 2 3 4 6 5 7 Figure 2. Transfer Characteristics ID = 30 A TJ = 25°C 0.01 TJ = 25°C 0.0075 0.007 0.006 0.005 VGS = 4.5 V 0.005 VGS = 11.5 V 0.0025 0.004 RDS(on), DRAIN--TO--SOURCE RESISTANCE (NORMALIZED) 80 Figure 1. On--Region Characteristics 0.008 2 8 6 4 10 0 10 20 30 40 50 60 70 80 90 100 VGS, GATE--TO--SOURCE VOLTAGE (VOLTS) ID, DRAIN CURRENT (AMPS) Figure 3. On--Resistance vs. Gate--to--Source Voltage Figure 4. On--Resistance vs. Drain Current and Gate Voltage 1.7 1.5 120 VGS, GATE--TO--SOURCE VOLTAGE (VOLTS) 0.009 1.6 160 VDS, DRAIN--TO--SOURCE VOLTAGE (VOLTS) 0.010 0.003 VDS ≥ 10 V 200 0 RDS(on), DRAIN--TO--SOURCE RESISTANCE (Ω) 0 RDS(on), DRAIN--TO--SOURCE RESISTANCE (Ω) 10 V 6V 100,000 VGS = 0 V ID = 30 A VGS = 10 V IDSS, LEAKAGE (nA) ID, DRAIN CURRENT (AMPS) 240 1.4 TJ = 175°C 10,000 1.3 1.2 1.1 1.0 1000 TJ = 125°C 0.9 0.8 0.7 --50 --25 0 25 50 75 100 125 150 175 100 0 5 10 15 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN--TO--SOURCE VOLTAGE (VOLTS) Figure 5. On--Resistance Variation with Temperature Figure 6. Drain--to--Source Leakage Current vs. Drain Voltage http://onsemi.com 4 20 NTD4804N 6000 VGS , GATE--TO--SOURCE VOLTAGE (VOLTS) TYPICAL PERFORMANCE CURVES TJ = 25°C Ciss C, CAPACITANCE (pF) 5000 4000 Ciss 3000 Crss 2000 Coss 1000 0 15 VDS = 0 V 10 VGS = 0 V 0 5 5 VGS VDS Crss 10 15 20 25 30 5 QT 4 2 1 0 IS, SOURCE CURRENT (AMPS) t, TIME (ns) tr td(off) tf 1 td(on) 1 0 10 RG, GATE RESISTANCE (OHMS) 15 10 5 1 ms 10 ms dc 10 1 VDS, DRAIN--TO--SOURCE VOLTAGE (VOLTS) 100 EAS, SINGLE PULSE DRAIN--TO--SOURCE AVALANCHE ENERGY (mJ) I D, DRAIN CURRENT (AMPS) 100 ms 0.1 0.2 0.4 0.6 0.8 1.0 Figure 10. Diode Forward Voltage vs. Current 100 1 TJ = 25°C VSD, SOURCE--TO--DRAIN VOLTAGE (VOLTS) 10 ms RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 30 20 0 0 100 1000 10 10 20 15 25 QG, TOTAL GATE CHARGE (nC) VGS = 0 V 25 Figure 9. Resistive Switching Time Variation vs. Gate Resistance VGS = 20 V SINGLE PULSE TC = 25°C 5 30 VDD = 15 V ID = 30 A VGS = 11.5 V 10 ID = 30 A TJ = 25°C Figure 8. Gate--To--Source and Drain--To--Source Voltage vs. Total Charge Figure 7. Capacitance Variation 100 Q2 3 GATE--TO--SOURCE OR DRAIN--TO--SOURCE VOLTAGE (VOLTS) 1000 Q1 500 ID = 30 A 400 300 200 100 0 25 Figure 11. Maximum Rated Forward Biased Safe Operating Area 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (°C) Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature http://onsemi.com 5 175 NTD4804N TYPICAL PERFORMANCE CURVES I D, DRAIN CURRENT (AMPS) 100 100°C 125°C 25°C 10 1 1 100 10 PULSE WIDTH (ms) 1000 r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE (NORMALIZED) Figure 13. Avalanche Characteristics 1.0 D = 0.5 0.2 0.1 0.1 0.05 P(pk) 0.02 0.01 SINGLE PULSE 0.01 1.0E--05 1.0E--04 t1 t2 DUTY CYCLE, D = t1/t2 1.0E--03 1.0E--02 t, TIME (ms) RθJC(t) = r(t) RθJC D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) -- TC = P(pk) RθJC(t) 1.0E--01 1.0E+00 1.0E+01 Figure 14. Thermal Response ORDERING INFORMATION Package Shipping† NTD4804NT4G DPAK (Pb--Free) 2500/Tape & Reel NTD4804N--1G IPAK (Pb--Free) 75 Units/Rail NTD4804N--35G IPAK Trimmed Lead (3.5 0.15 mm) (Pb--Free) 75 Units/Rail Order Number †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 6 NTD4804N PACKAGE DIMENSIONS DPAK (SINGLE GUAGE) CASE 369AA--01 ISSUE B A E b3 c2 B Z D 1 L4 A 4 L3 b2 e 2 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. C H DETAIL A 3 DIM A A1 b b2 b3 c c2 D E e H L L1 L2 L3 L4 Z c b 0.005 (0.13) M C H L2 GAUGE PLANE C L SEATING PLANE A1 L1 DETAIL A ROTATED 90° CW STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN SOLDERING FOOTPRINT* 6.20 0.244 2.58 0.102 5.80 0.228 3.00 0.118 1.60 0.063 INCHES MIN MAX 0.086 0.094 0.000 0.005 0.025 0.035 0.030 0.045 0.180 0.215 0.018 0.024 0.018 0.024 0.235 0.245 0.250 0.265 0.090 BSC 0.370 0.410 0.055 0.070 0.108 REF 0.020 BSC 0.035 0.050 ------ 0.040 0.155 ------ 6.17 0.243 SCALE 3:1 mm inches *For additional information on our Pb--Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 7 MILLIMETERS MIN MAX 2.18 2.38 0.00 0.13 0.63 0.89 0.76 1.14 4.57 5.46 0.46 0.61 0.46 0.61 5.97 6.22 6.35 6.73 2.29 BSC 9.40 10.41 1.40 1.78 2.74 REF 0.51 BSC 0.89 1.27 -----1.01 3.93 ------ NTD4804N PACKAGE DIMENSIONS 3.5 MM IPAK, STRAIGHT LEAD CASE 369AD--01 ISSUE O E A E3 L2 E2 A1 D2 D L1 NOTES: 1.. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2.. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30mm FROM TERMINAL TIP. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD GATE OR MOLD FLASH. DIM A A1 A2 b b1 D D2 E E2 E3 e L L1 L2 L T SEATING PLANE A1 b1 2X e A2 3X E2 b 0.13 M T D2 MILLIMETERS MIN MAX 2.19 2.38 0.46 0.60 0.87 1.10 0.69 0.89 0.77 1.10 5.97 6.22 4.80 -----6.35 6.73 4.70 -----4.45 5.46 2.28 BSC 3.40 3.60 -----2.10 0.89 1.27 OPTIONAL CONSTRUCTION IPAK (STRAIGHT LEAD DPAK) CASE 369D--01 ISSUE B C B V E R 4 Z A S 1 2 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3 --T-SEATING PLANE K J F D G H M INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 ------ MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93 ------ STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN 3 PL 0.13 (0.005) DIM A B C D E F G H J K R S V Z T ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. 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