IC ICM7342 Dual 12/10/8-bit voltage-output dac Datasheet

ICmic
ICM7362/7342/7322
IC MICROSYSTEMS
DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS
FEATURES
•
12/10/8-Bit Monotonic Dual DACs in 10 lead
MSOP Package
•
Wide Output Voltage Swing
•
100 µA per DAC
•
On Board Reference
•
Serial Interface with three-wire SPI/QSPI and
Microwire Interface Compatible
•
8µs Full-Scale Settling Time
with guaranteed monotonic behavior. They include a
1.25V reference for ease of use and flexibility. The
reference output is available on a separate pin and can be
used to drive the reference input of each DAC. Alternately,
each DAC can be driven by an external reference. The
operating supply range is 2.7V to 5.5V.
The input interface is an easy to use three-wire SPI/QSPI
compatible interface. Each DAC can be individually
controlled and has a double buffered digital input.
APPLICATIONS
•
Battery-Powered Applications
•
Industrial Process Control
•
Digital Gain and Offset Adjustment
OVERVIEW
The ICM7362, ICM7342 and ICM7322 are Dual 12-Bit, 10Bit and 8-Bit wide output voltage swing DACs respectively,
BLOCK DIAGRAM
REFB
REFOUT
SDI
VDD
REFA
ICM 7362/7342/7322
Reference
Input and
DAC Latch
12/10/8 -Bit
DAC A
x2
VOUT A
Input and
DAC Latch
12/10/8 -Bit
DAC B
x2
VOUT B
Input Control Logic, Registers and Latches
Power-OnReset
SCK
Rev. A8
CS
GND
ICmic reserves the right to change the specifications without prior notice.
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ICmic
ICM7362/7342/7322
IC MICROSYSTEMS
DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS
PACKAGE
10-Pin MSOP
V DD 1
10 GND
REF A 2
9 SDI
V OUT A 3
8 SCK
REF B 4
7 CS
V OUT B 5
6 REFOUT
PIN DESCRIPTION
Pin No
Symbol
Description
1
VDD
Supply Voltage
2
REF A
DAC A Reference Input
3
VOUT A
DAC A Output
4
REF B
DAC B Reference Input
5
VOUT B
DAC B Output
6
REFOUT
Reference Output (1.25V)
7
8
CS
SCK
Chip Select (TTL or CMOS)
Serial Clock Input (TTL or CMOS)
9
SDI
Serial Data Input (TTL or CMOS)
10
GND
Ground
ABSOLUTE MAXIMUM RATING
Symbol
VDD
IIN
VIN_
VIN_REF
TSTG
TSOL
Parameter
Supply Voltage
Input Current
Digital Input Voltage (SCK, SDI, CS)
Reference Input Voltage
Storage Temperature
Soldering Temperature
Value
-0.3 to 7.0
+/- 25.0
-0.3 to 7.0
-0.3 to 7.0
-65 to +150
300
Unit
V
mA
V
V
o
C
o
C
Note: Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
ORDERING INFORMATION
Part
ICM7362
ICM7342
ICM7322
Rev. A8
Temperature Range
-40 oC to 85 oC
-40 oC to 85 oC
-40 oC to 85 oC
Package
10-Pin MSOP
10-Pin MSOP
10-Pin MSOP
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ICmic
ICM7362/7342/7322
IC MICROSYSTEMS
DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS
DC ELECTRICAL CHARACTERISTICS
(VDD = 2.7V to 5.5V, VREF IN = 1.25V ; VOUT unloaded; all specifications TMIN to TMAX unless otherwise noted)
Symbol
Parameter
DC PERFORMANCE
ICM7362
N
Resolution
DNL
Differential Nonlinearity
INL
Integral Nonlinearity
ICM7342
N
Resolution
DNL
Differential Nonlinearity
INL
Integral Nonlinearity
ICM7322
N
Resolution
DNL
Differential Nonlinearity
INL
Integral Nonlinearity
GE
Gain Error
OE
Offset Error
POWER REQUIREMENTS
VDD
Supply Voltage
IDD
Supply Current
Symbol
Parameter
OUTPUT CHARACTERISTICS
Output Voltage Range
VOSC
Short Circuit Current
ROUT
Amp Output Impedance
Output Line Regulation
LOGIC INPUTS
VIH
Digital Input High
VIL
Digital Input Low
Digital Input Leakage
REFERENCE
RIN
Reference Input Resistance
Reference Input Range
VREFOUT
Reference Output
Reference Output Line
Regulation
Test Conditions
Min
Typ
Max
12
(Notes 1 & 3)
(Notes 1 & 3)
0.4
4.0
+1.0
+12.0
Bits
LSB
LSB
0.1
1.0
+1.0
+3.0
Bits
LSB
LSB
0.05
0.25
+1.0
+0.75
Bits
LSB
LSB
+0.5
+25
% of FS
mV
5.5
1.0
V
mA
10
(Notes 1 & 3)
(Notes 1 & 3)
8
(Notes 1 & 3)
(Notes 1 & 3)
2.7
(Note 4)
Test Conditions
(Note 3)
0.4
Min
(Note 2)
(Note 2)
(Note 2)
Typ
0
60
1.0
100
0.4
At Mid-scale (Note 2)
At 0-scale (Note 2)
Vdd=2.7 to 5.5 V
Max
Vdd=2.7 to 5.5 V
41
1.25
0.8
Unit
VDD
150
5.0
200
3.0
V
mA
Ω
Ω
mV/V
0.8
5
V
V
µA
65
VDD -1.5
1.3
4.0
kΩ
V
V
mV/V
2.4
25
0.5
1.2
Unit
AC ELECTRICAL CHARACTERISTICS
(VDD = 2.7V to 5.5V, VREF IN = 1.25V ; VOUT unloaded; all specifications TMIN to TMAX unless otherwise noted)
Symbol
SR
Parameter
Test Conditions
Slew Rate
Settling Time
Full-scale settling
Mid-scale Transition Glitch
Energy
Note 1:
Note 2:
Note 3:
Note 4:
Rev. A8
Min
Typ
Max
Unit
2
V/µs
8
µs
40
nV-S
Linearity is defined from code 64 to 4095 (ICM7362)
Linearity is defined from code 16 to 1023 (ICM7342)
Linearity is defined from code 4 to 255 (ICM7322)
Guaranteed by design; not tested in production
See Applications Information
All digital inputs are either at GND or Vdd
ICmic reserves the right to change the specifications without prior notice.
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ICmic
ICM7362/7342/7322
IC MICROSYSTEMS
DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS
TIMING CHARACTERISTICS
(VDD = 2.7V to 5.5V; all specifications TMIN to TMAX unless otherwise noted)
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
t1
t2
t3
SCK Cycle Time
Data Setup Time
Data Hold Time
(Note 2)
(Note 2)
(Note 2)
30
10
10
ns
ns
ns
t4
SCK Falling edge to CS
Rising Edge
(Note 2)
0
ns
t5
CS Falling Edge to SCK
Rising Edge
15
ns
t6
CS Pulse Width
20
ns
(Note 2)
(Note 2)
t1
SCK
t3
t2
SDI
C3
C2
MSB
t5
Input Word for DAC N
t4
CS
t6
Figure 1: Serial Interface Timing Diagram
Rev. A8
ICmic reserves the right to change the specifications without prior notice.
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ICmic
ICM7362/7342/7322
IC MICROSYSTEMS
DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS
CONTENTS OF INPUT SHIFT REGISTER
ICM7362 (12-Bit DAC)
MSB
C3
C2
C1
C0
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
LSB
D0
D0
X
LSB
X
X
X
LSB
X
Figure 2: Contents of ICM7362 Input Shift Register
ICM7342 (10-Bit DAC)
MSB
C3
C2
C1
C0
D9
D8
D7
D6
D5
D4
D3
D2
D1
Figure 3: Contents of ICM7342 Input Shift Register
ICM7322 (8-Bit DAC)
MSB
C3
C2
C1
C0
D7
D6
D5
D4
D3
D2
D1
D0
X
Figure 4: Contents of ICM7322 Input Shift Register
C3
C2
C1
C0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
DATA
Data
Data
Data
Data
Data
Data
X
X
X
X
X
X
Data
Data
Data
X
DAC
FUNCTION
A
A
A
B
B
B
X
X
X
X
X
X
A&B
A&B
A&B
X
Load Input Latch
Update DAC
Load Input Latch and Update DAC
Load Input Latch
Update DAC
Load Input Latch and Update DAC
No Operation
No Operation
No Operation
No Operation
No Operation
No Operation
Load Input Latch
Update DAC
Load Input Latch and Update DAC
No Operation
Table 1: Serial Interface Control Command
Rev. A8
ICmic reserves the right to change the specifications without prior notice.
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ICmic
IC MICROSYSTEMS
DETAILED DESCRIPTION
The ICM7362 is a 12-bit dual voltage output DAC. The
ICM7342 is the 10-bit version of this family and the
ICM7322 is the 8-bit version.
This family of DACs employs a resistor string architecture
guaranteeing monotonic behavior. There is a 1.25V
onboard reference and an operating supply range of 2.7V
to 5.5V.
Reference Input and Output
Each DAC has its own reference input pin which can be
driven from ground to VDD -1.5V. The input resistance on
each of these pins is typically 41 k Ω. There is a gain of
two in the output amplifiers which means they swing from
ground at code 0 to 2 x VREF IN at full-scale :
Vout = 2 x (VREF IN xD)/2n
ICM7362/7342/7322
DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS
a bank of 16 latches. The 4 bit control word (C3~C0) is
then decoded and the appropriate DAC is updated or
loaded depending on the control word (see Table 1).
Each DAC has a double-buffered input with an input latch
and a DAC latch. The DAC output will swing to its new
value when data is loaded into the DAC latch. For each
DAC, the user has three options: loading only the input
latch, updating the DAC with data previously loaded into
the input latch or loading the input latch and updating the
DAC at the same time with a new code. The user also has
the ability to perform this operation simultaneously for both
DACs as shown in Table 1.
Power-On Reset
There is a power-on reset on board that will clear the
contents of all the latches to all 0s on power-up and the
DAC voltage outputs will go to ground.
Where D=digital input (decimal) and n= number of bits, i.e.
12 for ICM7362, 10 for ICM7342 and 8 for ICM7322.
There is also an onboard band-gap reference on all these
parts. This reference output is nominally 1.25V and is
brought out to a separate pin, REFOUT and can be used
to drive the reference input of the DACs. The outputs will
nominally swing from 0 to 2.5V when using this reference.
Output Amplifier
Each DAC has its own output amplifier with a wide output
voltage swing. The actual swing of the output amplifier will
be limited by offset error and gain error. See the
Applications Information Section for a more detailed
discussion.
The amplifiers are configured in a gain of 2 with internal
gain resistors of about 50 kΩ. The output swing will be
from 0V to 2 x VREF IN at full-scale.
The output amplifier can drive a load of 2.0 kΩ to VDD or
GND in parallel with a 500 pF load capacitance.
The output amplifier has a full-scale typical settling time of
8 µs and it dissipates about 100 µA with a 3V supply
voltage.
Serial Interface and Input Logic
This dual DAC family uses a standard 3-wire connection
compatible with SPI/QSPI interfaces. Data is loaded in 16bit words which consist of 4 address and control bits
(MSBs) followed by 12 bits of data (see table 1). The
ICM7342 has the last two LSBs as don’t cares and the
ICM7322 has the last 4 LSBs as don’t cares. Each DAC is
double buffered with an input latch and a DAC latch.
All the digital inputs are CMOS/TTL compatible. The
current dissipation of the device however, will be higher
when the inputs are driven at TTL levels.
Data is clocked in on the rising edge of SCK which has a
Schmitt trigger internally to allow for noise immunity on the
SCK pin. This specially eases the use for opto-coupled
interfaces.
The CS pin must be low when data is being clocked into
the part. After the 16th clock pulse the CS pin must be
pulled high (level-triggered) for the data to be transferred
to an input bank of latches. The CS pin also disables the
SCK pin internally when pulled high and the SCK pin must
be low before the CS pin is pulled back low. As the CS pin
is pulled high the shift register contents are transferred to
Rev. A8
ICmic reserves the right to change the specifications without prior notice.
6
ICmic
ICM7362/7342/7322
IC MICROSYSTEMS
DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS
above ground. This is why the linearity is specified for a
starting code greater than zero.
APPLICATIONS INFORMATION
Power
Supply
Bypassing
and
Layout
Considerations
As in any precision circuit, careful consideration has to be
given to layout of the supply and ground. The return path
from the GND to the supply ground should be short with
low impedance. Using a ground plane would be ideal. The
supply should have some bypassing on it. A 10 µF
tantalum capacitor in parallel with a 0.1 µF ceramic with a
low ESR can be used. Ideally these would be placed as
close as possible to the device. Avoid crossing digital and
analog signals, specially the reference, or running them
close to each other.
Output Swing Limitations
The ideal rail-to-rail DAC would swing from GND to VDD
however, offset and gain error limit this ability. Figure 5
illustrates how a negative offset error will affect the output.
The output will limit close to ground since this is single
supply part, resulting in a dead-band area. As a larger
input is loaded into the DAC the output will eventually rise
Figure 6 illustrates how a gain error or positive offset error
will affect the output when it is close to VDD. A positive gain
error or positive offset will cause the output to be limited to
the positive supply voltage resulting in a dead-band of
codes close to full-scale. This can be avoided by using a
reference voltage slightly less then 0.5 x VDD ensuring that
the full-scale of the DAC is always less than VDD.
DEADBAND
NEGATIVE
OFFSET
Figure 5: Effect of Negative Offset
OFFSET AND
GAIN ERROR
VDD
DEADBAND
POSITIVE
OFFSET
Figure 6: Effect of Gain Error and Positive Offset
Rev. A8
ICmic reserves the right to change the specifications without prior notice.
7
ICmic
IC MICROSYSTEMS
ICM7362/7342/7322
DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS
PACKAGE DIAGRAM
10-Pin MSOP Package
Rev. A8
ICmic reserves the right to change the specifications without prior notice.
8
ICmic
ICM7362/7342/7322
IC MICROSYSTEMS
DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS
ORDERING INFORMATION
ICM73X2 P G
Device
6 - ICM7362
4 - ICM7342
2 - ICM7322
Rev. A8
G = RoHS Compliant Lead-Free package.
Blank = Standard package. Non lead-free.
Package
M = 10-Lead MSOP
ICmic reserves the right to change the specifications without prior notice.
9
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