NUP2201MR6 Low Capacitance TSOP−6 Diode−TVS Array for High Speed Data Lines Protection http://onsemi.com The NUP2201MR6 transient voltage suppressor is designed to protect high speed data lines from ESD, EFT, and lighting. Features: • Low Capacitance (3 pF Maximum Between I/O Lines) • ESD Rating of Class 3B (Exceeding 8 kV) per Human Body model • • and Class C (Exceeding 400 V) per Machine Model Protection for the Following IEC Standards: IEC 61000−4−2 (ESD) 15 kV (air) 8 kV (contact) IEC 61000−4−4 (EFT) 40 A (5/50 ns) IEC 61000−4−5 (lighting) 23 A (8/20 s) UL Flammability Rating of 94 V−0 PIN CONFIGURATION AND SCHEMATIC Typical Applications: • • • • • TSOP−6 LOW CAPACITANCE DIODE TVS ARRAY 500 WATTS PEAK POWER 6 VOLTS High Speed Communication Line Protection USB 1.1 and 2.0 Power and Data Line Protection Digital Video Interface (DVI) Monitors and Flat Panel Displays Pb−Free Package May be Available. The G−Suffix Denotes a Pb−Free Lead Finish I/O 1 6 I/O VN 2 5 VP N/C 3 4 N/C 6 1 TSOP−6 CASE 318G PLASTIC MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Symbol Value Unit Peak Power Dissipation 8 x 20 S @ TA = 25°C (Note 1) Ppk 500 W Operating Junction Temperature Range TJ −40 to +125 °C Storage Temperature Range Tstg −55 to +150 °C Lead Solder Temperature − Maximum (10 Seconds) TL 235 °C ESD 16000 400 20000 20000 V Rating Human Body Model (HBM) Machine Model (MM) IEC 61000−4−2 Air (ESD) IEC 61000−4−2 Contact (ESD) MARKING DIAGRAM 62M 62 = Specific Device Code M = Date Code 1. Non−repetitive current pulse per Figure 1 (Pin 5 to Pin 2) ORDERING INFORMATION Package Shipping† TSOP−6 3000/Tape & Reel NUP2201MR6T1G TSOP−6 3000/Tape & Reel Device NUP2201MR6T1 †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Semiconductor Components Industries, LLC, 2003 November, 2003 − Rev. 1 1 Publication Order Number: NUP2201MR6/D NUP2201MR6 ELECTRICAL CHARACTERISTICS (TJ=25°C unless otherwise specified) Parameter Symbol Reverse Working Voltage Conditions VRWM Breakdown Voltage Min Typ (Note 2) VBR IT=1 mA, (Note 3) Max Unit 5.0 V 6.0 V Reverse Leakage Current IR VRWM = 5 V 5.0 A Clamping Voltage VC IPP = 5 A (Note 4) 12.5 V Clamping Voltage VC IPP = 8 A (Note 4) 20 V Maximum Peak Pulse Current IPP 8x20 s Waveform 25 A Junction Capacitance CJ VR = 0 V, f=1 MHz between I/O Pins and GND 3.0 5.0 pF Junction Capacitance CJ VR = 0 V, f=1 MHz between I/O Pins 1.5 3.0 pF 2. TVS devices are normally selected according to the working peak reverse voltage (VRWM), which should be equal or greater than the DC or continuous peak operating voltage level. 3. VBR is measured at pulse test current IT. 4. Non−repetitive current pulse per Figure 1 (Pin 5 to Pin 2) TYPICAL PERFORMANCE CURVES 100 100 90 90 % OF PEAK PULSE CURRENT PEAK POWER DISSIPATION (%) (TJ = 25°C unless otherwise noted) 80 70 60 50 40 30 20 10 0 0 25 50 75 100 125 150 175 PULSE WIDTH (tP) IS DEFINED AS THAT POINT WHERE THE PEAK CURRENT DECAY = 8 s 80 70 60 HALF VALUE IRSM/2 @ 20 s 50 40 30 tP 20 10 0 200 PEAK VALUE IRSM @ 8 s tr 0 20 TA, AMBIENT TEMPERATURE (°C) 20 4.5 18 CLAMPING VOLTAGE (V) JUNCTION CAPACITANCE (pF) 5.0 4.0 3.5 I/O−Ground 2.5 2.0 I/O lines 1.5 1.0 16 14 12 10 8 6 4 2 0.5 0.0 80 60 Figure 2. 8 × 20 s Pulse Waveform Figure 1. Pulse Derating Curve 3.0 40 t, TIME (s) 0 1 2 3 4 0 5 0 VBR, REVERSE VOLTAGE (V) 10 20 30 40 50 PEAK PULSE CURRENT (A) Figure 3. Junction Capacitance vs Reverse Voltage Figure 4. Clamping Voltage vs. Peak Pulse Current (8 x 20 s Waveform) http://onsemi.com 2 NUP2201MR6 PACKAGE DIMENSIONS TSOP−6 CASE 318G−02 ISSUE K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. A L 6 S 1 5 4 2 3 B MILLIMETERS DIM MIN MAX A 2.90 3.10 B 1.30 1.70 C 0.90 1.10 D 0.25 0.50 G 0.85 1.05 H 0.013 0.100 J 0.10 0.26 K 0.20 0.60 L 1.25 1.55 M 0_ 10 _ S 2.50 3.00 D G M J C 0.05 (0.002) K H SOLDERING FOOTPRINT* 2.4 0.094 1.9 0.075 0.95 0.037 0.95 0.037 0.7 0.028 1.0 0.039 Figure 5. TSOP−6 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 3 INCHES MIN MAX 0.1142 0.1220 0.0512 0.0669 0.0354 0.0433 0.0098 0.0197 0.0335 0.0413 0.0005 0.0040 0.0040 0.0102 0.0079 0.0236 0.0493 0.0610 0_ 10 _ 0.0985 0.1181 NUP2201MR6 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 4 For additional information, please contact your local Sales Representative. NUP2201MR6/D