Product Folder Sample & Buy Support & Community Tools & Software Technical Documents TPS715 SLVS338R – MAY 2001 – REVISED APRIL 2015 TPS715 50-mA, 24-V, 3.2-μA Supply Current Low-Dropout Linear Regulator in SC70 Package 1 Features 3 Description • • • • • The TPS715 low-dropout (LDO) voltage regulators offer the benefits of high input voltage, low-dropout voltage, low-power operation, and miniaturized packaging. The devices, which operate over an input range of 2.5 V to 24 V, are stable with any capacitor greater than or equal to 0.47 μF. The low dropout voltage and low quiescent current allow operation at extremely low power levels. Therefore, the devices are ideal for powering battery management ICs. Specifically, because the devices are enabled as soon as the applied voltage reaches the minimum input voltage, the output is quickly available to power continuously operating battery charging ICs. 1 • • • • • 24-V Maximum Input Voltage Low 3.2-μA Quiescent Current at 50 mA Stable With Any Capacitor ≥ 0.47 μF 50-mA Low-Dropout Regulator Available in 1.8 V, 1.9 V, 2.3 V, 2.5 V, 3 V, 3.3 V, 3.45 V, 5 V, and Adjustable (1.2 V to 15 V) Designed to Support MSP430 Families: – 1.9-V Version Ensured to be Higher Than Minimum VIN of 1.8 V – 2.3-V Version Ensured to Meet 2.2-V Minimum VIN for Flash on MSP430F2xx – 3.45-V Version Ensured to be Lower Than Maximum VIN of 3.6 V – Wide Variety of Fixed-Output Voltage Options to Match VIN to the Minimum Required for Desired MSP430 Speed Minimum and Maximum Specified Current Limit 5-Pin SC70 (DCK) –40°C to +125°C Specified Junction Temperature Range For 80-mA Rated Current and Higher Power Package, see TPS715A The usual PNP pass transistor has been replaced by a PMOS pass element. Because the PMOS pass element behaves as a low-value resistor, the low dropout voltage, typically 415 mV at 50 mA of load current, is directly proportional to the load current. The low quiescent current (3.2 µA typically) is stable over the entire range of output load current (0 mA to 50 mA). Device Information(1) PART NUMBER TPS715 PACKAGE SC70 (5) BODY SIZE (NOM) 2.00 mm × 1.25 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 2 Applications • • • Ultralow Power Microcontrollers Cellular and Cordless Handsets Portable and Battery-Powered Equipment Typical Application Schematic TPS715xx IN Solar Cell OUT MSP430 GND 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TPS715 SLVS338R – MAY 2001 – REVISED APRIL 2015 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 4 4 4 4 5 6 Absolute Maximum Ratings ..................................... ESD Ratings ............................................................ Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Typical Characteristics .............................................. Detailed Description .............................................. 8 7.1 7.2 7.3 7.4 Overview ................................................................... Functional Block Diagrams ....................................... Feature Description................................................... Device Functional Modes.......................................... 8 8 8 9 8 Application and Implementation ........................ 10 8.1 Application Information............................................ 10 8.2 Typical Application .................................................. 10 8.3 Do's and Don'ts ....................................................... 12 9 Power Supply Recommendations...................... 12 10 Layout................................................................... 13 10.1 Layout Guidelines ................................................. 13 10.2 Layout Example .................................................... 13 10.3 Power Dissipation ................................................. 13 11 Device and Documentation Support ................. 14 11.1 11.2 11.3 11.4 11.5 Device Support...................................................... Documentation Support ....................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 14 14 14 14 14 12 Mechanical, Packaging, and Orderable Information ........................................................... 14 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision Q (January 2014) to Revision R Page • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section ................................................................................................. 1 • Changed front-page figure ..................................................................................................................................................... 1 • Changed Pin Configuration and Functions section; updated table format ............................................................................ 3 • Deleted Continuous total power dissipation row in Absolute Maximum Ratings.................................................................... 4 Changes from Revision P (November 2008) to Revision Q • 2 Page Changed test condition for VOUT accuracy parameter ............................................................................................................ 5 Submit Documentation Feedback Copyright © 2001–2015, Texas Instruments Incorporated Product Folder Links: TPS715 TPS715 www.ti.com SLVS338R – MAY 2001 – REVISED APRIL 2015 5 Pin Configuration and Functions DCK PACKAGE 5-Pin SC70 Top View FB/NC 1 GND 2 NC 3 5 OUT 4 IN Pin Functions PIN NAME SC70 I/O DESCRIPTION FIXED ADJUSTABLE FB — 1 I GND 2 2 — IN 4 4 I NC 1, 3 3 — No connection 5 5 O Output of the regulator. Any output capacitor ≥ 0.47 μF can be used for stability. OUT Adjustable version only. This terminal is used to set the output voltage. Ground Input supply Submit Documentation Feedback Copyright © 2001–2015, Texas Instruments Incorporated Product Folder Links: TPS715 3 TPS715 SLVS338R – MAY 2001 – REVISED APRIL 2015 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings Over operating temperature range (unless otherwise noted). (1) (2) Voltage MIN MAX VIN –0.3 24 VOUT –0.3 16.5 Peak output current Temperature (1) (2) UNIT V Internally limited Junction, TJ –40 150 Storage, Tstg –65 150 °C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to network ground terminal. 6.2 ESD Ratings VALUE Electrostatic discharge V(ESD) (1) (2) Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) ±2000 Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2) ±500 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN VIN Input supply voltage IOUT NOM MAX UNIT 2.5 24 V Output current 0 50 mA CIN Input capacitor 0 0.047 µF COUT Output capacitor 0.47 1 µF 6.4 Thermal Information TPS715 THERMAL METRIC (1) DCK [SC70] UNIT 5 PINS RθJA Junction-to-ambient thermal resistance 253.8 RθJC(top) Junction-to-case (top) thermal resistance 73.7 RθJB Junction-to-board thermal resistance 84.6 ψJT Junction-to-top characterization parameter 1.1 ψJB Junction-to-board characterization parameter 83.9 (1) 4 °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. Submit Documentation Feedback Copyright © 2001–2015, Texas Instruments Incorporated Product Folder Links: TPS715 TPS715 www.ti.com SLVS338R – MAY 2001 – REVISED APRIL 2015 6.5 Electrical Characteristics Over operating junction temperature range (TJ = –40°C to 125°C), VIN = VOUT(nom) + 1 V, IOUT = 1 mA, and COUT = 1 μF, unless otherwise noted. Typical values are at TJ = 25°C. PARAMETER TEST CONDITIONS MIN TYP 2.5 24 IO = 50 mA 3 24 1.2 15 –4% 4% VIN Input voltage (1) VOUT Output voltage (TPS71501) VOUT Accuracy (1) IGND Ground pin current (2) ΔVOUT(ΔIOUT) Load regulation IOUT = 100 μA to 50 mA 22 ΔVOUT(ΔVIN) Output voltage line regulation (1) VOUT + 1 V < VIN ≤ 24 V 20 Vn Output noise voltage BW = 200 Hz to 100 kHz, COUT = 10 μF, IOUT = 50 mA ICL Output current limit PSRR Power-supply ripple rejection f = 100 kHz, COUT = 10 μF VDO Dropout voltage VIN = VOUT(nom) – 0.1 V IOUT = 50 mA Over VIN, IOUT, and T VOUT + 1 V ≤ VIN ≤ 24 V 100 μA ≤ IOUT ≤ 50 mA 0 ≤ IOUT ≤ 50 mA, TJ = –40°C to 85°C 3.2 4.2 0 mA ≤ IOUT ≤ 50 mA 3.2 4.8 0 mA ≤ IOUT ≤ 50 mA, VIN = 24 V (1) (2) MAX IO = 10 mA UNIT V V μA 5.8 mV 60 mV μVrms 575 VOUT = 0 V, VIN ≥ 3.5 V 125 750 mA VOUT = 0 V, VIN < 3.5 V 90 750 mA 60 415 dB 750 mV Minimum VIN = VOUT + VDO or the value shown for Input voltage in this table, whichever is greater. See Figure 10. The TPS715 family employs a leakage null control circuit. This circuit is active only if output current is less than pass FET leakage current. The circuit is typically active when output load is less than 5 μA, VIN is greater than 18 V, and die temperature is greater than 100°C. Submit Documentation Feedback Copyright © 2001–2015, Texas Instruments Incorporated Product Folder Links: TPS715 5 TPS715 SLVS338R – MAY 2001 – REVISED APRIL 2015 www.ti.com 6.6 Typical Characteristics 3.32 3.320 VIN = 4.3 V COUT = 1 mF TJ = 25°C 3.31 VOUT − Output Voltage − V VOUT − Output Voltage − V 3.315 3.310 3.305 3.300 3.295 10 20 30 40 50 IO − Output Current − mA Figure 1. Output Voltage vs Output Current IOUT = 50 mA 3.29 3.28 3.27 VIN = 4.3 V COUT = 1 mF 3.26 Figure 2. Output Voltage vs Junction Temperature 4.5 Hz 8 VIN = 4.3 V VOUT = 3.3 V IOUT = 1 mF 7 Output Spectral Noise Density − 6 3.5 3 2.5 2 −40 −25 −10 5 20 35 50 65 80 95 110 125 5 IOUT = 50 mA 4 3 2 1 0 100 TJ − Junction Temperature − °C Figure 3. Quiescent Current vs Junction Temperature 100 k 600 14 V DO − Dropout Voltage − mV VIN = 4.3 V VOUT = 3.3 V COUT = 1 mF TJ = 25°C 16 Zo − Output Impedance − W 1k 10 k f − Frequency − Hz Figure 4. Output Spectral Noise Density vs Frequency 18 12 10 8 6 IOUT = 1 mA 4 2 0 VIN = 3.2 V COUT = 1 mF 500 TJ = 125°C 400 TJ = 25°C 300 200 TJ = −40°C 100 IOUT = 50 mA 10 6 VIN = 4.3 V VOUT = 3.3 V COUT = 1 mF IOUT = 1 mA m V/ 4 IGND − Ground Current − mA 3.30 3.25 −40 −25 −10 5 20 35 50 65 80 95 110 125 TJ − Junction Temperature − °C 3.290 0 IOUT = 1 mA 100 1k 10k 100k 1M 0 10 M f − Frequency − Hz 0 10 20 30 40 IOUT − Output Current − mA Figure 5. Output Impendence vs Frequency Figure 6. Dropout Voltage vs Output Current Submit Documentation Feedback 50 Copyright © 2001–2015, Texas Instruments Incorporated Product Folder Links: TPS715 TPS715 www.ti.com SLVS338R – MAY 2001 – REVISED APRIL 2015 Typical Characteristics (continued) 1 600 IOUT = 50 mA VIN = 3.2 V V DO − Dropout Voltage − V 0.8 V DO − Dropout Voltage − mV 0.9 TJ = 125°C 0.7 TJ = 25°C 0.6 0.5 0.4 TJ = −40°C 0.3 0.2 500 IOUT = 50 mA 400 300 200 IOUT = 10 mA 100 0.1 0 −40 −25 −10 5 20 35 50 65 80 95 110 125 0 0 3 6 9 12 15 TJ − Junction Temperature − °C Figure 7. TPS71501 Dropout Voltage vs Input Voltage Figure 8. Dropout Voltage vs Junction Temperature PSRR − Power Supply Ripple Rejection − dB VIN − Input Voltage − V 100 VIN = 4.3 V VOUT = 3.3 V COUT = 10 mF TJ = 25°C 90 80 70 60 IOUT = 1 mA 50 40 30 20 IOUT = 50 mA 10 0 10 100 1k 10k 100k 1M 10 M f − Frequency − Hz Figure 9. Power Supply Ripple Rejection vs Frequency Submit Documentation Feedback Copyright © 2001–2015, Texas Instruments Incorporated Product Folder Links: TPS715 7 TPS715 SLVS338R – MAY 2001 – REVISED APRIL 2015 www.ti.com 7 Detailed Description 7.1 Overview The TPS715 family of LDOs consume only 3.2 µA of current while offering a wide input voltage range and lowdropout voltage in a small package. The devices, which operate over an input range of 2.5 V to 24 V, are stable with any capacitor greater than or equal to 0.47 μF. The low quiescent current makes the TPS715 ideal for powering battery management ICs. Specifically, because the TPS715 is enabled as soon as the applied voltage reaches the minimum input voltage, the output is quickly available to power continuously operating battery charging ICs. 7.2 Functional Block Diagrams V(OUT) V(IN) Current Sense Leakage Null Control Circuit ILIM _ GND R1 + FB Bandgap Reference R2 Vref = 1.205 V Figure 10. Functional Block Diagram—Adjustable Version V(OUT) V(IN) Current Sense Leakage Null Control Circuit ILIM _ GND Bandgap Reference R1 + Vref = 1.205 V R2 Figure 11. Functional Block Diagram—Fixed Version 7.3 Feature Description 7.3.1 Wide Supply Range This device has an operational input supply range of 2.5 V to 24 V, allowing for a wide range of applications. This wide supply range is ideal for applications that have either large transients or high DC voltage supplies. 7.3.2 Low Supply Current This device only requires 3.2 µA (typical) of supply current from –40°C to 85°C and has a maximum current consumption of 5.8 µA at –40°C to 125°C. 7.3.3 Stable With Any Capacitor ≥ 0.47 µF Any capacitor, including both ceramic and tantalum, greater than or equal to 0.47 μF properly stabilizes this loop. 8 Submit Documentation Feedback Copyright © 2001–2015, Texas Instruments Incorporated Product Folder Links: TPS715 TPS715 www.ti.com SLVS338R – MAY 2001 – REVISED APRIL 2015 Feature Description (continued) 7.3.4 Internal Current Limit The internal current limit circuit is used to protect the LDO against high-load current faults or shorting events. The LDO is not designed to operate in a steady-state current limit. During a current limit event, the LDO sources constant current. Therefore, the output voltage falls when load impedance decreases. NOTE if a current limit occurs and the resulting output voltage is low, excessive power is dissipated across the LDO, resulting in possible damage to the device. 7.3.5 Reverse Current The TPS715 PMOS-pass transistor has a built-in back diode that conducts current when the input voltage drops below the output voltage (for example, during power down). Current is conducted from the output to the input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting may be required. 7.4 Device Functional Modes Table 1 provides a quick comparison between the normal, dropout, and disabled modes of operation. Table 1. Device Functional Mode Comparison OPERATING MODE PARAMETER VIN IOUT Normal VIN > VOUT(nom) + VDO IOUT < ICL Dropout VIN < VOUT(nom) + VDO IOUT < ICL Disabled — — 7.4.1 Normal Operation The device regulates to the nominal output voltage under the following conditions: • The input voltage is greater than the nominal output voltage plus the dropout voltage (VOUT(nom) + VDO). • The output current is less than the current limit (IOUT < ICL). • The device junction temperature is less than 125°C. 7.4.2 Dropout Operation If the input voltage is lower than the nominal output voltage plus the specified dropout voltage, but all other conditions are met for normal operation, the device operates in dropout mode. In this mode, the output voltage tracks the input voltage. During this mode, the transient performance of the device becomes significantly degraded because the pass device is in the linear region and no longer controls the current through the LDO. Line or load transients in dropout can result in large output-voltage deviations. Submit Documentation Feedback Copyright © 2001–2015, Texas Instruments Incorporated Product Folder Links: TPS715 9 TPS715 SLVS338R – MAY 2001 – REVISED APRIL 2015 www.ti.com 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information The TPS715 family of LDO regulators has been optimized for ultralow-power applications such as the MSP430 microcontroller. The ultralow-supply current of the TPS715 device maximizes efficiency at light loads, and its high input voltage range makes it suitable for supplies such as unconditioned solar panels. 8.2 Typical Application VIN IN C1 0.1 mF TPS71533 OUT GND VOUT 0.47 mF Figure 12. Typical Application Circuit (Fixed-Voltage Version) OUTPUT VOLTAGE PROGRAMMING GUIDE VIN IN VOUT OUT TPS71501 R1 0.1mF GND CFB 0.47mF FB R2 R1 ö æ VOUT = VREF ´ ç 1 + ÷ è R2 ø OUTPUT VOLTAGE R1 R2 1.8 V 0.499 MW 1 MW 2.8 V 1.33 MW 1 MW 5.0 V 3.16 MW 1 MW Figure 13. TPS71501 Adjustable LDO Regulator Programming 8.2.1 Design Requirements 8.2.1.1 Power the MSP430 Microcontroller Several versions of the TPS715 are ideal for powering the MSP430 microcontroller. Table 2 shows potential applications of some voltage versions. Table 2. Typical MSP430 Applications DEVICE VOUT (TYP) TPS71519 1.9 V APPLICATION VOUT(min) > 1.8 V required by many MSP430s. Allows lowest power consumption operation. TPS71523 2.3 V VOUT(min) > 2.2 V required by some MSP430s flash operation. TPS71530 3V VOUT(min) > 2.7 V required by some MSP430s Flash operation. TPS715345 3.45 V VOUT(max) < 3.6 V required by some MSP430s. Allows highest speed operation. The TPS715 family offers many output voltage versions to allow designers to optimize the supply voltage for the MSP430, thereby minimizing the supply current consumed by the MSP430. 10 Submit Documentation Feedback Copyright © 2001–2015, Texas Instruments Incorporated Product Folder Links: TPS715 TPS715 www.ti.com SLVS338R – MAY 2001 – REVISED APRIL 2015 8.2.2 Detailed Design Procedure 8.2.2.1 External Capacitor Requirements Although not required, a 0.047-μF or larger input bypass capacitor, connected between IN and GND and located close to the device, is recommended to improve transient response and noise rejection of the power supply as a whole. A higher-value input capacitor may be necessary if large, fast-rise-time load transients are anticipated and the device is located several inches from the power source. The TPS715 requires an output capacitor connected between OUT and GND to stabilize the internal control loop. Any capacitor (including ceramic and tantalum) greater than or equal to 0.47 μF properly stabilizes this loop. X7R or X5R type capacitors are recommended due to their wider temperature spec and lower temperature coefficient, but other types of capacitors may be used. 8.2.2.2 Dropout Voltage (VDO) Generally speaking, the dropout voltage often refers to the voltage difference between the input and output voltage (VDO = VIN – VOUT). However, in the Electrical Characteristics, VDO is defined as the VIN – VOUT voltage at the rated current, where the pass-FET is fully on in the ohmic region of operation and is characterized by the classic RDS(on) of the FET. VDO indirectly specifies a minimum input voltage above the nominal programmed output voltage at which the output voltage is expected to remain within its accuracy boundary. If the input falls below this VDO limit (VIN < VOUT + VDO), then the output voltage decreases in order to follow the input voltage. Dropout voltage is always determined by the RDS(on) of the main pass-FET. Therefore, if the LDO operates below the rated current, then the VDO for that current scales accordingly. RDS(on) can be calculated using Equation 1: VDO RDS(ON) = IRATED (1) 8.2.2.3 Setting VOUT for the TPS71501 Adjustable LDO The TPS715 family contains an adjustable-version, TPS71501, which sets the output voltage using an external resistor divider as shown in Figure 13. The output voltage operating range is 1.2 V to 15 V, and is calculated using: R1 ö æ VOUT = VREF ´ ç 1 + ÷ è R2 ø where • VREF = 1.205 V (typical) (2) Resistors R1 and R2 should be chosen to allow approximately 1.5-μA of current through the resistor divider. Lower value resistors can be used for improved noise performance, but will consume more power. Higher resistor values should be avoided as leakage current into or out of FB across R1/R2 creates an offset voltage that is proportional to VOUT divided by VREF. The recommended design procedure is to choose R2 = 1 MΩ to set the divider current at 1.5 μA, and then calculate R1 using Equation 3: æV ö R1 = ç OUT - 1÷ ´ 2 V è REF ø (3) Figure 13 shows this configuration. Submit Documentation Feedback Copyright © 2001–2015, Texas Instruments Incorporated Product Folder Links: TPS715 11 TPS715 SLVS338R – MAY 2001 – REVISED APRIL 2015 www.ti.com 8.2.3 Application Curves VIN − Input Voltage − V 6 5 4 3 VIN 2 VOUT 1 0 0 2 4 6 8 10 12 14 t − Time − ms 16 18 20 VIN − Input Voltage − V VOUT = 3.3 V RL = 66 W COUT = 10 mF 7 VOUT − Output Voltage − V ∆VOUT − Change in Output Voltage − mV 8 50 0 −50 5.3 4.3 DVOUT - Change in Output Voltage - mV Figure 14. Power Up and Power Down IOUT - Output Current - mA VOUT = 3.3 V IOUT = 50 mA COUT = 10 mF 100 0 50 100 150 200 250 300 350 400 450 500 t − Time − ms Figure 15. Line Transient Response VIN = 4.3 V VOUT = 3.3 V COUT = 10 mF 400 200 0 -200 60 40 20 0 0 100 200 300 400 500 600 700 800 900 1000 ms t − Time − Figure 16. Load Transient Response 8.3 Do's and Don'ts Place at least one 0.47-µF capacitor as close as possible to the OUT and GND terminals of the regulator. Do not connect the output capacitor to the regulator using a long, thin trace. Connect an input capacitor as close as possible to the IN and GND terminals of the regulator for best performance. Do not exceed the absolute maximum ratings. 9 Power Supply Recommendations The TPS715 is designed to operate from an input voltage supply range between 2.5 V and 24 V. The input voltage range provides adequate headroom in order for the device to have a regulated output. This input supply must be well regulated. If the input supply is noisy, additional input capacitors with low ESR can help improve the output noise performance. 12 Submit Documentation Feedback Copyright © 2001–2015, Texas Instruments Incorporated Product Folder Links: TPS715 TPS715 www.ti.com SLVS338R – MAY 2001 – REVISED APRIL 2015 10 Layout 10.1 Layout Guidelines For best overall performance, place all circuit components on the same side of the printed-circuit-board and as near as practical to the respective LDO pin connections. Place ground return connections for the input and output capacitors as close to the GND pin as possible, using wide, component-side, copper planes. TI strongly discourages using vias and long traces to create LDO circuit connections to the input capacitor, output capacitor, or the resistor divider because that will negatively affect system performance. This grounding and layout scheme minimizes inductive parasitics, and thereby reduces load-current transients, minimizes noise, and increases circuit stability. A ground reference plane is also recommended and is either embedded in the PCB itself or located on the bottom side of the PCB opposite the components. This reference plane serves to assure accuracy of the output voltage and shield the LDO from noise. 10.2 Layout Example GND R2 NC CIN VIN GND FB TPS71501DCK IN R1 OUT COUT GND VOUT Figure 17. Example Layout for TPS71501DCK 10.3 Power Dissipation To ensure reliable operation, worst-case junction temperature should not exceed 125°C. This restriction limits the power dissipation the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than or equal to PD(max). The maximum-power-dissipation limit is determined using Equation 4: T max - TA PD(max) = J RqJA where • • • TJmax is the maximum allowable junction temperature RθJA is the thermal resistance junction-to-ambient for the package (see the Thermal Information table) TA is the ambient temperature The regulator dissipation is calculated using Equation 5: PD = (VIN - VOUT ) ´ IOUT (4) (5) For a higher power package version of the TPS715, see the TPS715A. Submit Documentation Feedback Copyright © 2001–2015, Texas Instruments Incorporated Product Folder Links: TPS715 13 TPS715 SLVS338R – MAY 2001 – REVISED APRIL 2015 www.ti.com 11 Device and Documentation Support 11.1 Device Support 11.1.1 Development Support 11.1.1.1 Evaluation Module An evaluation module (EVM) is available to assist in the initial circuit performance evaluation using the TPS715. The TPS71533EVM evaluation module (and related user's guide) can be requested at the TI website through the product folders or purchased directly from the TI eStore. 11.1.1.2 Spice Models Computer simulation of circuit performance using SPICE is often useful when analyzing the performance of analog circuits and systems. A SPICE model for the TPS715 is available through the product folders under Tools & Software. 11.1.2 Device Nomenclature Table 3. Device Nomenclature (1) VOUT (2) PRODUCT TPS715xx yyy z (1) (2) XX is nominal output voltage (for example, 28 = 2.8 V, 285 = 2.85 V, 01 = Adjustable). YYY is package designator. Z is package quantity. For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. Output voltages from 1.25 V to 5.4 V in 50-mV increments are available through the use of innovative factory EEPROM programming; minimum order quantities may apply. Contact factory for details and availability. 11.2 Documentation Support 11.2.1 Related Documentation For related documentation see the following: • TPS71533EVM LDO Evaluation Module User Guide, SLVU061 • TPS735: High Input Voltage, Micropower SON-Packaged, 80-mA LDO Linear Regulators, SBVS047 11.3 Trademarks All trademarks are the property of their respective owners. 11.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 11.5 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 14 Submit Documentation Feedback Copyright © 2001–2015, Texas Instruments Incorporated Product Folder Links: TPS715 PACKAGE OPTION ADDENDUM www.ti.com 15-Apr-2017 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) HPA00328DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 85 AQI HPA00423DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 ARB HPA00681DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 ARB TPS71501DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU | CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 ARB TPS71501DCKRG4 ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 ARB TPS71518DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 ARD TPS71518DCKRG4 ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 ARD TPS71519DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 BOX TPS71523DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU | CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 BNX TPS71525DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU | CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 AQL TPS71525DCKRG4 ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 AQL TPS71530DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU | CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 AQM TPS71530DCKRG4 ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 AQM TPS71533DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU | CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 AQI TPS71533DCKRG4 ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 AQI TPS715345DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 BNY TPS715345DCKRG4 ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 BNY Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 15-Apr-2017 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) TPS71550DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU | CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 T48 TPS71550DCKRG4 ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 T48 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com 15-Apr-2017 OTHER QUALIFIED VERSIONS OF TPS715 : • Automotive: TPS715-Q1 NOTE: Qualified Version Definitions: • Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 17-Feb-2015 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2.41 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 2.41 1.2 4.0 8.0 Q3 TPS71501DCKR SC70 DCK 5 3000 180.0 8.4 TPS71501DCKR SC70 DCK 5 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 TPS71518DCKR SC70 DCK 5 3000 180.0 8.4 2.41 2.41 1.2 4.0 8.0 Q3 TPS71519DCKR SC70 DCK 5 3000 180.0 8.4 2.41 2.41 1.2 4.0 8.0 Q3 TPS71523DCKR SC70 DCK 5 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 TPS71523DCKR SC70 DCK 5 3000 180.0 8.4 2.41 2.41 1.2 4.0 8.0 Q3 TPS71525DCKR SC70 DCK 5 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 TPS71525DCKR SC70 DCK 5 3000 180.0 8.4 2.41 2.41 1.2 4.0 8.0 Q3 TPS71530DCKR SC70 DCK 5 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 TPS71530DCKR SC70 DCK 5 3000 180.0 8.4 2.41 2.41 1.2 4.0 8.0 Q3 TPS71533DCKR SC70 DCK 5 3000 180.0 8.4 2.41 2.41 1.2 4.0 8.0 Q3 TPS71533DCKR SC70 DCK 5 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 TPS715345DCKR SC70 DCK 5 3000 180.0 8.4 2.41 2.41 1.2 4.0 8.0 Q3 TPS71550DCKR SC70 DCK 5 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 TPS71550DCKR SC70 DCK 5 3000 180.0 8.4 2.41 2.41 1.2 4.0 8.0 Q3 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 17-Feb-2015 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS71501DCKR SC70 DCK 5 3000 202.0 201.0 28.0 TPS71501DCKR SC70 DCK 5 3000 180.0 180.0 18.0 TPS71518DCKR SC70 DCK 5 3000 202.0 201.0 28.0 TPS71519DCKR SC70 DCK 5 3000 202.0 201.0 28.0 TPS71523DCKR SC70 DCK 5 3000 180.0 180.0 18.0 TPS71523DCKR SC70 DCK 5 3000 202.0 201.0 28.0 TPS71525DCKR SC70 DCK 5 3000 180.0 180.0 18.0 TPS71525DCKR SC70 DCK 5 3000 202.0 201.0 28.0 TPS71530DCKR SC70 DCK 5 3000 180.0 180.0 18.0 TPS71530DCKR SC70 DCK 5 3000 202.0 201.0 28.0 TPS71533DCKR SC70 DCK 5 3000 202.0 201.0 28.0 TPS71533DCKR SC70 DCK 5 3000 180.0 180.0 18.0 TPS715345DCKR SC70 DCK 5 3000 202.0 201.0 28.0 TPS71550DCKR SC70 DCK 5 3000 180.0 180.0 18.0 TPS71550DCKR SC70 DCK 5 3000 202.0 201.0 28.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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