MP6504 8V to 32V, 2A, Stepper Motor Driver with Integrated MOSFETs DESCRIPTION FEATURES The MP6504 is a stepper motor driver with a built-in microstepping translator. The MP6504 operates from a supply voltage of up to 32V and can deliver a motor current of up to 2A. The MP6504 can operate a bipolar stepper motor in full-, half-, quarter-, and eighth-step modes. The MP6504 has a fixed 3.3V reference output, which allows it to operate without a separate logic power supply. Full protection features include over-current protection (OCP), input over-voltage protection (OVP), under-voltage lockout (UVLO), and thermal shutdown. The MP6504 is available in a QFN-28 (4mmx5mm) package with an exposed thermal pad. Wide 8V to 32V Input Voltage Range Two Internal Full-Bridge Drivers Low On Resistance (HS: 220mΩ; LS: 220mΩ) No Control Power Supply Required Simple Logic Interface Compatible with 3.3V and 5V Logic Full-, Half-, Quarter-, and Eighth-Step Functionality 2A Maximum Output Current Adjustable Mixed Decay Ratio Over-Current Protection (OCP) Input Over-Voltage Protection (OVP) Function Thermal Shutdown and Under-Voltage Lockout (UVLO) Protection Fault Indication Output Available in a QFN-28 (4mmx5mm) Package APPLICATIONS Bipolar Stepper Motors Printers All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For MPS green status, please visit the MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION 3.3V VIN CPA 3P3VOUT MP6504 0.47µF CPB 100nF VCP nFAULT VIN nHOME 1µF VG 1µF STEP DIR MS1 MS2 µC nENBL nSLEEP AOUT1 Exposed GND Pad AOUT2 SENA SENA nRSET BOUT1 VREF BOUT2 MDS SENB ROSC 200kΩ MP6504 Rev. 1.0 5/17/2017 Motor SENB GND www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 1 MP6504 – 32V, 2A, MICROSTEPPING MOTOR DRIVER W/ INTEGRATED MOSFETS ORDERING INFORMATION Part Number* MP6504GV Package QFN-28 (4mmx5mm) Top Marking See Below * For Tape & Reel, add suffix –Z (e.g. MP6504GV–Z) TOP MARKING MPS: MPS prefix Y: Year code WW: Week code MP6504: Part number LLLLLL: Lot number PACKAGE REFERENCE GND VCP CPB CPA 3P3VOUT VREF 28 27 26 25 24 23 TOP VIEW VIN 1 22 MDS AOUT1 2 21 ROSC SENA 3 20 nHOME SENA 4 19 nFAULT AOUT2 5 18 STEP BOUT2 6 17 DIR SENB 7 16 MS1 SENB 8 15 MS2 9 10 11 12 13 14 VIN nSLEEP VG nRSET nENBL EXPOSED PAD ON BACKSIDE CONNECTED TO GND BOUT1 MP6504 QFN-28 (4mmx5mm) MP6504 Rev. 1.0 5/17/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 2 MP6504 – 32V, 2A, MICROSTEPPING MOTOR DRIVER W/ INTEGRATED MOSFETS ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance Supply voltage (VIN) ...................... -0.3V to 40V xOUTx voltage (VA/BOUT1/2) .............. -0.7V to 40V VCP, CPB .............................. VIN to VIN + 6.5V ESD rating (HBD) ........................................ 2kV SENA, SENB .......................................... 700mV All other pins to AGND (except for 3P3VOUT and VG) ........................................ -0.3V to 6.5V (2) Continuous power dissipation (TA = +25°C) ..................................................................3.1W Storage temperature ................ -55°C to +150°C Junction temperature ............................. +150°C Lead temperature (solder) ..................... +260°C QFN-28 (4mmx5mm) ............ 40 ........ 9 .... °C/W Recommended Operating Conditions (3) (4) θJA θJC NOTES: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation produces an excessive die temperature, causing and the regulator to go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB. Supply voltage (VIN) .......................... 8V to 32V Output current (IA,BOUT) .................................±2A Operating junction temp. (TJ). .. -40°C to +125°C MP6504 Rev. 1.0 5/17/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 3 MP6504 – 32V, 2A, MICROSTEPPING MOTOR DRIVER W/ INTEGRATED MOSFETS ELECTRICAL CHARACTERISTICS VIN = 24V, TA = +25°C, unless otherwise noted. Parameter Power Supply Input supply voltage Quiescent current Voltage Regulator 3P3VOUT reference output Internal MOSFETs Symbol VIN ISLEEP VIN = 24V, nENBL = 0, nSLEEP = 1, with no load VIN = 24V, nSLEEP = 0 V3P3 IOUT = 1mA IQ RHS Output on resistance RLS Body diode forward voltage Control Logic Input logic low threshold Input logic high threshold Condition VF Min Typ Max Units 8 24 32 V 7 10 mA 1 µA 3.3 3.45 V 0.22 0.25 0.22 0.25 0.35 Ω Ω Ω Ω V 3.2 VIN = 24V, IOUT = 1A, TJ = 25°C VIN = 24V, IOUT = 1A, TJ = 85°C VIN = 24V, IOUT = 1A, TJ = 25°C VIN = 24V, IOUT = 1A, TJ = 85°C IOUT = 1.5A VIL All logic pins VIH All logic pins IIN(H) VIH = 5V Logic input current IIN(L) VIL = 0.8V R Internal pull-down resistance All logic pins PD Home, nFault Outputs (Open-Drain Outputs) VOL IO = 5mA Output low voltage IOH VO = 3.3V Output high leakage current Protection Circuit VIN_RISE UVLO rising threshold (5) VHYS UVLO hysteresis VOVP Input OVP threshold ∆V Input OVP hysteresis OVP IOCP1 Sinking Over-current trip level IOCP2 Sourcing (5) tOCP Over-current deglitch time (5) Thermal shutdown TTSD (5) ∆TTSD Thermal shutdown hysteresis Current Control tOFF Rt = 200kΩ Constant off time tBLANK Blanking time HS off to LS on, or LS off to HS tDT Crossover dead time on IREF VREF = 3.3V VREF input current VREF = 3.3V, 100% (no switch in VTRIP SENx trip voltage test mode) VREF = 3.3V, 70% - 100% VREF = 3.3V, 38% - 64% ∆ITRIP Current trip accuracy VREF = 3.3V, 19% - 30% VREF = 3.3V, <10% fCP Charge pump frequency 0.35 1.3 0.6 2 -25 -8 25 8 530 6.5 36 3.5 3.5 20 0.5 1 V µA 7 970 37.9 600 6.75 6.75 1 165 30 7.7 V mV V mV A A µs °C °C 30 2 40 40 10 10 400 600 V V µA µA kΩ 645 -5 -10 -15 -20 525 µs µs ns 3.5 µA 700 mV 5 10 15 20 % % % % kHz NOTE: 5) Not tested in production. MP6504 Rev. 1.0 5/17/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 4 MP6504 – 32V, 2A, MICROSTEPPING MOTOR DRIVER W/ INTEGRATED MOSFETS TYPICAL CHARACTERISTICS MP6504 Rev. 1.0 5/17/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 5 MP6504 – 32V, 2A, MICROSTEPPING MOTOR DRIVER W/ INTEGRATED MOSFETS TYPICAL PERFORMANCE CHARACTERISTICS VIN = 24V, IOUT = 2.5A, TA = 25°C, FSTEP = 500Hz, resistor + inductor load: R = 3.3Ω, L = 1.5mH/channel, automatic decay, unless otherwise noted. MP6504 Rev. 1.0 5/17/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 6 MP6504 – 32V, 2A, MICROSTEPPING MOTOR DRIVER W/ INTEGRATED MOSFETS TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 24V, IOUT = 2.5A, TA = 25°C, FSTEP = 500Hz, resistor + inductor load: R = 3.3Ω, L = 1.5mH/channel, automatic decay, unless otherwise noted. MP6504 Rev. 1.0 5/17/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 7 MP6504 – 32V, 2A, MICROSTEPPING MOTOR DRIVER W/ INTEGRATED MOSFETS PIN FUNCTIONS Pin # 1, 10 2 Name VIN AOUT1 3, 4 SENA 5 6 AOUT2 BOUT2 7, 8 SENB 9 BOUT1 11 nSLEEP 12 VG 13 nRSET 14 nENBL 15 MS2 16 MS1 17 DIR 18 STEP 19 nFAULT 20 nHOME 21 ROSC 22 MDS 23 VREF 24 3P3VOUT 25 26 27 28, PAD CPA CPB VCP GND MP6504 Rev. 1.0 5/17/2017 Description Input supply voltage. Both VIN pins must be connected to the same supply. Bridge A output terminal 1. Bridge A sense resistor connector. Connect SENA to the current sensor resistor for bridge A. Bridge A output terminal 2. Bridge B output terminal 2. Bridge B sense resistor connector. Connect SENB to the current sensor resistor for bridge B. Bridge B output terminal 1. Sleep mode input. Drive nSLEEP logic low to enter low-power sleep mode; drive nSLEEP logic high for normal operation. nSLEEP has an internal pull-down resistor. Gate drive regulator output. Bypass VG to GND with a 1µF, 16V ceramic capacitor. Reset input. Drive nRSET logic low to initialize the translator and reset the internal logic; drive nRSET logic high for normal operation. nRSET has an internal pull-down resistor. Enable input. Drive nENBL logic high to disable the bridge outputs and translator operation; drive nENBL logic low to enable outputs and translator. nENBL has an internal pull-down resistor. Mode select. MS1 and MS2 set the step mode to full-, half-, quarter-, or eighth-step. MS1 and MS2 have internal pull-down resistors. See the Microstep Selection section on page 11 for more details. Direction input. The logic level applied to DIR sets the direction of motor rotation. DIR has an internal pull-down resistor. Step input. A rising edge on STEP sequences the translator and advances the motor by one increment. STEP has an internal pull-down resistor. Fault indication output. nFAULT is driven low when a fault condition (OCP, OVP, OTS) occurs. nFAULT is an open-drain output. If used, it requires an external pull-up resistor. Home position output. nHOME is driven low when the indexer is at the home position in the step table. nHOME an open-drain output. If used, it requires an external pull-up resistor. Constant off-time setting input. A resistor from ROSC to GND sets the PWM off time. Mixed decay setting. The voltage applied to the MDS input sets the PWM decay mode. See the Decay Modes section on page 11 for details. Reference voltage input. The voltage applied to the VREF input in conjunction with the current sense resistance defines the current through the motor. VREF can be connected to 3P3VOUT. 3.3V regulator output. 3P3VOUT is a 3.3V regulator output. Decouple 3P3VOUT with a 0.47μF, 6.3V ceramic capacitor to GND. Charge pump capacitor. Connect a 100nF ceramic capacitor between CPA and CPB. The capacitor must be rated for at least the voltage applied to VIN. Charge pump output. VCP requires a 1μF, 16V ceramic capacitor to VIN. Ground. Connect both GND and the exposed pad to ground directly. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 8 MP6504 – 32V, 2A, MICROSTEPPING MOTOR DRIVER W/ INTEGRATED MOSFETS BLOCK DIAGRAM VIN MP6504 VG LS Gate VIN Drive 0.47µ F Reference Regulator 3P3VOUT 3.3V VREF 1/5 µC Gate Driver CPA 100nF AOUT1 AOUT2 OCP nSLEEP nENBL SENA Control Logic ROSC PWM RSENSE Timer MDS 1µ F OCP nRSET Rt Charge Pump CPB Translator MS1 MS2 UVLO& OVP DAC nFAULT nHOME STEP DIR VCP Int Vcc VIN Blanking Time OCP Mixed Decay Gate Driver VIN BOUT1 Motor BOUT2 OCP SENB VREF 1/5 DAC RSENSE GND Figure 1: Functional Block Diagram MP6504 Rev. 1.0 5/17/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 9 MP6504 – 32V, 2A, MICROSTEPPING MOTOR DRIVER W/ INTEGRATED MOSFETS OPERATION The MP6504 is a bipolar stepper motor driver that integrates eight N-channel power MOSFETs arranged as two full bridges with translator logic to drive a bipolar stepper motor. The MP6504 can supply up to 2A of current over a wide 8V to 32V input voltage range. The MP6504 is designed to operate stepper motors in full-, half-, quarter-, and eighth-step modes. The current in each of the two output bridges is regulated with programmable, constant-off-time pulse-width modulation (PWM) control circuitry. At each step, the current for each full bridge is set by the value of its external current sense resistor, a reference voltage (VREF), and the output voltage of its DAC, which is controlled by the output of the translator. Stepping The motor is moved step-by-step by applying a series of pulses to the STEP input. A rising edge on STEP sequences the translator one increment in the direction set by the level of the DIR input. The translator controls the input to the DACs and the direction of the current flow in each winding. The amplitude of the step is determined by the state of the inputs MS1 and MS2 (see Table 2). Figure 2 and Table 1 show the timing requirements of the STEP, DIR, MS1, and MS2 inputs. tA tB STEP tC The motor winding currents are regulated by a programmable, constant-off-time, PWM, current control circuit, which operates as follows: 1. Initially, a diagonal pair of MOSFETs turns on so current flows through the motor winding. 2. The current increases in the motor winding, which is sensed by an external sense resistor (RSENSE). During the initial blanking time (tBLANK), the high-side MOSFET always turns on regardless of current limit detection. 3. When the voltage across RSENSE reaches the current regulation threshold, the internal current comparator either shuts off the highside MOSFET so the winding inductance current freewheels through the two low-side MOSFETs (slow decay), or turns on the opposite diagonal pair of MOSFETs so the current flows back to the input (fast decay). 4. The current continues decreasing for the constant off-time. 5. The cycle repeats. The constant off-time (toff) is determined by the selection of an external resistor (Rt). The off time for a given resistance can be approximated with Equation (1): tOFF (ns) 190 Rt (k) The full-scale (100%) current limit threshold can be calculated with Equation (2): IMax LIMIT tD (1) VREF 5 RSENSE (2) Figure 2: Input Logic Timing The DAC output reduces the VREF output to the current sense comparator in precise steps. The current at any given step (ITrip-LIMIT) can be calculated with Equation (3): Table 1: Input Logic Timing ITripLIMIT %ITripLIMITIMax LIMIT MSx, DIR Time Duration Step minimum high pulse width Step minimum low pulse width Set-up time, input change to STEP Hold time, input change to STEP MP6504 Rev. 1.0 5/17/2017 Symbol Typ. Unit tA 1 µs tB 1 µs tC 200 ns tD 200 ns (3) See Table 3 for %ITrip-LIMIT at each step. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 10 MP6504 – 32V, 2A, MICROSTEPPING MOTOR DRIVER W/ INTEGRATED MOSFETS Microstep Selection (MS1, MS2) The step mode is selected by the logic levels applied to the MS1 and MS2 input pins. The MP6504 supports full-, half-, quarter-, and eighth-step modes. nRSET, nSLEEP, and nENBL Operation When nRSET is driven logic low, the step table is reset to the home position (see Table 3). The STEP input signal is ignored while nRSET is low. Full-step mode has four states, with each motor winding driven with either 70.7% maximum positive current or 70.7% maximum negative current. This provides four steps per electrical rotation. Half-step provides eight steps per electrical rotation; quarter-step provides 16 steps per electrical rotation; eighth-step provides 32 steps per rotation. Refer to Table 3 and Figure 3 for details. Driving nSLEEP low puts the device into a low power sleep state. In this state, all inputs are ignored when nSLEEP is active low. When waking up from sleep mode, approximately 1ms of time must pass before issuing a STEP command to allow the internal circuitry to stabilize. Table 2 shows step modes selected for different settings of the MS1 and MS2 input pins. Table 2: Stepping Format MS2 L L H H MS1 L H L H Step Mode Full-step Half-step Quarter-step Eighth-step Note that the nRSET, nSLEEP, and nENBL inputs have internal pull-down resistors. Decay Modes During the PWM off time, the output can operate in slow, fast, or mixed decay mode, depending on the voltage level at the MDS input pin and any current change commanded by a STEP transition. If the voltage on the MDS input pin is less than 2.5V, then mixed decay mode with an adjustable fast decay ratio is selected. The time that the device operates in fast decay can be approximated with Equation (4): tFD Vmds (V) 0.4 t OFF (4) After this fast decay period (tFD), the MP6504 switches to slow decay mode for the remainder of the constant-off-time period. Note that if MDS is set to 0V (connected to ground), slow decay is used for the entire off time. If the voltage at the MDS input is greater than 2.8V, then automatic decay mode is selected. In automatic decay mode, if the commanded current level is equal to or higher than the level at the previous step, then slow decay is selected. If the current level is lower than the previous level, then mixed decay with a fixed 30% fast decay ratio is selected. MP6504 Rev. 1.0 5/17/2017 nENBL is used to control the output drivers. When nENBL is low, the output H-bridge outputs are enabled, and the rising edges on STEP are recognized. When nENBL is high, the H-bridge outputs are disabled, and the STEP input is ignored. Blanking Time There is usually a current spike during the switching transition caused by body diode reverse-recovery current or the distributed capacitance of the motor winding. This current spike requires filtering to prevent it from shutting down the high-side MOSFET prematurely. An internal fixed blanking time (tBLANK) blanks the output of the current sense comparator when the outputs are switched, which is also the minimum on time for the highside MOSFET. In automatic decay mode, if the current limit is reached within the blanking time, the mixed decay with 30% fast decay ratio is performed immediately after the blanking time. Charge Pump The MP6504 integrates an internal charge pump to generate a gate drive voltage for the high-side MOSFETs. The charge pump requires a 100nF ceramic capacitor rated for at least the voltage applied to VIN to be connected between CPA and CPB, and a 1µF, 16V ceramic capacitor connected between VCP and VIN. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 11 MP6504 – 32V, 2A, MICROSTEPPING MOTOR DRIVER W/ INTEGRATED MOSFETS Fault The MP6504 provides an nFAULT pin, which is driven low when a fault condition such as OCP, OTP, or OVP occurs. nFAULT is an open-drain output, so if it is used, an external pull-up resistor is required. When the fault condition is released, nFAULT is pulled to a high level by the external pull-up resistor. Over-Current Protection (OCP) The over-current protection (OCP) circuit limits the current through any MOSFET. If the overcurrent limit threshold is reached and lasts longer than the over-current deglitch time, all MOSFETs in the H-bridge are disabled, and nFAULT is driven low. The driver remains disabled for approximately 5ms, then is reenabled automatically. If this cycle repeats five times, the MP6504 shuts down. Over-Voltage Protection (OVP) If the input voltage on VIN is higher than the OVP threshold, the H-bridge output is disabled, and nFAULT is driven low. This protection is released when VIN drops to a safe level. Input UVLO Protection If the voltage on VIN falls below the undervoltage lockout (UVLO) threshold voltage at any time, all circuitry in the device is disabled, and the internal logic is reset. Operation resumes when VIN rises above the UVLO threshold. Thermal Shutdown If the die temperature exceeds safe limits, all MOSFETs in the H-bridge are disabled, and nFAULT is driven low. Once the die temperature has fallen to a safe level, operation resumes automatically. Over-current conditions on both the high- and low-side devices (i.e.: a short to ground, supply, or across the motor winding) result in an overcurrent shutdown. Note that OCP does not use the current sense circuitry used for PWM current control and is independent of the sense resistor value or VREF voltage. MP6504 Rev. 1.0 5/17/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 12 MP6504 – 32V, 2A, MICROSTEPPING MOTOR DRIVER W/ INTEGRATED MOSFETS Table 3: Step Table (Relative Current Level Sequence) EighthStep # QuarterStep # Half-Step # 1 2 3 4 *5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 1 1 Full-Step # 2 3 2 1 4 5 3 6 7 4 2 8 9 5 10 11 6 3 12 13 7 14 15 8 16 4 Phase A Current %ITrip-LIMIT (%) Phase B Current %ITrip-LIMIT (%) Step Angle (°C) 100.00 98.08 92.39 83.15 70.71 55.56 38.27 19.51 0.00 -19.51 -38.27 -55.56 -70.71 -83.15 -92.39 -98.08 -100.00 -98.08 -92.39 -83.15 -70.71 -55.56 -38.27 -19.51 0.00 19.51 38.27 55.56 70.71 83.15 92.39 98.08 0.00 19.51 38.27 55.56 70.71 83.15 92.39 98.08 100.00 98.08 92.39 83.15 70.71 55.56 38.27 19.51 0.00 -19.51 -38.27 -55.56 -70.71 -83.15 -92.39 -98.08 -100.00 -98.08 -92.39 -83.15 -70.71 -55.56 -38.27 -19.51 0.0 11.3 22.5 33.8 45.0 56.3 67.5 78.8 90.0 101.3 112.5 123.8 135.0 146.3 157.5 168.8 180.0 191.3 202.5 213.8 225.0 236.3 247.5 258.8 270.0 281.3 292.5 303.8 315.0 326.3 337.5 348.8 * The home position is at step angle 45°. MP6504 Rev. 1.0 5/17/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 13 nHOME MP6504 – 32V, 2A, MICROSTEPPING MOTOR DRIVER W/ INTEGRATED MOSFETS 70.7% IA 70.7% 70.7% IB 70.7% 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 nHOME Figure 3a: Full-Step Winding Current 100% 70.7% IA 70.7% 100% 100% 70.7% IB 70.7% 100% 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Figure 3b: Half-Step Winding Current MP6504 Rev. 1.0 5/17/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 14 nHOME MP6504 – 32V, 2A, MICROSTEPPING MOTOR DRIVER W/ INTEGRATED MOSFETS 100% 70.7% 38.3% IA 38.3% 70.7% 100% 100% 70.7% 38.3% IB 38.3% 70.7% 100% 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 nHOME Figure 3c: Quarter-Step Winding Current 100% 83.15% 70.71% 38.27% 19.51% IA 19.51% 38.27% 70.71% 83.15% 100% 100% 83.15% 70.71% 38.27% 19.51% IB 19.51% 38.27% 70.71% 83.15% 100% 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Figure 3d: Eighth-Step Winding Current MP6504 Rev. 1.0 5/17/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 15 MP6504 – 32V, 2A, MICROSTEPPING MOTOR DRIVER W/ INTEGRATED MOSFETS PACKAGE INFORMATION QFN-28 (4mmx5mm) 2.50 2.80 3.90 4.10 23 28 PIN 1 ID SEE DETAIL A PIN 1 ID MARKING 22 1 0.50 BSC PIN 1 ID INDEX AREA 3.50 3.80 4.90 5.10 0.18 0.30 8 15 0.35 0.45 TOP VIEW 14 9 BOTTOM VIEW PIN 1 ID OPTION A 0.30x45ºTYP. PIN 1 ID OPTION B R0.25 TYP. 0.80 1.00 0.20 REF 0.00 0.05 DETAIL A SIDE VIEW 3.90 NOTE: 2.70 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. 3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETER MAX. 4) DRAWING CONFORMS TO JEDEC MO-220, VARIATION VGHD-3. 5) DRAWING IS NOT TO SCALE. 0.70 0.25 0.50 3.70 4.90 RECOMMENDED LAND PATTERN NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP6504 Rev. 1.0 5/17/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 16