NSC DM74LS123M Dual retriggerable one-shot with clear and complementary output Datasheet

DM74LS123 Dual Retriggerable One-Shot
with Clear and Complementary Outputs
Y
General Description
Y
The DM74LS123 is a dual retriggerable monostable multivibrator capable of generating output pulses from a few nanoseconds to extremely long duration up to 100% duty cycle.
Each device has three inputs permitting the choice of either
leading edge or trailing edge triggering. Pin (A) is an activelow transition trigger input and pin (B) is an active-high transition trigger input. The clear (CLR) input terminates the output pulse at a predetermined time independent of the timing
components. The clear input also serves as a trigger input
when it is pulsed with a low level pulse transition (ß). To
obtain the best trouble free operation from this device
please read the operating rules as well as the NSC one-shot
application notes carefully and observe recommendations.
Y
Y
Compensated for VCC and temperature variations
Triggerable from CLEAR input
DTL, TTL compatible
Input clamp diodes
Functional Description
The basic output pulse width is determined by selection of
an external resistor (RX) and capacitor (CX). Once triggered,
the basic pulse width may be extended by retriggering the
gated active-low transition or active-high transition inputs or
be reduced by use of the active-low or CLEAR input. Retriggering to 100% duty cycle is possible by application of an
input pulse train whose cycle time is shorter than the output
cycle time such that a continuous ‘‘HIGH’’ logic state is
maintained at the ‘‘Q’’ output.
Features
Y
Y
DC triggered from active-high transition or active-low
transition inputs
Retriggerable to 100% duty cycle
Connection Diagram
Function Table
Dual-In-Line Package
Inputs
Outputs
CLEAR
A
B
Q
Q
L
X
X
H
H
X
H
X
L
X
X
L
v
u
L
L
L
L
É
É
É
H
H
H
ß
ß
ß
u
H
H
H e High Logic Level
L e Low Logic Level
X e Can Be Either Low or High
u e Positive Going Transition
v e Negative Going Transition
É e A Positive Pulse
ß e A Negative Pulse
TL/F/6386 – 1
Order Number DM74LS123M or DM74LS123N
See NS Package Number M16A or N16E
C1995 National Semiconductor Corporation
TL/F/6386
RRD-B30M105/Printed in U. S. A.
DM74LS123 Dual Retriggerable One-Shot
with Clear and Complementary Outputs
March 1991
Absolute Maximum Ratings (Note)
Note: The ‘‘Absolute Maximum Ratings’’ are those values
beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings.
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation.
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
Input Voltage
Operating Free Air Temperature Range
Storage Temperature
7V
7V
0§ C to a 70§ C
b 65§ C to a 150§ C
Recommended Operating Conditions
Symbol
Parameter
Min
Nom
Max
Units
4.75
5
5.25
V
0.8
V
High Level Output Current
b 0.4
mA
Low Level Output Current
8
mA
VCC
Supply Voltage
VIH
High Level Input Voltage
VIL
Low Level Input Voltage
IOH
IOL
tW
Pulse Width
(Note 6)
2
A or B High
REXT
External Timing Resistor
CEXT
External Timing Capacitance
CWIRE
Wiring Capacitance
at REXT/CEXT Terminal
TA
Free Air Operating Temperature
Electrical Characteristics
Symbol
Parameter
V
40
A or B Low
40
Clear Low
40
ns
5
260
No Restriction
0
kX
mF
50
pF
70
§C
over recommended operating free air temperature range (unless otherwise noted)
Conditions
Min
Typ
(Note 1)
Max
Units
b 1.5
V
VI
Input Clamp Voltage
VOH
High Level Output
Voltage
VCC e Min, II e b18 mA
VCC e Min, IOH e Max
VIL e Max, VIH e Min
VOL
Low Level Output
Voltage
VCC e Min, IOL e Max
VIL e Max, VIH e Min
0.35
0.5
IOL e 4 mA, VCC e Min
0.25
0.4
2.7
3.4
V
V
II
Input Current @ Max
Input Voltage
VCC e Max, VI e 7V
IIH
High Level Input Current
VCC e Max, VI e 2.7V
20
mA
IIL
Low Level Input Current
VCC e Max, VI e 0.4V
b 0.4
mA
IOS
Short Circuit
Output Current
VCC e Max
(Note 2)
b 100
mA
Supply Current
VCC e Max (Notes 3,4 and 5)
20
mA
ICC
0.1
b 20
12
mA
Note 1: All typicals are at VCC e 5V, TA e 25§ C.
Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 3: Quiescent ICC is measured (after clearing) with 2.4V applied to all clear and A inputs, B inputs grounded, all outputs open, CEXT e 0.02 mF, and
REXT e 25 kX.
Note 4: ICC is measured in the triggered state with 2.4V applied to all clear and B inputs, A inputs grounded, all outputs open, CEXT e 0.02 mF, and REXT e 25 kX.
Note 5: With all outputs open and 4.5V applied to all data and clear inputs, ICC is measured after a momentary ground, then 4.5V is applied to the clock.
Note 6: TA e 25§ C and VCC e 5V.
2
Switching Characteristics at VCC e 5V and TA e 25§ C
RL e 2 kX
Symbol
Parameters
From (Input)
To (Output)
CL e 15pF
CEXT e 0 pF, REXT e 5 kX
Min
Max
CL e 15pF
CEXT e 1000 pF, REXT e 10 KX
Min
Units
Max
tPLH
Propagation Delay Time
Low to High Level Output
A to Q
33
ns
tPLH
Propagation Delay Time
Low to High Level Output
B to Q
44
ns
tPHL
Propagation Delay Time
High to Low Level Output
A to Q
45
ns
tPHL
Propagation Delay Time
High to Low Level Output
B to Q
56
ns
tPLH
Propagation Delay Time
Low to High Level Output
Clear to Q
45
ns
tPHL
Propagation Delay Time
High to Low Level Output
Clear to Q
27
ns
tWQ(Min)
Minimum Width of Pulse
at Output Q
A or B to Q
200
ns
tW(out)
Output Pulse Width
A or B to Q
4
5
ms
Operating Rules
3. For CX ll 1000 pF the output pulse width (TW) is defined as follows:
TW e KRX CX
where [RX is in kX]
[CX is in pF]
[TW is in ns]
K & 0.37
1. An external resistor (RX) and an external capacitor (CX)
are required for proper operation. The value of CX may
vary from 0 to any necessary value. For small time constants high-grade mica, glass, polypropylene, polycarbonate, or polystyrene material capacitors may be used. For
large time constants use tantalum or special aluminum
capacitors. If the timing capacitors have leakages approaching 100 nA or if stray capacitance from either terminal to ground is greater than 50 pF the timing equations
may not represent the pulse width the device generates.
2. When an electrolytic capacitor is used for CX a switching
diode is often required for standard TTL one-shots to prevent high inverse leakage current. This switching diode is
not needed for the ’LS123 one-shot and should not be
used. In general the use of the switching diode is not
recommended with retriggerable operation.
Furthermore, if a polarized timing capacitor is used on the
’LS123 the negative terminal of the capacitor should be
connected to the ‘‘CEXT’’ pin of the device (Figure 1 ).
4. The multiplicative factor K is plotted as a function of CX
below for design considerations:
TL/F/6386 – 2
FIGURE 2
TL/F/6386 – 8
FIGURE 1
3
Operating Rules (Continued)
5. For CX k 1000 pF see Figure 3 for TW vs CX family
curves with RX as a parameter:
TL/F/6386 – 7
FIGURE 7
9. Under any operating condition CX and RX must be kept
as close to the one-shot device pins as possible to minimize stray capacitance, to reduce noise pick-up, and to
reduce I-R and Ldi/dt voltage developed along their
connecting paths. If the lead length from CX to pins (6)
and (7) or pins (14) and (15) is greater than 3 cm, for
example, the output pulse width might be quite different
from values predicted from the appropriate equations. A
non-inductive and low capacitive path is necessary to
ensure complete discharge of CX in each cycle of its
operation so that the output pulse width will be accurate.
10. The CEXT pins of this device are internally connected to
the internal ground. For optimum system performance
they should be hard wired to the system’s return ground
plane.
11. VCC and ground wiring should conform to good high-frequency standards and practices so that switching transients on the VCC and ground return leads do not cause
interaction between one-shots. A 0.01 mF to 0.10 mF
bypass capacitor (disk ceramic or monolithic type) from
VCC to ground is necessary on each device. Furthermore, the bypass capacitor should be located as close
to the VCC-pin as space permits.
TL/F/6386 – 3
FIGURE 3
6. To obtain variable pulse widths by remote trimming, the
following circuit is recommended:
TL/F/6386 – 4
FIGURE 4
Note: ‘‘Rremote’’ should be as close to the device pin as possible.
7. The retriggerable pulse width is calculated as shown below:
T e TW a tPLH e K c RX c CX a tPLH
The retriggered pulse width is equal to the pulse width
plus a delay time period (Figure 5).
For further detailed device characteristics and output performance
please refer to the NSC one-shot application note AN-372.
TL/F/6386 – 5
FIGURE 5
8. Output pulse width variation versus VCC and temperatures: Figure 6 depicts the relationship between pulse
width variation versus VCC, and Figure 7 depicts pulse
width variation versus temperatures.
TL/F/6386 – 6
FIGURE 6
4
Physical Dimensions inches (millimeters)
16-Lead Small Outline Molded Package
Order Number DM74LS123M
NS Package Number M16A
5
DM74LS123 Dual Retriggerable One-Shot
with Clear and Complementary Outputs
Physical Dimensions inches (millimeters) (Continued)
16-Lead Molded Dual-In-Line Package (N)
Order Number DM74LS123N
NS Package Number N16E
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