IDT F2910NBGP Constant impedance spst rf switch Datasheet

Constant Impedance K|Z| SPST RF
Switch 30 MHz to 8000 MHz
Description
F2910
Datasheet
Features
The F2910 is a high reliability, low insertion loss, 50 Ω absorptive
SPST RF switch designed for a multitude of wireless and RF
applications. This device covers a broad frequency range from
30 MHz to 8000 MHz. In addition to providing low insertion loss,
the F2910 also delivers excellent linearity and isolation
performance while providing a 50 Ω termination on RF2 in the
isolation mode. The F2910 includes a patent pending constant
impedance K|Z| feature for the RF2 port. K|Z| maintains near
constant impedance when switching RF ports and improves hot
switching ruggedness. K|Z| minimizes VSWR transients and
reduces phase and amplitude variations when switching.
Insertion Loss
0.58 dB at 2 GHz
High Isolation
51 dB at 2 GHz
High Linearity
IIP3 of 65 dBm
Wide Single Positive Supply Voltage Range
3.3 V and 1.8 V compatible control logic
Operating temperature -55 °C to +105 °C
2 mm x 2 mm 8-pin DFN package
The F2910 uses a single positive supply voltage supporting either
3.3 V or 1.8 V control logic.
Block Diagram
Competitive Advantage
Figure 1. Block Diagram
The F2910 provides constant impedance for one RF port during
transitions, improving a system’s hot-switching ruggedness. The
device also supports high power handling and high isolation.
Constant impedance K|Z| during switching transition
Low insertion loss
High isolation
Excellent linearity
Extended temperature range: -55 °C to +105 °C
Typical Applications
Base Station 2G, 3G, 4G
Portable Wireless
Repeaters and E911 systems
Digital Pre-Distortion
Public Safety Infrastructure
WIMAX Receivers and Transmitters
Military Systems, JTRS radios
RFID handheld and portable readers
Cable Infrastructure
Wireless LAN
Test / ATE Equipment
© 2016 Integrated Device Technology, Inc
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August 30, 2016
F2910 Datasheet
Pin Assignments
Figure 2. Pin Assignments for 2 mm x 2 mm x 0.9 mm 8-VFQFP-N – Top View
RF2
V1
VDD
RF1
8
7
6
5
EP
F2910
1
2
3
4
NC
GND
GND
NC
Pin Descriptions
Table 1. Pin Descriptions
Number
Name
1, 4
NC
2, 3
GND
5
RF1
6
VDD
7
8
V1
RF2
EP
Description
This pin may be connected to the paddle and can be grounded.
Ground. Also, internally connected to the ground paddle. Ground this pin as close to the device as
possible.
RF1 Port. Matched to 50 Ω in the insertion loss state only. If this pin is not 0 V DC, then an external
coupling capacitor must be used.
Power Supply. Bypass to GND with capacitors shown in the Typical Application Circuit as close as
possible to pin.
Logic control pin. See Table 6 for proper logic setting.
RF2 Port. Matched to 50 E. If this pin is not 0V DC, then an external coupling capacitor must be used.
Exposed Pad. Internally connected to GND. Solder this exposed pad to a PCB pad that uses multiple
ground vias to provide heat transfer out of the device and into the PCB ground planes. These multiple
ground vias are also required to achieve the specified RF performance.
© 2016 Integrated Device Technology, Inc
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August 30, 2016
F2910 Datasheet
Absolute Maximum Ratings
Stresses beyond those listed below may cause permanent damage to the device. Functional operation of the device at these or any other
conditions beyond those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
Table 2. Absolute Maximum Ratings
Parameter
Symbol
Minimum
Maximum
Units
VDD to GND
VDD
-0.3
V
V1 to GND
VLogic
-0.3
+6.0
Lower of
(VDD + 0.3V, 3.6V)
+0.3
33
23
30
+140
+150
+260
2000
(Class 2)
1000
(Class C3)
RF1, RF2 to GND
VRF
[a]
RF Input Power Port 1 or 2 Other port terminated into 50 Ω
PRF12
[a]
RF Input Power Port 1 in isolation Port 2 terminated into 50 Ω
PRF1_ISO
[a]
RF Input Power Port 2 in isolation Port 1 terminated into 50 Ω
PRF2_ISO
Maximum Junction Temperature
Tjmax
Storage Temperature Range
TST
Lead Temperature (soldering, 10s)
TLEAD
ElectroStatic Discharge – HBM
VESDHBM
(JEDEC/ESDA JS-001-2012)
ElectroStatic Discharge – CDM
VESDCDM
(JEDEC 22-C101F)
a. VDD = 2.7 V to 5.5 V, 30 MHz FRF 8000 MHz, Tc = 105°C, ZS = ZL = 50 ohms.
≤
© 2016 Integrated Device Technology, Inc
≤
3
-0.3
-65
V
V
dBm
°C
°C
°C
V
V
August 30, 2016
F2910 Datasheet
Recommended Operating Conditions
Table 3. Recommended Operating Conditions
Parameter
Power supply voltage
Logic Input High Threshold
Logic Input Low Threshold
Operating Temperature
Range
RF Frequency Range
RF Continuous
Input CW Power
(Non-Switched) [d]
RF Continuous
Input Power
(RF Hot Switching CW) [d]
Symbol
VDD
VIH
VIL
TCASE
Condition
Minimum
2.7 V ≤ VDD ≤ 5.5 V
Exposed Paddle Temperature
FRF
PRF
PRFSW
RF1 or RF2 as the input Tc = 85 ºC
(Insertion loss state)
Tc = 105 ºC
Tc = 85 ºC
RF1 as the input
(Isolation state)
Tc = 105 ºC
Tc = 85 ºC
RF2 as the input
(Isolation state)
Tc = 105 ºC
Applied to RF2 input
switching between
Insertion loss to
Isolation states
Typical
Maximum
Units
2.7
1.1 [a]
-0.3 [b]
5.5
Lower of (VDD, 3.6)
0.6
V
V
V
-55
+105
°C
30
8000 [c]
30
27
20
17
27
24
MHz
Tc = 85 ºC
24
Tc = 105 ºC
21
dBm
dBm
RF1/2 Port Impedance
ZRFx Insertion loss state
50
E
RF2 Port Impedance
ZRFx Isolation state
50
E
a. Items in min/max columns in bold italics are Guaranteed by Test.
b. Items in min/max columns that are not bold/italics are Guaranteed by Design Characterization.
c. To achieve best performance from 5 – 8 GHz, the use of bypass capacitors as described in the Applications Circuit section is
required.
d. Levels based on: VDD = 2.7 V to 5.5 V, 30 MHz FRF 8000 MHz, ZS = ZL = 50 ohms. See Figure 3 for power handling
derating vs RF frequency.
≤
≤
Figure 3. Maximum RF Input Operating Power vs. RF Frequency
© 2016 Integrated Device Technology, Inc
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August 30, 2016
F2910 Datasheet
Electrical Characteristics
Table 4. Electrical Characteristics
Typical Application Circuit: VDD = 3.3 V, TCASE = +25 °C, FRF = 2 GHz, Driven Port = RF2, Input power = 0 dBm, ZS = ZL = 50 E. PCB board
trace and connector losses are de-embedded unless otherwise noted. IIP2 / IIP3: PIN = 13 dBm / tone, 50 MHz spacing. Performance
beyond 5 GHz based on application circuit (Figure 20) using best RF PCB design practices. See note c for details.
Parameter
Logic Current
DC Current
Symbol
Condition
Min
IIH, IIL
IDD
Typ
-1
Max
Units
+1
µA
VDD =3.3 V
190
VDD =5.0 V
220
374
0.03 GHz
0.35 GHz
1.0 GHz
2.0 GHz
0.38
0.44
0.50
0.70 [b]
0.55
0.60
0.67
0.75
0.80 [c]
1.00 [c]
1.55 [c]
85
73
61
51
46
41
37
33 [c]
29 [c]
26 [c]
3.3:1
2.0:1
27
25
20
18
20 [c]
25 [c]
13 [c]
304
[a]
µA
0.80
0.85
0.90
1.00
3.0 GHz
dB
4.0 GHz
5.0 GHz
6.0 GHz
7.0 GHz
8.0 GHz
0.03 GHz
0.35 GHz
66
1.0 GHz
55
2.0 GHz
45
3.0 GHz
40
Isolation
ISO
dB
4.0 GHz
35
5.0 GHz
30
6.0 GHz
7.0 GHz
8.0 GHz
Insertion Loss to Isolation
Max RF2 Port
VSWR
VSWR During Switching
Isolation to Insertion Loss
2.0 GHz
3.0 GHz
4.0 GHz
RF1, RF2 Return Loss
RFRL
5.0 GHz
dB
(Insertion Loss State)
6.0 GHz
7.0 GHz
8.0 GHz
a. Items in min/max columns in bold italics are Guaranteed by Test.
b. Items in min/max columns that are not bold/italics are Guaranteed by Design Characterization.
c. To achieve performance beyond 5 GHz, the use of bypass capacitors (BOM C2, C3, and C5) installed close to the device as
embodied in the evaluation board per the application circuit (Figure 20) is required. See the appropriate Typical Operating
Conditions graphs.
Insertion Loss
IL
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F2910 Datasheet
Electrical Characteristics (Cont.)
Typical Application Circuit: VDD = 3.3 V, TCASE = +25 °C, FRF = 2 GHz, Driven Port = RF2, Input power = 0 dBm, ZS = ZL = 50 E. PCB board
trace and connector losses are de-embedded unless otherwise noted. IIP2 / IIP3: PIN = 13 dBm / tone, 50 MHz spacing. Performance
beyond 5 GHz based on application circuit (Figure 20) using best RF PCB design practices. See note c for details.
Parameter
Symbol
RF2 Return Loss
(Isolation State)
RFRLT
Input 1dB Compression [d]
ICP1dB
Input 0.1dB Compression [d]
ICP0.1dB
Input IP2 [e]
IIP2
Input IP3 [e]
IIP3
Non-RF Driven Spurious [f]
Switching Time [g]
Maximum Switching Rate
d.
e.
f.
g.
TSW
2.0 GHz
3.0 GHz
4.0 GHz
5.0 GHz
6.0 GHz
7.0 GHz
8.0 GHz
0.03 GHz
3.0 GHz
4.0 GHz
0.03 GHz
3.0 GHz
4.0 GHz
F1 = 0.35 GHz F2 = 0.40 GHz
F1 = 0.95 GHz F2 = 1.00 GHz
F1 = 2.40 GHz F2 = 2.45 GHz
0.03 GHz
0.35 GHz
1.00 GHz
2.40 GHz
Any port when externally terminated into 50 E
50% control to 90% RF
50% control to 10% RF
50% control to RF settled to within +/- 0.1 dB
of insertion loss value
SWRATE
Minimum
Typical
27
27
25
20
15 [c]
12 [c]
10 [c]
34
35
35
33
34
34
123
124
118
65
65
68
67
-102
265
225
Maximum
dBm
dBm
dBm
dBm
dBm
500
500
© 2016 Integrated Device Technology, Inc
6
ns
280
25
VIDFT
Units
dB
kHz
Peak transients during switching. Rise Time
25
Measured with 20 ns risetime,
Fall Time
45
0 to 3.3 V control pulse
Items in min/max columns in bold italics are Guaranteed by Test.
Items in min/max columns that are not bold/italics are Guaranteed by Design Characterization.
To achieve performance beyond 5 GHz, the use of bypass capacitors (BOM C2, C3, and C5) installed close to the device as
embodied in the evaluation board per the application circuit (Figure 20) is required. See the appropriate Typical Operating
Conditions graphs.
The input 0.1 and 1 dB compression point is a linearity figure of merit. Refer to Absolute Maximum Ratings section for the
maximum RF input power.
RF1 or RF2 driven IIP2 / IIP3 results when in insertion loss state. IP2 Frequency = F1 + F2.
Spurious due to on-chip negative voltage generator. Spurious fundamental is approximately 5.7 MHz.
FRF = 1 GHz.
Maximum Video Feed-through
on RF Ports
a.
b.
c.
SpurMAX
Condition
mVpp
August 30, 2016
F2910 Datasheet
Thermal Characteristics
Table 5. Package Thermal Characteristics
Parameter
Junction to Ambient Thermal Resistance.
Junction to Case Thermal Resistance.
(Case is defined as the exposed paddle)
Moisture Sensitivity Rating (Per J-STD-020)
Symbol
Value
Units
θJA
159.5
°C/W
θJC
15.1
°C/W
MSL 1
Typical Operating Conditions (TOC)
Unless otherwise noted:
VDD = 3.3 V.
ZL = ZS = 50 Ohms Single Ended.
FRF = 2 GHz.
PIN = 13 dBm / tone applied to RF2 port for two tone linearity tests.
Two tone frequency spacing = 50 MHz.
All temperatures are referenced to the exposed paddle.
Evaluation Kit traces and connector losses are de-embedded.
Performance beyond 5 GHz as listed in the Electrical Characteristics is based on the application circuit (Figure 20) with bypass capacitors
(BOM C2, C3, and C5) installed. The capacitors must be installed in close proximity to the device as embodied in the evaluation board
with best practices followed for PCB design. Performance above 5 GHz de-rated as shown in Typical Performance Characteristics plots
Figure 10 to Figure 13 when application circuit with bypass capacitors is not utilized.
Unless otherwise noted, C2, C3 and C5 are installed in following plots.
© 2016 Integrated Device Technology, Inc
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F2910 Datasheet
Typical Performance Characteristics
Insertion Loss vs. Frequency over
Temperature
Figure 5.
0.0
-20
-0.5
-30
Isolation (dB)
Insertion Loss (dB)
Figure 4.
-1.0
-1.5
-2.0
Isolation vs. Frequency over
Temperature
-40
-50
-60
-70
-2.5
-80
-55C
-3.0
-55C
-90
25C
25C
105C
105C
-3.5
0
2000
4000
6000
8000
-100
10000
0
2000
Frequency (MHz)
6000
8000
10000
Frequency (MHz)
Return Loss vs. Frequency over
Temp [RF1 Insertion Loss State]
Figure 7.
0
0
-5
-5
-10
-10
Return Loss (dB)
Return Loss (dB)
Figure 6.
4000
-15
-20
-25
-30
Return Loss vs. Frequency over
Temp [RF2 Insertion Loss State]
-15
-20
-25
-30
-35
-35
-55C
-55C
-40
-40
25C
25C
105C
105C
-45
-45
0
2000
4000
6000
8000
0
10000
2000
Frequency (MHz)
Figure 8.
4000
6000
8000
10000
Frequency (MHz)
Return Loss vs. Frequency over
Temperature [RF2 Terminated State]
Figure 9.
Evaluation Board Loss vs. Frequency
0
0
-0.1
-5
-10
-0.3
Loss (dB)
Return Loss (dB)
-0.2
-15
-20
-0.4
-0.5
-0.6
-0.7
-25
-0.8
-55C
-30
25C
-55C
25C
-0.9
105C
105C
-1
-35
0
2000
4000
6000
8000
0
10000
© 2016 Integrated Device Technology, Inc
2000
4000
6000
8000
10000
Frequency (MHz)
Frequency (MHz)
8
August 30, 2016
F2910 Datasheet
Typical Performance Characteristics
Figure 11. Isolation vs. Frequency With and
Without Capacitors
0.0
-20
-0.5
-30
-40
-1.0
Isolation (dB)
Insertion Loss (dB)
Figure 10. Insertion Loss vs. Frequency With
and Without Capacitors
-1.5
-2.0
-2.5
-50
-60
-70
-80
w/C2, C3 and C5 installed
-3.0
w/C2, C3 and C5 installed
-90
w/C2, C3 and C5 removed
-3.5
w/C2, C3 and C5 removed
-100
0
2000
4000
6000
8000
10000
0
2000
Frequency (MHz)
Figure 12. Return Loss vs. Frequency With and
Without Capacitors
6000
8000
10000
Figure 13. Return Loss vs. Frequency With and
Without Capacitors [State 0]
-5
-5
-10
-10
Return Loss (dB)
Return Loss (dB)
4000
Frequency (MHz)
-15
-20
-25
-30
w/C2, C3 and C5 installed
-35
-15
-20
-25
w/C2, C3 and C5 installed
-30
w/C2, C3 and C5 removed
w/C2, C3 and C5 removed
-40
-35
0
2000
4000
6000
8000
10000
0
2000
Frequency (MHz)
4000
6000
8000
10000
Frequency (MHz)
Figure 14. Input IP3 vs. Frequency
Figure 15. 1 dB Compression at 3 GHz
80
1
78
0.5
Compression (dB)
76
IIP3 (dBm)
74
72
70
68
66
64
-55C
0
-0.5
-1
-1.5
-55C
25C
62
25C
105C
105C
60
-2
0
500
1000
1500
2000
2500
18
Frequency (MHz)
© 2016 Integrated Device Technology, Inc
20
22
24
26
28
30
32
34
36
Input Power (dBm)
9
August 30, 2016
F2910 Datasheet
Typical Performance Characteristics
Figure 16. Switching Time Isolation to Insertion
loss
© 2016 Integrated Device Technology, Inc
Figure 17. Switching Time Insertion Loss to
Isolation
10
August 30, 2016
F2910 Datasheet
Evaluation Kit Picture
Figure 18. Top View
Figure 19. Bottom View
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August 30, 2016
F2910 Datasheet
Control Mode
Table 6. Switch Control Truth Table
V1
(Logic)
State
Port Match
0
1
Isolation
Insertion Loss
RF1 port reflective, RF2 port terminated into 50 ohms
RF1 and RF2 port matched to 50 ohm
Evaluation Kit / Applications Circuit
Figure 20. Electrical Schematic
Note: The use of bypass capacitors C2, C3, and C5 as listed in the BOM (Table 7) is required to achieve performance as listed in the
Electrical Characteristics for frequencies beyond 5 GHz. The capacitors must be installed in close proximity to the device as embodied in the
evaluation board with best practices followed for PCB design.
© 2016 Integrated Device Technology, Inc
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F2910 Datasheet
Table 7. Bill of Material (BOM)
Part Reference
QTY
Description
Manufacturer Part #
Manufacturer
C1
1
0.1 µF ±10%, 16V, X7R, Ceramic Capacitor (0402)
GRM155R71C104KA88D
Murata
C2
1
0.5 pF ±0.1 pF, 50V, C0G, Ceramic Capacitor (0402)
GJM1555C1HR50BB01
Murata
C3
1
4.5 pF ±0.1 pF, 50V, C0G, Ceramic Capacitor (0402)
GJM1555C1H4R5BB01D
Murata
C4
0
Not Installed (0402)
C5
1
4.9 pF ±0.1 pF, 50V, C0G, Ceramic Capacitor (0402)
GJM1555C1H4R9BB01
Murata
R1
R2
1
1
15k E ±1%, 1/10W, Resistor (0402)
18k E ±1%, 1/10W, Resistor (0402)
ERJ-2RKF1502X
ERJ-2RKF1802X
Panasonic
Panasonic
R3, R4
2
0 E 1/10W, Jumper (0402)
ERJ-2GE0R00X
Panasonic
J1 – J4
4
SMA Edge Mount
142-0761-881
Cinch Connectivity
J5
1
CONN HEADER VERT 4x2 POS GOLD
67997-108HLF
Amphenol FCI
TP1
0
Not Installed (Red Test Point Loop)
TP2, TP3
0
Not Installed (Black Test Point Loop)
U1
1
SPST Switch 2 mm x 2 mm 8 pin DFN
F2910NBGP
IDT
1
Printed Circuit Board
F2910 EVKIT REV 01
IDT
© 2016 Integrated Device Technology, Inc
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August 30, 2016
F2910 Datasheet
Evaluation Kit Operation
Default Start-up
Control pins include no internal pull-down resistors to logic LOW or pull-up resistors to logic HIGH.
Power Supplies
A common VCC power supply should be used for all pins requiring DC power. All supply pins should be bypassed with external capacitors to
minimize noise and fast transients. Supply noise can degrade noise figure and fast transients can trigger ESD clamps and cause them to fail.
Supply voltage change or transients should have a slew rate smaller than 1 V / 20 µs. In addition, all control pins should remain at 0 V
(± 0.3 V) while the supply voltage ramps or while it returns to zero.
Control Pin Interface
If control signal integrity is a concern and clean signals cannot be guaranteed due to overshoot, undershoot, ringing, etc., the following circuit
at the input of each control pin is recommended. This applies to control pin 7 as shown in Figure 21. If bypass capacitor C5 as described in
the application circuit (Figure 20) is used to achieve high frequency performance optimization, the use of an additional 2 pF capacitor as
shown in Figure 21 is not necessary.
Figure 21. Control Pin signal integrity improvement circuit
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August 30, 2016
F2910 Datasheet
External Supply Setup
Set up a VCC power supply in the voltage range of 2.7 V to 5.5 V with the power supply output disabled.
Logic Control Setup
Using the EVKIT to manually set the control logic:
On connector J5, connect a 2-pin shunt from VCC (pin 3) to VLOGIC (pin 4). This connection provides the VCC voltage supply to the Eval Board
logic control pull-up network. Resistors R1 and R2 form a voltage divider to set the VIH level over the 2.7 V to 5.5 V VCC range for manual
logic control.
Connector J5 has one logic input pin: V1 (pin 5). See Table 6 for Logic Truth Table. With the pull-up network enabled (as noted above) this
pin can be left open to provide a logic high through pull-up resistor R1. To set a logic low for V1, connect a 2-pin shunt on J5 from VCTL (pin 5)
to GND (pin 6).
Note that when using the on board R1/R2 voltage divider, the current draw from the VCC supply will be higher by approximately VCC / 33 kΩ.
Using external control logic:
Pins 3, 4, 6, 7, and 8 of J5 should have no external connections. External logic control is applied to J5 V1 (pin 5). See Table 5 for the Logic
Truth Table.
Turn On Procedure
Setup the supplies and EVKIT as noted in the External Supply Setup and Logic Control Setup sections above.
Enable the VCC supply.
Set the desired logic setting to achieve the desired Table 5 configuration. Note that external control logic should not be applied without VCC
being present.
Turn Off Procedure
Set the logic control to a logic low.
Disable the VCC supply.
© 2016 Integrated Device Technology, Inc
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F2910 Datasheet
Package Drawings
Figure 22. Package Outline Drawing
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August 30, 2016
F2910 Datasheet
Recommended Land Pattern
Figure 23. Recommended Land Pattern
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F2910 Datasheet
Ordering Information
Orderable Part Number
Package
MSL Rating
Shipping Packaging
Temperature
F2910NBGP
F2910NBGP8
F2910EVBI
2 x 2 x 0.9 mm 8-VFQFP-N
2 x 2 x 0.9 mm 8-VFQFP-N
Evaluation Board
MSL1
MSL1
Bulk
Tape and Reel
-55° to +105°C
-55° to +105°C
Marking Diagram
1. Line 1 is the part number.
2. Line 2 – “6” is last digit of the year.
3. Line 2 – “U” is the workweek code
4. Line 2 – AG is the sequential code
© 2016 Integrated Device Technology, Inc
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August 30, 2016
F2910 Datasheet
Revision History
Revision Date
2016-Aug-29
Description of Change
Initial Release
Corporate Headquarters
Sales
Tech Support
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1-800-345-7015 or 408-284-8200
Fax: 408-284-2775
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operating parameters of the described products are determined in an independent state and are not guaranteed to perform the same way when installed in customer products. The information contained herein is provided
without representation or warranty of any kind, whether express or implied, including, but not limited to, the suitability of IDT's products for any particular purpose, an implied warranty of merchantability, or non-infringement of
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August 30, 2016