Micrel MIC2564A-1BSM Dual serial pcmcia/cardbus power controller preliminary information Datasheet

MIC2564A
Micrel
MIC2564A
Dual Serial PCMCIA/CardBus Power Controller
Preliminary Information
General Description
Features
The MIC2564A is dual-slot PC Card (PCMCIA) and CardBus
power controller. It is a sophisticated power switching matrix
that controls VCC and VPP voltages to two PC Card slots. The
MIC2564A is used in conjunction with a serial-data output
logic controller using the standard three-wire serial control
data format.
•
•
•
•
•
•
•
•
•
•
•
•
When connected to 3.3V, 5V, and 12V system power supplies, the MIC2564A can switch its VCC outputs between 0V,
3.3V, 5.0V, and high-impedance states and VPP outputs
between 0V, 3.3V, 5V, 12V, and high-impedance states. The
VCC outputs will supply a minimum of 1A current to the socket
and the VPP outputs will supply a minimum of 120mA to the
socket. Voltage rise and fall times are well controlled. The
MIC2564A also features an efficient standby (sleep) mode at
0.3µA typical quiescent current.
12V and 5V supplies are not required for MIC2564A operation making it possible to omit one or both supplies when they
are not needed by the system. An internal charge pump
supplies the internal bias voltages required for high-performance switching.
The MIC2564A is protected by overtemperature shutdown,
and protects itself and the system with current limiting and
cross-conduction lockout.
Standard 3-wire serial control data input
Controls two card slots from one surface mount device
High-efficiency, low-resistance switches
12V supply optional (not required by MIC2564A)
Current limit and overtemperature shutdown
Ultralow 1µA-typical standby power consumption
Cross-conduction lockout (no switching transients)
Break-before-make switching
1A minimum VCC output per slot
Independent VCC and VPP voltage output (MIC2564A-1)
120mA minimum VPP output current per slot
24-pin surface-mount SSOP and TSSOP packages
Applications
•
•
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PC Card and CardBus power control
Zoom Video port power control
Wireless communications
Bar code data collection systems
Docking stations (portable and desktop)
Power supply management
Ordering Information
Part Number
The MIC2564A is available in 24-pin SSOP and 24-pin
TSSOP.
Temperature Range
Package
MIC2564A-0BSM
–40°C to +85°C
24-pin SSOP
MIC2564A-1BSM
–40°C to +85°C
24-pin SSOP
MIC2564A-0BTS
–40°C to +85°C
24-pin TSSOP
MIC2564A-1BTS
–40°C to +85°C
24-pin TSSOP
Typical Application
Slot A
Address and data lines
between logic controller and
PCMCIA cards not shown.
System Power Supply
(OPTIONAL)
(OPTIONAL)
12V
5V
3.3V
VPP1
VPP2
PCMCIA
Card
A
VCC
System Reset
VPP IN
(OPTIONAL)
Dual-Slot
Logic Controller
PCMCIA,
CardBus,
or Zoom Video
VCC3 IN
VCC5 IN
(OPTIONAL)
Slot B
A VPP OUT
RST#
MIC2564A
Power
Serial Controller
Control
Bus
GND
A VCC OUT
B VPP OUT
B VCC OUT
VPP1
VPP2
PCMCIA
Card
B
VCC
Motherboard
PCMCIA Card Power Management Application
Micrel, Inc. • 1849 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 944-0970 • http://www.micrel.com
September 1999
1
MIC2564A
MIC2564A
Micrel
Pin Configuration
VCC5 IN
1
24
A VCC OUT
A VCC OUT
2
23
VCC3 IN
VCC5 IN
3
22
A VCC OUT
A FLAG
4
21
GND
SDA
5
20
A VPP OUT
SCL
6
19
VPP IN
RST#
7
18
VPP IN
SLA
8
17
B VPP OUT
B FLAG
9
16
GND
VCC5 IN
10
15
B VCC OUT
B VCC OUT
11
14
VCC3 IN
VCC5 IN
12
13
B VCC OUT
24-lead SSOP (SM)
24-lead TSSOP (TS)
Pin Description
Pin Number
Pin Name
1,3,10,12
VCC5 IN
2,22,24
A VCC OUT
4
A FLAG
5
SDA
Serial Data (Input)
6
SCL
Serial Clock (Input)
7
RST#
8
SLA
9
B FLAG
11,13,15
B VCC OUT
14,23
VCC3 IN
16,21
GND
17
B VPP OUT
18,19
VPP IN
20
A VPP OUT
MIC2564A
Pin Function
5V Supply Input: Optional system power supply connection. Required only
for 5V VCC and VPP output voltage.
Slot A VCC Output: Pins 2, 22, and 24 must be externally connected
together.
Channel A VCC and VPP Output Monitor (Output): Low on error condition.
System Reset (Input): Active low signal deactivates the MIC2564A, clearing
the serial registers and forcing the four power outputs to 0V (GND).
Serial Data Latch (Input)
Channel B VCC and VPP Output Monitor (Output): Low on error condition.
Slot B VCC Output: Pins 11, 13, and 15 must be externally connected
together.
3.3V Supply Input: Required system power supply connection. Powers 3.3V
VCC and VPP outputs and all internal circuitry.
Ground
Slot B VPP Output
12V Supply Input: Optional system power supply connection. Required only
for 12V VPP output voltage.
Slot A VPP Output
2
September 1999
MIC2564A
Micrel
Absolute Maximum Ratings (Note 1)
Operating Ratings (Note 2)
VPP IN ...................................................................... +13.6V
VCC3 IN ....................................................................... +6.0V
VCC5 IN ....................................................................... +6.0V
VSCL, VSDA, VSLA, VRST# .................................... –0.3V to +6.0V
VA FLAG, VB FLAG ....................................................... +6.0V
A or B VPP OUT ....................... >120mA, Internally Limited
A or B VCC OUT .............................. >1A, Internally Limited
Power Dissipation at TA ≤ 25°C (PD) ....... Internally Limited
Storage Temperature ............................... –65°C to +150°C
Lead Temperature (5 sec.) ...................................... +260°C
ESD Rating, Note 3
VPP IN ............................................................ 0V to +13.2V
VCC3 IN ........................................................ +3.0V to +5.5V
VCC5 IN ............................................................. 0V to +5.5V
VSCL, VSDA, VSLA, VRST# ................................. 0V to +5.5V
A or B VPP OUT ................................................ 0 to 120mA
A or B VCC OUT ....................................................... 0 to 1A
Clock Frequency ................................................. 0 to 2MHz
Ambient Temperature (TA) ......................... –40°C to +85°C
Junction Temperature (TJ) ...................................... +125°C
Package Thermal Resistance (θJA)
SSOP .............................................................. 90˚C/W
TSSOP ............................................................ 83˚C/W
Electrical Characteristics
VCC3 IN = 3.3V, VCC5 IN = 5.0V, VPP IN = 12V; TA = 25°C, bold indicates –40°C ≤ TA ≤ +85°C; unless noted.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
IPP OUT
Hi-Z
High Impedance Output
Leakage Current
shutdown mode
VPP OUT = 0V
1
10
µA
IPPSC
Short Circuit Current Limit
VPP OUT = 0V, normal mode, Note 4
260
400
mA
RO
Switch Resistance
VPP OUT = 5V selected,
IPP OUT = –100mA (sourcing)
1.6
5
Ω
VPP OUT = 3.3V selected,
IPP OUT = –100mA (sourcing)
1.3
5
Ω
VPP OUT = 12V selected, VPP IN = 12V,
IPP OUT = –100 mA (sourcing)
1.3
2.3
Ω
2000
5000
Ω
VPP OUT = Hi-Z to 10% of 3.3V, RL = 100Ω
1
100
µs
t2
VPP OUT = Hi-Z to 10% of 5V, RL = 100Ω
1
100
µs
t3
VPP OUT = Hi-Z to 10% of 12, RL = 100Ω
50
250
µs
VPP Output
120
VPP OUT = 0V [ground] selected,
IPP OUT = 50µA (sinking)
VPP Switching Time (See Figure 2)
t1
Output Turn-On Delay, Note 5
VPP OUT = 10% to 90% of 3.3, RL = 100Ω
10
100
500
µs
t5
VPP OUT = 10% to 90% of 5, RL = 100Ω
10
250
1000
µs
t6
VPP OUT = 10% to 90% of 12, RL = 100Ω
10
100
500
µs
VPP OUT = 3.3V to 90% of 12V, RL = 100Ω
10
100
500
µs
t8
VPP OUT = 5V to 90% of 12, RL = 100Ω
10
100
500
µs
t9
VPP OUT = 12V to 90% of 3.3, RL = 100Ω
10
100
500
µs
t10
VPP OUT = 12V to 90% of 5, RL = 100Ω
10
250
1000
µs
VPP OUT = 90% to 10% of 3.3, RL = 100Ω
1
500
µs
t12
VPP OUT = 90% to 10% of 5, RL = 100Ω
1
500
µs
t13
VPP OUT = 90% to 10% of 12, RL = 100Ω
1
500
µs
t4
t7
t11
Output Rise Time
Output Transition Time, Note 5
Output Turnoff Fall Time
September 1999
3
MIC2564A
MIC2564A
Micrel
Symbol
Parameter
Conditions
t14
Output Turnoff Delay Time,
Notes 5, 7
t15
t16
Min
Typ
Max
Units
VPP OUT = 3.3V to Hi-Z, RL = 100Ω
1
50
µs
VPP OUT = 5V to Hi-Z, RL = 100Ω
1
50
µs
VPP OUT = 12V to Hi-Z, RL = 100Ω
1
50
µs
1
20
µA
2.0
3.0
A
VCC Output
ICC OUT Hi-Z
High Impedance Output
Leakage Current
shutdown mode, VCC OUT = 0V
ICCSC
Short Circuit Current Limit
VCC OUT = 0, normal mode,
VCC3 or VCC5 switches, Note 4
RO
Switch Resistance
VCC OUT = 3.3V selected,
ICC OUT = –1A (sourcing)
120
150
mΩ
VCC OUT = 5V selected,
ICC OUT = –1A (sourcing)
85
120
mΩ
VCC OUT = 0V [ground] selected,
ICC OUT = 0.1mA (sinking)
2000
3900
Ω
VCC OUT = 0V to 10% of 3.3, RL = 10Ω
250
500
µs
VCC OUT = 0V to 10% of 5.0, RL = 10Ω
500
1000
µs
1.0
VCC Switching Time (See Figure 3)
t17
t18
t19
Output Turn-On Delay Time,
Note 5
Output Rise Time
t20
t21
Output Fall Time
t22
t23
Output Turnoff Delay, Notes 5, 6
t24
VCC OUT = 10% to 90% of 3.3V, RL = 10Ω
750
1200
5000
µs
VCC OUT = 10% to 90% of 5, RL = 10Ω
1000
2200
5000
µs
VCC OUT = 90% to 10% of 3.3, RL = 10Ω
100
550
1000
µs
VCC OUT = 90% to 10% of 5.0, RL = 10Ω
100
400
2000
µs
VCC OUT = 3.3V to 90% of 3.3V , RL = 10Ω
400
2000
µs
VCC OUT = 5V to 90% of 5V, RL = 10Ω
400
2000
µs
VCC OUT = 5V or 3.3V, ICC OUT = 0
120
200
µA
VCC OUT = Hi-Z (sleep mode)
5
10
µA
VCC OUT = 5V or 3.3V, ICC OUT = 0
25
50
µA
VCC OUT = Hi-Z (sleep mode)
0.2
10
µA
VPP OUT = 0V, 3.3V, 5V, or Hi-Z; IPP OUT = 0
1
10
µA
VPP OUT = VPP IN
4
50
µA
Power Supply
ICC3
ICC5
IPP IN
VCC3 IN Supply Current (3.3V)
Note 7
VCC5 IN Supply Current (5V)
Note 8
VPP IN Supply Current (12V)
Note 8
VCC3
Operating Input Voltage (3.3V)
Note 7
3.0
3.3
5.5
V
VCC5
Operating Input Voltage (5V)
Note 8
—
5.0
5.5
V
VPP
Operating Input Voltage (12V)
Note 8, 9
—
12
13.2
V
Thermal Shutdown
TSD
Thermal Shutdown Temperature
°C
145
Serial Interface DC Specifications
VIH
Input Voltage: SDA, SCL, SLA pins
0.7VCC3IN
5.5
V
VIL
Input Voltage: SDA, SCL, SLA pins
–0.3
0.3VCC3IN
V
IIN
Input Current
0V < VIN < 5.5V
1
µA
Flag Leakage Current
VFLG = 5V
1
µA
–1
0.2
Flag
IFLG
MIC2564A
4
September 1999
MIC2564A
Symbol
Micrel
Parameter
Conditions
Min
Typ
Max
Units
Serial Interface Timing Requirements (See Figure 1), Note 10
tHD:DAT
SDA Hold Time
tSU:DAT
SDA Setup Time
tSU:SLA
Latch Setup Time
tSU:RST#
Reset to Data Setup Time
tW
Minimum Pulse Width
75
ns
75
ns
50
ns
RST# before data
50
ns
clock (tW:CLK)
50
ns
latch (tW:SLA)
100
ns
reset (tW:RST)
50
ns
data (tW:DA)
50
ns
data before clock
Note 1.
Exceeding the absolute maximum rating may damage the device.
Note 2.
The device is not guaranteed to function outside its operating rating.
Note 3.
Devices are ESD sensitive. Handling precautions recommended.
Note 4.
Output enabled into short circuit.
Note 5.
Measurement is from the 50% point of the SLA rising edge.
Note 6.
Measurement is from the Hi-Z- or 0V-state command to the beginning of the slope. Measurement does not apply when device is in current
limit or thermal shutdown.
Note 7.
VCC3 IN powers all internal logic, bias, and drive circuitry, and is required for operation.
Note 8.
VPP and VCC5 IN are not required for operation.
Note 9.
VPP IN must be either high impedance or greater than or approximately equal to the highest voltage VCC in the system. For example, if both
3.3V and 5V are connected to the MIC2564A, VPP IN must be either 5V, 12V, or high impedance.
Note 10. Guaranteed by design not production tested.
Serial Control Timing Diagram
tW:DAT
RST#
tSU:RST#
D8
D7
D6
D5
D4
D3
D2
D1
D0
SDA
tSU:DAT
SLA
tW:CLK
tSU:SLA
tW:SLA
tHD:DAT
SCL
Figure 1. Serial Control Timing Diagram
The MIC2564A uses a three-wire serial interface to control VCC and VPP outputs for both sections A and B. The three control
lines have thresholds compatible with both 3.3V and 5V logic families. Data (SDA) is clocked in on the rising clock edge. The
clock signal may be continuous or it may halt after all data is clocked in.
September 1999
5
MIC2564A
MIC2564A
Micrel
Output Timing Diagrams
A
B
C
E
D
F
G
H
J
VPP
Enable
0
VPP to 3.3V VPP to 12V
VPP to 3.3V VPP
OFF
VPP to 5V
VPP to 5V
VPP to 12V
VPP
OFF
K
VPP to 12V
VPP OFF
t13
t7
t9
t10
t8
t16
t6
12V
VPP
OUT
t2
t1
t4
t11
t5
t15
t14
t3
t12
5V
3.3V
0
FLAG
Figure 2. VPP Timing Diagram
VPP Enable is shown generically. RL = 100Ω. CL = negligible. Refer to the serial control timing diagrams for details.
At time A) VPP = 3.3V is selected, B) VPP is set to 12V, C) VPP = 3.3V (from 12V), D) VPP is disabled, E) VPP is programmed
to 5V, F) VPP is set to 12V, G) VPP is programmed to 5V, H) VPP is disabled, J) VPP is set to 12V, K) VPP is again disabled.
A
VCC
Enable
0
B
VCC to 3.3V
t17
t19
C
D
VCC OFF
VCC to 5V
t23
t18
t21
t20
VCC OFF
t24
t22
5V
VCC 3.3V
OUT
0
FLAG
0
Figure 3. VCC Timing Diagram
VCC Enable is shown generically. RL = 10Ω. Refer to the serial control timing diagrams for specific control logic input.
At time A) VCC is programmed to 3.3V, B) VCC is disabled, C) VCC is programmed to 5V, D) VCC is disabled.
MIC2564A
6
September 1999
September 1999
7
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
X = don’t care, * clamped to ground,
0
0
1
0
0
1
1
0
1
1
0
1
†
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
illegal state per The PC Card Specification.
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
1
1
1
1
1
1
1
1
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
0
1
X
1
X
D3
A VCC5
0
X
D4
B VPP_PGM
0
X
D5
B VPP_VCC
1
X
0
D6
B VCC3
1
D7
B VCC5
D8
SHDN
MIC2564A-0 Logic Table
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
X
D2
A VCC3
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
X
D1
A VPP_VCC
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
X
D0
A VPP_PGM
0V*
Hi-Z
0V*
0V*
0V*†
0V*
0V*
12V†
3.3V
3.3V
3.3V
3.3V
5V
5V
5V
5V
0V*
0V*
Hi-Z
3.3V
12V
0V*
Hi-Z
5V
12V
0V*
Hi-Z
0V*
0V*
0V*†
0V*
Hi-Z
B VCCOUT
12V†
Hi-Z
B VPPOUT
0V*
Hi-Z
0V*
0V*
0V†
12V†
0V*
0V*
5V
5V
5V
5V
3.3V
3.3V
3.3V
3.3V
0V*
0V*
Hi-Z
5V
12V
0V*
Hi-Z
3.3V
12V
0V*
Hi-Z
0V*
0V*
0V*†
0V*
Hi-Z
A VCCOUT
12V†
Hi-Z
A VPPOUT
MIC2564A
Micrel
MIC2564A
MIC2564A
8
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
X = don’t care, * clamped to ground, † illegal state per The PC Card Specification.
0
1
0
1
1
0
1
1
0
1
1
1
1
1
0
1
1
0
1
1
0
1
1
0
1
1
1
0
0
1
0
0
1
1
0
1
1
0
X
1
X
D3
A VCC5
0
X
D4
B VPP_PGM
1
X
D5
B VPP_VCC
0
X
0
D6
B VCC3
1
D7
B VCC5
D8
SHDN
MIC2564A-1 Logic Table
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
X
D2
A VCC3
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
X
D1
A VPP_VCC
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
X
D0
A VPP_PGM
Hi-Z
0V*
0V*
0V*
0V*
0V*†
0V*
3.3V
3.3V
3.3V
3.3V
5V
5V
5V
5V
0V*
12V†
5V
3.3V
12V
0V*
3.3V
5V
12V
0V*
Hi-Z
0V*
0V*†
12V†
0V*
0V*
Hi-Z
B VCCOUT
0V*
Hi-Z
B VPPOUT
Hi-Z
0V*
0V*
0V*
0V*
0V†
0V*
5V
5V
5V
5V
3.3V
3.3V
3.3V
3.3V
0V*
12V†
3.3V
5V
12V
0V*
5V
3.3V
12V
0V*
Hi-Z
0V*
0V*†
0V*
0V*
12V†
Hi-Z
A VCCOUT
0V*
Hi-Z
A VPPOUT
MIC2564A
Micrel
September 1999
MIC2564A
Micrel
Functional Diagram
VCC3 IN
3.3V
VCC5 IN
5V
(optional)
VPP IN
12V
(optional)
Gate-Drive
Charge Pump
SDA
SCL
A VPP OUT
RST#
SLA
B VPP OUT
Control
Logic
A VCC OUT
A FLAG
B VCC OUT
B FLAG
Current
Limit
Thermal
Shutdown
MIC2564
GND
September 1999
9
MIC2564A
MIC2564A
Micrel
If no card is inserted, or the system is in sleep mode, the logic
controller commands the MIC2564A to shut down VCC. This
also places the switch into a shutdown (sleep) mode, where
current consumption drops to nearly zero, with only tiny
CMOS leakage currents flowing.
Internal device control logic, MOSFET drive and bias voltage
is powered from VCC3 IN. The high voltage bias is generated
by an internal charge pump multiplier. Input logic threshold
voltages are compatible with common PC Card logic controllers using either 3.3V or 5V supplies.
Applications Information
PC Card power control for two sockets is easily accomplished
using the MIC2564A PC Card/CardBus power controller.
Control commands from a three-wire (plus Reset) serial bus
determine VCC and VPP output voltages and select standby
or operate mode.
VCC outputs of 3.3V and 5V at the maximum allowable PC
Card current are supported. The VCC outputs also support
GND (0V) and high-impedance states. The VPP outputs
support VPP (12V), VCC voltages (3.3V or 5V), GND (0V), or
high impedance. When the VCC = Hi-Z (high impedance)
condition is selected, the device switches into sleep mode
and draws only leakage current.
Full protection during hot switching is provided which prevents feedback from the VCC output (for example, from the 5V
supply into the 3.3V supply) by locking out the low voltage
switch until the initial switch’s gate voltage drops below 0.7V.
MIC2564A internal logic and MOSFET drive circuitry is
powered from the VCC3 input and internal charge-pump
voltage multipliers. Switching speeds are carefully controlled
to prevent damage to sensitive loads and meet all PC Card
Specification timing requirements, including those for the
CardBus option.
PC Card Voltage Regulation
The MIC2564A has been designed to meet or exceed PC
Card voltage regulation specifications. The on-resistance of
the FET switches will meet regulation requirements at 600mA
and 1A respectively for VCC = 5V ±3% and 3.3V ±3%.
Flash Memory Implementation
When programming flash memory (standard +12V flash
memories), the PC Card slot logic controller enables VPP on
the MIC2564A, which connects VPP IN (nominally +12V) to
VPP OUT. The low on-resistance of the MIC2564A switch
allows using a small bypass capacitor on the VPP OUT pins,
with the main filtering performed by a large filter capacitor on
VPP IN. (Usually the main power supply filter capacitor is
sufficient.) Using a small-value capacitor such as 0.1µF on
the output causes little or no timing delays.
The VPP OUT transition from VCC to 12.0V typically takes
200µs. After programming is completed, the logic controller
signals to the MIC2564A, which then reduces VPP OUT to the
VCC level. Break-before-make switching action and controlled rise times reduce switching transients and lower
current spikes through the switch.
Output Current and Protection
The MIC2564A meets or exceeds all PCMCIA specifications.
MIC2564A output switches are capable of passing the maximum current needed by any PC Card. For system and card
protection, output currents are internally limited. For full
system protection, long term (longer than a few milliseconds)
output short circuits invoke overtemperature shutdown, protecting the MIC2564A, the system power supplies, the card
socket pins, board traces, and the PC Card. Individual
internal status registers for each slot indicate when power
problems exist.
Control Bus Interface Overview
The MIC2564A power controller communicates with a logic
controller (host adapter) via a 3-wire serial interface. A fourth
control line attaches to the system reset line (RST#) and
places all MIC2564A switches in the high impedance (off)
state. The reset function is active low.
Supply Bypassing
The MIC2564A is a switch and has no stability problems;
however, supply bypass capacitors are recommended to
reduce inductive transients and improve output ripple. As all
internal device logic and comparison functions are powered
from the VCC3 input, the power supply quality on this line is the
most important. Micrel recommends placing 1µF surfacemount ceramic (low ESR) capacitors from VCC3 IN and
VCC5 IN pins to ground and two 0.1µF surface-mount ceramic
capacitors, one from each VPP IN pin, to ground. Also, the
VCC OUT and VPP OUT pins may use 0.01µF to 0.1µF
capacitors for noise reduction and to reduce the chance of
ESD (electrostatic discharge) damage.
Power Status Feedback (Flags)
Two flag outputs monitor the VCC and VPP output voltages on
both slot A and B, falling low when the voltage is not proper.
Use of these open-drain flag outputs is optional; if they are
used, a pull-up resistor to either the 3.3V or 5V supply is
required. Unused flag outputs may be left open.
PC Card Slot Implementation
The MIC2564A is designed for full compatibility with the
Personal Computer Memory Card International Association
(PCMCIA) PC Card Specification including the CardBus and
Zoom Video (ZV) options.
When a PC card is initially inserted, it should receive VCC
(3.3V ± 0.3V or 5.0V ±5%). The initial voltage is determined
by a combination of mechanical socket keys and voltage
sense pins. The card sends a handshaking data stream to the
logic controller, which then determines if this card requires
VPP and if the card is designed for dual VCC. If the card is
compatible with, and requires, a different VCC level, the logic
controller commands the power controller to make this change
by disabling VCC, waiting at least 100ms, and then reenabling the other VCC voltage.
MIC2564A
10
September 1999
MIC2564A
Micrel
Slot A
Controller
Power
(3.3V or 5V)
2
Generic
330k
PCMCIA/CardBus
Host Adapter
+3.3V
+5V
1.0µF
1.0µF
ceramic
14, 23
4
A PGOOD
9
B PGOOD
5
SDATA
6
SCLK
8
SLATCH
7
RST#
ceramic
VCC
VPP IN
A VPP OUT
MIC2564A
Power
Controller
SDA
SCL
A VCC OUT
B VPP OUT
SLA
B VCC OUT
RST#
VPP2
18, 19
VCC5 IN
A FLG
B FLG
VPP1
0.1µF 0.1µF
ceramic
1, 3, 10
VCC3 IN
VCC
+12V
20
2, 22, 24
0.01µF
Slot B
0.01µF
17
11, 13, 15
VPP1
0.01µF
VPP2
0.01µF
GND
16, 21
VCC
System Reset
Figure 4. Generic “3-Wire” Serial Control Interface
Slot A
+3.3V
+5V
1.0µF
1.0µF
ceramic
14, 23
Cirrus Logic
CL-PD6832/33
SDATA
SCLK
SLATCH
RST#
VCC3 IN
131
5
132
6
130
8
207
7
+12V
1, 3, 10
VCC5 IN
SLA
RST#
VPP2
18, 19
A VCC OUT
B VPP OUT
GND
ceramic
VCC
VPP IN
A VPP OUT
MIC2564A
Power
Controller
VPP1
0.1µF
ceramic
SDA
SCL
0.1µF
B VCC OUT
20
2, 22, 24
17
11, 13, 15
0.01µF
Slot B
0.01µF
0.01µF
VPP1
VPP2
0.01µF
16, 21
VCC
System
Reset
Figure 5. Cirrus Logic CL-PD6832 and CL-PD6833 Interface
September 1999
11
MIC2564A
MIC2564A
Micrel
Slot A
+3.3V
+5V
1.0µF
1.0µF
ceramic
O2 Micro
OZ6833
OZ6933
CPWRDATA
CPWRCLK
CPWRLATC
RST#
14, 23
5
132
6
130
8
207
7
0.1µF
ceramic
VCC
VPP IN
A VPP OUT
MIC2564A
Power
Controller
SLA
A VCC OUT
B VPP OUT
RST#
VPP2
18, 19
VCC5 IN
SDA
SCL
VPP1
0.1µF
ceramic
1, 3, 10
VCC3 IN
131
+12V
B VCC OUT
GND
20
2, 22, 24
0.01µF
Slot B
0.01µF
17
0.01µF
11, 13, 15
VPP1
VPP2
0.01µF
16, 21
VCC
System
Reset
Figure 6. O2 Micro OZ6833 and OZ6933
Slot A
+3.3V
+5V
1.0µF
1.0µF
ceramic
14, 23
O2 Micro
OZ6860
SDATA
SCLK
SLATCH
RST#
5
118
6
115
8
250
7
VCC5 IN
SLA
RST#
ceramic
18, 19
A VCC OUT
B VPP OUT
GND
VPP2
VCC
VPP IN
A VPP OUT
MIC2564A
Power
Controller
VPP1
0.1µF
ceramic
SDA
SCL
0.1µF
1, 3, 10
VCC3 IN
116
+12V
B VCC OUT
20
2, 22, 24
17
11, 13, 15
0.01µF
Slot B
0.01µF
0.01µF
VPP1
VPP2
0.01µF
16, 21
VCC
System
Reset
Figure 7. O2 Micro OZ6860
MIC2564A
12
September 1999
MIC2564A
Micrel
Package Dimensions
5.40 (0.213)
5.20 (0.205)
7.90 (0.311)
7.65 (0.301)
DIMENSIONS:
MM (INCH)
0.875 (0.034) REF
8.33 (0.328)
8.07 (0.318)
2.00 (0.079)
1.73 (0.068)
10°
4°
0.38 (0.015)
0.25 (0.010)
0.21 (0.008)
0.05 (0.002)
0.65 (0.0260) BSC
COPLANARITY:
0.10 (0.004) MAX
0°
–8°
0.22 (0.009)
0.13 (0.005)
1.25 (0.049) REF
0.95 (0.037)
0.55 (0.022)
24-pin SSOP (SM)
4.50 (0.177)
6.4 BSC (0.252)
4.30 (0.169)
0.30 (0.012)
0.19 (0.007)
7.90 (0.311)
7.70 (0.303)
0.65 BSC
(0.026)
DIMENSIONS:
MM (INCH)
1.10 MAX (0.043)
0.20 (0.008)
0.09 (0.003)
8°
0°
0.15 (0.006)
0.05 (0.002)
1.00 (0.039) REF
0.70 (0.028)
0.50 (0.020)
24-pin TSSOP (TM)
September 1999
13
MIC2564A
MIC2564A
MIC2564A
Micrel
14
September 1999
MIC2564A
September 1999
Micrel
15
MIC2564A
MIC2564A
Micrel
MICREL INC. 1849 FORTUNE DRIVE SAN JOSE, CA 95131
TEL
+ 1 (408) 944-0800
FAX
+ 1 (408) 944-0970
WEB
USA
http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or
other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.
© 1999 Micrel Incorporated
MIC2564A
16
September 1999
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