NSC LMV358IPWR Low-voltage rail-to-rail output operational amplifier Datasheet

LMV321, LMV358
LMV324, LMV324S
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SLOS263V – AUGUST 1999 – REVISED DECEMBER 2013
Low-Voltage Rail-To-Rail Output Operational Amplifiers
Check for Samples: LMV321, LMV358, LMV324, LMV324S
FEATURES
DESCRIPTION
•
•
•
•
•
The LMV321, LMV358, and LMV324/LMV324S are
single, dual, and quad low-voltage (2.7 V to 5.5 V)
operational amplifiers with rail-to-rail output swing.
The LMV324S, which is a variation of the standard
LMV324, includes a power-saving shutdown feature
that reduces supply current to a maximum of 5 μA
per channel when the amplifiers are not needed.
Channels 1 and 2 together are put in shutdown, as
are channels 3 and 4. While in shutdown, the outputs
actively are pulled low.
1
•
•
2.7-V and 5-V Performance
–40°C to 125°C Operation
Low-Power Shutdown Mode (LMV324S)
No Crossover Distortion
Low Supply Current
– LMV321 . . . 130 μA Typ
– LMV358 . . . 210 μA Typ
– LMV324 . . . 410 μA Typ
– LMV324S . . . 410 μA Typ
Rail-to-Rail Output Swing
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 1000-V Charged-Device Model (C101)
The LMV321, LMV358, LMV324, and LMV324S are
the most cost-effective solutions for applications
where low-voltage operation, space saving, and low
cost are needed. These amplifiers are designed
specifically for low-voltage (2.7 V to 5 V) operation,
with performance specifications meeting or exceeding
the LM358 and LM324 devices that operate from 5 V
to 30 V. Additional features of the LMV3xx devices
are a common-mode input voltage range that
includes ground, 1-MHz unity-gain bandwidth, and 1V/μs slew rate.
The LMV321 is available in the ultra-small DCK (SC70) package, which is approximately one-half the size
of the DBV (SOT-23) package. This package saves
space on printed circuit boards and enables the
design of small portable electronic devices. It also
allows the designer to place the device closer to the
signal source to reduce noise pickup and increase
signal integrity.
LMV324 . . . D (SOIC) OR PW (TSSOP) PACKAGE
(TOP VIEW)
1OUT
1IN–
1IN+
V C C+
2IN+
2IN–
2OUT
1
14
2
13
3
12
4
11
5
10
6
9
7
8
4OUT
4IN–
4IN+
GND
3IN+
3IN–
3OUT
LMV324S . . . D (SOIC) OR PW (TSSOP) PACKAGE
(TOP VIEW)
1OUT
1IN–
1IN+
VCC
2IN+
2IN–
2OUT
1/2 SHDN
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
4OUT
4IN–
4IN+
GND
3IN+
3IN–
3OUT
3/4 SHDN
LMV358 . . . D (SOIC), DDU (VSSOP),
DGK (MSOP), OR PW (TSSOP) PACKAGE
(TOP VIEW)
1OUT
1IN–
1IN+
GND
1
8
2
7
3
6
4
5
VC C +
2OUT
2IN–
2IN+
LMV321 . . . DBV (SOT-23) OR DCK (SC-70) PACKAGE
(TOP VIEW)
1IN+
1
GND
2
1IN–
3
5
VC C +
4
OUT
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1999–2013, Texas Instruments Incorporated
LMV321, LMV358
LMV324, LMV324S
SLOS263V – AUGUST 1999 – REVISED DECEMBER 2013
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Symbol (Each Amplifier)
IN–
–
OUT
IN+
+
LMV324 Simplified Schematic
VCC
VBIAS1
VCC
+
–
VBIAS2
+
Output
–
VCC VCC
VBIAS3
+
IN-
VBIAS4–
IN+
+
–
2
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LMV321, LMV358
LMV324, LMV324S
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SLOS263V – AUGUST 1999 – REVISED DECEMBER 2013
Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
MIN
(2)
VCC
Supply voltage
VID
Differential input voltage (3)
VI
Input voltage range (either input)
Duration of output short circuit (one amplifier) to ground (4)
–0.2
At or below TA = 25°C,
VCC ≤ 5.5 V
D package
θJA
Package thermal impedance (5)
(6)
Operating virtual junction temperature
Tstg
Storage temperature range
(1)
(2)
(3)
(4)
(5)
(6)
UNIT
5.5
V
±5.5
V
5.5
V
Unlimited
8 pin
97
14 pin
86
16 pin
73
DBV package
5 pin
206
DCK package
5 pin
252
DDU package
8 pin
210
DGK package
8 pin
172
8 pin
149
14 pin
113
16 pin
108
PW package
TJ
MAX
–65
°C/W
150
°C
150
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values (except differential voltages and VCC specified for the measurement of IOS) are with respect to the network GND.
Differential voltages are at IN+ with respect to IN–.
Short circuits from outputs to VCC can cause excessive heating and eventual destruction.
Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
The package thermal impedance is calculated in accordance with JESD 51-7.
Recommended Operating Conditions (1)
VCC
Supply voltage (single-supply operation)
VIH
Amplifier turn-on voltage level (LMV324S) (2)
VIL
Amplifier turn-off voltage level (LMV324S)
TA
(1)
(2)
Operating free-air temperature
MIN
MAX
2.7
5.5
VCC = 2.7 V
1.7
VCC = 5 V
3.5
UNIT
V
V
VCC = 2.7 V
0.7
VCC = 5 V
1.5
I temperature (LMV321,
LMV358, LMV324,
LMV321IDCK)
–40
125
I temperature (LMV324S)
-40
85
Q temperature
–40
125
V
°C
All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. See the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
VIH should not be allowed to exceed VCC.
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Electrical Characteristics
VCC+ = 2.7 V, TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP (1)
MAX
1.7
7
UNIT
VIO
Input offset voltage
αVIO
Average temperature coefficient of
input offset voltage
IIB
Input bias current
IIO
Input offset current
CMRR
Common-mode rejection ratio
VCM = 0 to 1.7 V
50
63
dB
kSVR
Supply-voltage rejection ratio
VCC = 2.7 V to 5 V, VO = 1 V
50
60
dB
VICR
Common-mode input voltage
range
CMRR ≥ 50 dB
0
–0.2
VO
Output swing
RL = 10 kΩ to 1.35 V
ICC
Supply current
μV/°C
5
11
250
nA
5
50
nA
1.9
High level
VCC – 100
1.7
VCC – 10
Low level
LMV321I
60
180
80
170
LMV358I (both amplifiers)
140
340
LMV324I/LMV324SI (all four amplifiers)
260
680
V
mV
μA
B1
Unity-gain bandwidth
1
MHz
Φm
Phase margin
60
deg
Gm
Gain margin
10
dB
Vn
Equivalent input noise voltage
f = 1 kHz
46
nV/√Hz
In
Equivalent input noise current
f = 1 kHz
0.17
pA/√Hz
(1)
CL = 200 pF
mV
Typical values represent the likely parametric nominal values determined at the time of characterization. Typical values depend on the
application and configuration and may vary over time. Typical values are not ensured on production material.
Shutdown Characteristics (LMV324S)
VCC+ = 2.7 V, TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP (1)
MAX
UNIT
ICC(SHDN)
Supply current in shutdown mode
(per channel)
SHDN ≤ 0.6 V
t(on)
Amplifier turn-on time
AV = 1, RL = Open (measured at 50% point)
2
μs
t(off)
Amplifier turn-off time
AV = 1, RL = Open (measured at 50% point)
40
ns
(1)
4
5
μA
Typical values represent the likely parametric nominal values determined at the time of characterization. Typical values depend on the
application and configuration and may vary over time. Typical values are not ensured on production material.
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LMV324, LMV324S
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Electrical Characteristics
VCC+ = 5 V, at specified free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
(1)
MIN
25°C
TYP (2)
MAX
1.7
7
UNIT
VIO
Input offset voltage
αVIO
Average temperature
coefficient of input offset
voltage
IIB
Input bias current
IIO
Input offset current
CMRR
Common-mode rejection
ratio
VCM = 0 to 4 V
25°C
50
65
dB
kSVR
Supply-voltage
rejection ratio
VCC = 2.7 V to 5 V, VO = 1 V,
VCM = 1 V
25°C
50
60
dB
VICR
Common-mode input
voltage range
CMRR ≥ 50 dB
25°C
0
–0.2
Full range
Output swing
High level
RL = 10 kΩ to 2.5 V
Low level
Large-signal differential
voltage gain
IOS
Output short-circuit
current
RL = 2 kΩ
Sourcing, VO = 0 V
Sinking, VO = 5 V
LMV321I
ICC
Supply current
LMV358I (both amplifiers)
LMV324I/LMV324SI
(all four amplifiers)
B1
Unity-gain bandwidth
Φm
Gm
Vn
Equivalent input
noise voltage
In
Equivalent input
noise current
SR
Slew rate
(1)
(2)
25°C
15
5
CL = 200 pF
4.2
25°C
VCC – 300
VCC – 400
25°C
120
VCC – 100
Full range
VCC – 200
nA
V
4
300
25°C
mV
VCC – 10
65
Full range
180
280
25°C
15
Full range
10
100
5
60
10
160
130
Full range
V/mV
mA
250
350
210
Full range
25°C
50
400
25°C
25°C
nA
VCC – 40
Full range
25°C
250
150
Full range
25°C
μV/°C
500
25°C
Low level
AVD
5
Full range
RL = 2 kΩ to 2.5 V
VO
25°C
Full range
High level
mV
9
440
μA
615
410
Full range
830
1160
25°C
1
MHz
Phase margin
25°C
60
deg
Gain margin
25°C
10
dB
f = 1 kHz
25°C
39
nV/√Hz
f = 1 kHz
25°C
0.21
pA/√Hz
25°C
1
V/μs
Full range TA = –40°C to 125°C for I temperature(LMV321, LMV358, LMV324, LMV321IDCK), –40°C to 85°C for (LMV324S) and –40°C
to 125°C for Q temperature.
Typical values represent the likely parametric nominal values determined at the time of characterization. Typical values depend on the
application and configuration and may vary over time. Typical values are not ensured on production material.
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Shutdown Characteristics (LMV324S)
VCC+ = 5 V, TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP (1)
MAX
UNIT
ICC(SHDN)
Supply current in shutdown mode
(per channel)
SHDN ≤ 0.6 V, TA = Full Temperature Range
t(on)
Amplifier turn-on time
AV = 1, RL = Open (measured at 50% point)
2
μs
t(off)
Amplifier turn-off time
AV = 1, RL = Open (measured at 50% point)
40
ns
(1)
6
5
μA
Typical values represent the likely parametric nominal values determined at the time of characterization. Typical values depend on the
application and configuration and may vary over time. Typical values are not ensured on production material.
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LMV321, LMV358
LMV324, LMV324S
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Typical Characteristics
LMV321 FREQUENCY RESPONSE
vs
RESISTIVE LOAD
LMV321 FREQUENCY RESPONSE
vs
RESISTIVE LOAD
Vs = 2.7 V
RL = 100 kΩ, 2 kΩ, 600 Ω
70
Phase
60
Gain − dB
40
70
90
60
75
60
2 kΩ
100 kΩ
30
105
45
Gain
20
30
600 Ω
10
100 kΩ
−10
1k
10 k
100 k
Frequency − Hz
Figure 1.
90
600 Ω
Phase
50
75
2 kΩ
60
40
100 kΩ
30
45
Gain
20
1M
0
0
−15
10 M
−10
1k
15
10 k
70
100
100
Phase
0 pF
80
80
60
60
50
0 pF
60
50
100 pF
−20
Vs = 5.0 V
RL = 600 Ω
CL = 0 pF
100 pF
500 pF
1000 pF
−30
10 k
−20
100 pF
0 pF
1000 pF
100 k
1M
Frequency − Hz
Figure 3.
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−40
500 pF
−60
−80
−100
10 M
Gain − dB
Gain − dB
Gain
40
40
30
500 pF
Gain
20
20
0
10
−20
Vs = 5.0 V
RL = 100 kΩ
−10 CL = 0 pF
100 pF
−20
500 pF
1000 pF
−30
10 k
100 k
0
−40
0 pF
100 pF
Phase Margin − Deg
0
20
−10
20
Phase Margin − Deg
500 pF
1000 pF
100 pF
1000 pF
40
40
0
−15
10 M
100 k
1M
Frequency − Hz
Figure 2.
Phase
60
0
600 Ω
LMV321 FREQUENCY RESPONSE
vs
CAPACITIVE LOAD
70
10
30
100 kΩ
10
15
LMV321 FREQUENCY RESPONSE
vs
CAPACITIVE LOAD
30
105
2 kΩ
2 kΩ
0
120
Vs = 5.0 V
RL = 100 kΩ, 2 kΩ, 600 Ω
Phase Margin − Deg
600 Ω
80
Phase Margin − Deg
50
120
Gain − dB
80
−60
500 pF
−80
1000 pF
1M
Frequency − Hz
Figure 4.
−100
10 M
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Typical Characteristics (continued)
STABILITY
vs
CAPACITIVE LOAD
LMV321 FREQUENCY RESPONSE
vs
TEMPERATURE
120
80
Vs = 5.0 V
RL = 2 kΩ
60
75
25°C
60
40
−40°C
45
Gain
20
30
85°C
25°C
10
−10
1k
10 k
100
VCC = ±2.5 V
AV = +1
RL = 2 kΩ
VO = 100 mVPP
10
−2
−15
10 M
100 k
1M
Frequency − Hz
Figure 5.
−1.5
10000
2.5 V
_
RL
CL
2.5 V
LMV324S
(25% Overshoot)
100
LMV3xx
(25% Overshoot)
10
−2.0
−1.5
−1
−0.5
0
Output Voltage − V
Figure 7.
8
VO
Capacitive Load − nF
Capacitive Load − pF
1000
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−0.5
0
0.5
1
1.5
STABILITY
vs
CAPACITIVE LOAD
10000
+
−1
Output Voltage − V
Figure 6.
STABILITY
vs
CAPACITIVE LOAD
VI
CL
LMV3xx
(25% Overshoot)
0
−40°C
VO
RL
−2.5 V
1000
15
0
_
+
VI
Phase Margin − Deg
Phase
30
2.5 V
LMV324S
(25% Overshoot)
90
85°C
50
Gain − dB
105
Capacitive Load − pF
70
10000
VCC = ±2.5 V
RL = 2 kΩ
AV = 10
VO = 100 mVPP
1000
LMV3xx
(25% Overshoot)
100
134 kΩ
1
1.21 MΩ
+2.5 V
VCC = ±2.5 V
AV = +1
RL = 1 MΩ
VO = 100 mVPP
0.5
LMV324S
(25% Overshoot)
_
VI
+
VO
RL
CL
−2.5 V
1.5
10
−2.0
−1.5
−1
−0.5
0
Output Voltage − V
Figure 8.
0.5
1
1.5
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LMV324, LMV324S
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Typical Characteristics (continued)
SLEW RATE
vs
SUPPLY VOLTAGE
STABILITY
vs
CAPACITIVE LOAD
10000
1.500
RL = 100 kΩ
1.400
LMV3xx
(25% Overshoot)
1.300
Slew Rate − V/µs
Capacitive Load − nF
VCC = ±2.5 V
RL = 1 MΩ
AV = 10
VO = 100 mVPP
1000
LMV324S
(25% Overshoot)
100
134 kΩ
1.21 MΩ
Gain
1.200
NSLEW
1.100
1.000
LMV3xx
PSLEW
0.900
0.800
+2.5 V
NSLEW
_
VI
VO
+
RL
0.700
CL
−2.5 V
10
−2.0
−1.5
−1
LMV324S
0.600
PSLEW
−0.5
0
0.5
1
0.500
2.5
1.5
Output Voltage − V
Figure 9.
3.0
4.0
4.5
5.0
V CC − Supply Voltage − V
Figure 10.
SUPPLY CURRENT
vs
SUPPLY VOLTAGE − QUAD AMPLIFIER
INPUT CURRENT
vs
TEMPERATURE
700
−10
VCC = 5 V
VI = VCC/2
LMV3xx
600
LMV324S
−20
TA = 85°C
500
Input Current − nA
Supply Current − µA
3.5
TA = 25°C
400
300
TA = −40°C
200
−30
LMV3xx
−40
−50
100
LMV324S
0
0
1
2
3
4
VCC − Supply Voltage − V
Figure 11.
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5
6
−60
−40 −30 −20 −10 0 10 20 30 40 50 60 70 80
TA − °C
Figure 12.
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Typical Characteristics (continued)
SOURCE CURRENT
vs
OUTPUT VOLTAGE
SOURCE CURRENT
vs
OUTPUT VOLTAGE
100
100
VCC = 2.7 V
VCC = 5 V
10
Sourcing Current − mA
Sourcing Current − mA
10
LMV3xx
1
LMV324S
0.1
1
LMV324S
0.1
0.01
0.01
0.001
0.001
LMV3xx
0.01
0.1
1
0.001
0.001
10
Output Voltage Referenced to VCC+ − V
Figure 13.
10
100
VCC = 5 V
VCC = 2.7 V
10
10
LMV324S
Sinking Current − mA
Sinking Current − mA
1
SINKING CURRENT
vs
OUTPUT VOLTAGE
100
1
LMV3xx
0.1
LMV324S
1
LMV324
0.1
0.01
0.01
0.01
0.1
1
Output Voltage Referenced to GND − V
Figure 15.
10
0.1
Figure 14.
SINKING CURRENT
vs
OUTPUT VOLTAGE
0.001
0.001
0.01
Output Voltage Referenced to VCC+ − V
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10
0.001
0.001
0.01
0.1
1
10
Output Voltage Referenced to GND − V
Figure 16.
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Typical Characteristics (continued)
SHORT-CIRCUIT CURRENT
vs
TEMPERATURE
SHORT-CIRCUIT CURRENT
vs
TEMPERATURE
120
300
LMV324S
VCC = 5 V
270
Sinking Current − mA
LMV324S
VCC = 5 V
210
Sourcing Current − mA
100
240
LMV3xx
VCC = 5 V
180
150
120
LMV3xx
VCC = 2.7 V
90
60
LMV324S
VCC = 2.7 V
80
LMV3xx
VCC = 5 V
60
LMV3xx
VCC = 2.7 V
40
LMV324S
VCC = 2.7 V
20
30
0
−40 −30 −20 −10 0
0
10 20 30 40 50 60 70 80 90
TA − °C
Figure 17.
−40 −30 −20−10 0
TA − °C
Figure 18.
+kSVR
vs
FREQUENCY
−kSVR
vs
FREQUENCY
80
90
LMV324S
VCC = −5 V
RL = 10 kΩ
70
LMV324S
VCC = 5 V
RL = 10 kΩ
80
70
60
LMV3xx
LMV3xx
60
50
+k SVR − dB
−k SVR − dB
10 20 30 40 50 60 70 80 90
40
30
50
40
30
20
20
10
0
100
10
0
1k
10k
100k
Frequency − Hz
Figure 19.
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1M
100
1k
10k
100k
1M
Frequency − Hz
Figure 20.
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Typical Characteristics (continued)
+kSVR
vs
FREQUENCY
−kSVR
vs
FREQUENCY
80
80
VCC = −2.7 V
RL = 10 kΩ
LMV324S
70
LMV3xx
+k SVR − dB
50
40
30
50
30
20
10
10
100
1k
10k
100k
0
100
1M
LMV3xx
40
20
0
1k
Frequency − Hz
Figure 21.
10k
6
RL = 10 kΩ
THD > 5%
AV = 3
RL = 10 kΩ
5
Peak Output Voltage − V OPP
Output Voltage Swing − mV
60
LMV3xx
LMV324S
Negative Swing
1M
OUTPUT VOLTAGE
vs
FREQUENCY
70
50
100k
Frequency − Hz
Figure 22.
OUTPUT VOLTAGE SWING FROM RAILS
vs
SUPPLY VOLTAGE
40
30
20
Positive Swing
LMV3xx
VCC = 5 V
4
LMV324S
VCC = 5 V
3
LMV3xx
VCC = 2.7 V
2
LMV324S
VCC = 2.7 V
1
10
0
0
2.5
3.0
3.5
4.0
VCC − Supply Voltage − V
Figure 23.
12
VCC = 2.7 V
RL = 10 kΩ
60
60
−kSVR − dB
LMV324S
70
Submit Documentation Feedback
4.5
5.0
1k
10k
100k
1M
10M
Frequency − Hz
Figure 24.
Copyright © 1999–2013, Texas Instruments Incorporated
LMV321, LMV358
LMV324, LMV324S
www.ti.com
SLOS263V – AUGUST 1999 – REVISED DECEMBER 2013
Typical Characteristics (continued)
OPEN-LOOP OUTPUT IMPEDANCE
vs
FREQUENCY
CROSSTALK REJECTION
vs
FREQUENCY
150
110
LMV3xx
VCC = 5 V
Impedance − Ω
90
80
70
LMV324S
VCC = 2.7 V
60
50
LMV324S
VCC = 5 V
40
VCC = 5 V
RL = 5 kΩ
AV = 1
VO = 3 VPP
140
Crosstalk Rejection − dB
100
LMV3xx
VCC = 2.7 V
130
120
110
100
30
20
1
1M
2M
3M
90
100
4M
Figure 25.
1k
10k
Frequency − Hz
Figure 26.
NONINVERTING LARGE-SIGNAL
PULSE RESPONSE
NONINVERTING LARGE-SIGNAL
PULSE RESPONSE
Frequency − Hz
Input
LMV3xx
LMV3xx
1 V/Div
1 V/Div
Input
100k
LMV324S
LMV324S
VCC = ±2.5 V
RL = 2 kΩ
TA = 85°C
VCC = ±2.5 V
RL = 2 kΩ
T = 25°C
1 µs/Div
Figure 27.
Copyright © 1999–2013, Texas Instruments Incorporated
1 µs/Div
Figure 28.
Submit Documentation Feedback
13
LMV321, LMV358
LMV324, LMV324S
SLOS263V – AUGUST 1999 – REVISED DECEMBER 2013
www.ti.com
Typical Characteristics (continued)
NONINVERTING SMALL-SIGNAL
PULSE RESPONSE
NONINVERTING LARGE-SIGNAL
PULSE RESPONSE
Input
Input
LMV3xx
LMV324S
50 mV/Div
1 V/Div
LMV3xx
LMV324S
VCC = ±2.5 V
RL = 2 kΩ
TA = −40°C
VCC = ±2.5 V
RL = 2 kΩ
TA = 25°C
1 µs/Div
1 µs/Div
Figure 29.
Figure 30.
NONINVERTING SMALL-SIGNAL
PULSE RESPONSE
NONINVERTING SMALL-SIGNAL
PULSE RESPONSE
Input
Input
50 mV/Div
50 mV/Div
LMV3xx
LMV324S
LMV324S
VCC = ±2.5 V
RL = 2 kΩ
TA = 85°C
VCC = ±2.5 V
RL = 2 kΩ
TA = −40°C
1 µs/Div
Figure 31.
14
LMV3xx
Submit Documentation Feedback
1 µs/Div
Figure 32.
Copyright © 1999–2013, Texas Instruments Incorporated
LMV321, LMV358
LMV324, LMV324S
www.ti.com
SLOS263V – AUGUST 1999 – REVISED DECEMBER 2013
Typical Characteristics (continued)
INVERTING LARGE-SIGNAL
PULSE RESPONSE
INVERTING LARGE-SIGNAL
PULSE RESPONSE
Input
Input
LMV3xx
1 V/Div
1 V/Div
LMV3xx
LMV324S
LMV324S
VCC = ±2.5 V
RL = 2 kΩ
TA = 25°C
VCC = ±2.5 V
RL = 2 kΩ
TA = 85°C
1 µs/Div
1 µs/Div
Figure 34.
Figure 33.
INVERTING LARGE-SIGNAL
PULSE RESPONSE
INVERTING SMALL-SIGNAL
PULSE RESPONSE
Input
Input
LMV3xx
1 V/Div
50 mV/Div
LMV3xx
LMV324S
VCC = ±2.5 V
RL = 2 kΩ
TA = −40°C
LMV324S
VCC = ±2.5 V
RL = 2 kΩ
TA = 25°C
1 µs/Div
Figure 35.
Copyright © 1999–2013, Texas Instruments Incorporated
1 µs/Div
Figure 36.
Submit Documentation Feedback
15
LMV321, LMV358
LMV324, LMV324S
SLOS263V – AUGUST 1999 – REVISED DECEMBER 2013
www.ti.com
Typical Characteristics (continued)
INVERTING SMALL-SIGNAL
PULSE RESPONSE
Input
Input
LMV3xx
LMV3xx
50 mV/Div
50 mV/Div
INVERTING SMALL-SIGNAL
PULSE RESPONSE
LMV324S
LMV324S
VCC = ±2.5 V
RL = 2 kΩ
TA = −40°C
VCC = ±2.5 V
RL = 2 kΩ
TA = 85°C
1 µs/Div
1 µs/Div
Figure 38.
Figure 37.
INPUT CURRENT NOISE
vs
FREQUENCY
INPUT CURRENT NOISE
vs
FREQUENCY
0.50
0.80
0.60
0.40
0.20
VCC = 5 V
0.45
Input Current Noise − pA/ Hz
Input Current Noise − pA/ Hz
VCC = 2.7 V
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
0.00
10
100
1k
Frequency − Hz
Figure 39.
16
Submit Documentation Feedback
10k
10
100
1k
10k
Frequency − Hz
Figure 40.
Copyright © 1999–2013, Texas Instruments Incorporated
LMV321, LMV358
LMV324, LMV324S
www.ti.com
SLOS263V – AUGUST 1999 – REVISED DECEMBER 2013
Typical Characteristics (continued)
INPUT VOLTAGE NOISE
vs
FREQUENCY
THD + N
vs
FREQUENCY
10.000
200
160
1.000
140
THD − %
Input Voltage Noise − nV/ Hz
180
VCC = 2.7 V
RL = 10 kΩ
AV = 1
VO = 1 VPP
120
100
LMV3xx
0.100
80
VCC = 2.7 V
60
0.010
LMV324S
40
VCC = 5 V
0.001
20
10
100
1k
10
10k
100
10000
100000
Frequency − Hz
Frequency − Hz
Figure 41.
Figure 42.
THD + N
vs
FREQUENCY
THD + N
vs
FREQUENCY
10.000
10.000
VCC = 2.7 V
RL = 10 kΩ
AV = 10
VO = 1 VPP
1.000
1000
1.000
VCC = 5 V
RL = 10 kΩ
AV = 1
VO = 1 VPP
THD − %
THD − %
LMV324S
0.100
0.100
LMV324S
LMV3xx
0.010
0.010
LMV3xx
0.001
0.001
10
100
1000
10000
Frequency − Hz
Figure 43.
Copyright © 1999–2013, Texas Instruments Incorporated
100000
10
100
1000
10000
100000
Frequency − Hz
Figure 44.
Submit Documentation Feedback
17
LMV321, LMV358
LMV324, LMV324S
SLOS263V – AUGUST 1999 – REVISED DECEMBER 2013
www.ti.com
Typical Characteristics (continued)
THD + N
vs
FREQUENCY
10.000
VCC = 5 V
RL = 10 kΩ
AV = 10
VO = 2.5 VPP
1.000
THD − %
LMV324S
0.100
0.010
LMV3xx
0.001
10
100
1000
10000
100000
Frequency − Hz
Figure 45.
18
Submit Documentation Feedback
Copyright © 1999–2013, Texas Instruments Incorporated
LMV321, LMV358
LMV324, LMV324S
www.ti.com
SLOS263V – AUGUST 1999 – REVISED DECEMBER 2013
REVISION HISTORY
Changes from Revision T (September 2007) to Revision U
•
Page
Updated θJA value for DDU package. ................................................................................................................................... 3
Changes from Revision U (July 2012) to Revision V
Page
•
Updated document to new TI data sheet format. ................................................................................................................. 1
•
Added ESD warning. ............................................................................................................................................................ 2
•
Removed Ordering Information table. ................................................................................................................................... 2
•
Updated operating temperature range for LMV321IDCK. .................................................................................................... 3
Copyright © 1999–2013, Texas Instruments Incorporated
Submit Documentation Feedback
19
PACKAGE OPTION ADDENDUM
www.ti.com
31-Dec-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LMV321IDBVR
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
(RC1F ~ RC1K)
LMV321IDBVRG4
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
(RC1F ~ RC1K)
LMV321IDBVT
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
(RC1F ~ RC1K)
LMV321IDBVTE4
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
(RC1F ~ RC1K)
LMV321IDBVTG4
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
(RC1F ~ RC1K)
LMV321IDCKR
ACTIVE
SC70
DCK
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
(R3C ~ R3I ~ R3O ~
R3R ~ R3Z)
LMV321IDCKRG4
ACTIVE
SC70
DCK
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
(R3C ~ R3I ~ R3O ~
R3R ~ R3Z)
LMV321IDCKT
ACTIVE
SC70
DCK
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
(R3C ~ R3I ~ R3R)
LMV321IDCKTE4
ACTIVE
SC70
DCK
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
(R3C ~ R3I ~ R3R)
LMV321IDCKTG4
ACTIVE
SC70
DCK
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
(R3C ~ R3I ~ R3R)
LMV324ID
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
LMV324I
LMV324IDG4
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
LMV324I
LMV324IDR
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 125
LMV324I
LMV324IDRG4
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
LMV324I
LMV324IPWR
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 125
MV324I
LMV324IPWRE
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV324I
LMV324IPWRG4
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV324I
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
31-Dec-2013
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LMV324QD
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
LMV324Q
LMV324QDG4
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
LMV324Q
LMV324QDR
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
LMV324Q
LMV324QDRG4
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
LMV324Q
LMV324QPW
ACTIVE
TSSOP
PW
14
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV324Q
LMV324QPWE4
ACTIVE
TSSOP
PW
14
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV324Q
LMV324QPWG4
ACTIVE
TSSOP
PW
14
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV324Q
LMV324QPWR
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV324Q
LMV324QPWRG4
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV324Q
LMV324SI
LMV324SID
OBSOLETE
SOIC
D
16
TBD
Call TI
Call TI
-40 to 85
LMV324SIDE4
OBSOLETE
SOIC
D
16
TBD
Call TI
Call TI
-40 to 85
LMV324SIDG4
OBSOLETE
SOIC
D
16
TBD
Call TI
Call TI
-40 to 85
LMV324SIDR
OBSOLETE
SOIC
D
16
TBD
Call TI
Call TI
-40 to 85
LMV324SIDRE4
OBSOLETE
SOIC
D
16
TBD
Call TI
Call TI
-40 to 85
LMV324SIDRG4
OBSOLETE
SOIC
D
16
TBD
Call TI
Call TI
-40 to 85
LMV324SI
LMV324SIPWR
OBSOLETE
TSSOP
PW
16
TBD
Call TI
Call TI
-40 to 85
LMV324SIPWRE4
OBSOLETE
TSSOP
PW
16
TBD
Call TI
Call TI
-40 to 85
LMV324SIPWRG4
OBSOLETE
TSSOP
PW
16
TBD
Call TI
Call TI
-40 to 85
LMV358ID
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV358I
LMV358IDDUR
ACTIVE
VSSOP
DDU
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
RA5R
LMV358IDDURE4
ACTIVE
VSSOP
DDU
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
RA5R
LMV358IDDURG4
ACTIVE
VSSOP
DDU
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
RA5R
Addendum-Page 2
MV324SI
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
31-Dec-2013
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LMV358IDE4
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV358I
LMV358IDG4
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV358I
LMV358IDGKR
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
(R5B ~ R5Q ~ R5R)
LMV358IDGKRG4
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
(R5B ~ R5Q ~ R5R)
LMV358IDR
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 125
MV358I
LMV358IDRE4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV358I
LMV358IDRG4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV358I
LMV358IPW
ACTIVE
TSSOP
PW
8
150
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV358I
LMV358IPWE4
ACTIVE
TSSOP
PW
8
150
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV358I
LMV358IPWG4
ACTIVE
TSSOP
PW
8
150
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV358I
LMV358IPWR
ACTIVE
TSSOP
PW
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 125
MV358I
LMV358IPWRE4
ACTIVE
TSSOP
PW
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV358I
LMV358IPWRG4
ACTIVE
TSSOP
PW
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV358I
LMV358QD
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV358Q
LMV358QDDUR
ACTIVE
VSSOP
DDU
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
RAHR
LMV358QDDURE4
ACTIVE
VSSOP
DDU
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
RAHR
LMV358QDDURG4
ACTIVE
VSSOP
DDU
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
RAHR
LMV358QDE4
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV358Q
Addendum-Page 3
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
31-Dec-2013
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LMV358QDG4
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV358Q
LMV358QDGKR
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
(RHO ~ RHR)
LMV358QDGKRG4
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
(RHO ~ RHR)
LMV358QDR
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV358Q
LMV358QDRE4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV358Q
LMV358QDRG4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV358Q
LMV358QPWR
ACTIVE
TSSOP
PW
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV358Q
LMV358QPWRE4
ACTIVE
TSSOP
PW
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV358Q
LMV358QPWRG4
ACTIVE
TSSOP
PW
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV358Q
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 4
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
(4)
31-Dec-2013
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
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TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LMV324, LMV358 :
• Automotive: LMV324-Q1, LMV358-Q1
NOTE: Qualified Version Definitions:
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 5
PACKAGE MATERIALS INFORMATION
www.ti.com
15-Mar-2014
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
LMV321IDBVR
SOT-23
DBV
5
3000
178.0
9.0
LMV321IDBVR
SOT-23
DBV
5
3000
180.0
LMV321IDBVT
SOT-23
DBV
5
250
180.0
LMV321IDBVT
SOT-23
DBV
5
250
LMV321IDCKR
SC70
DCK
5
LMV321IDCKR
SC70
DCK
LMV321IDCKT
SC70
DCK
LMV321IDCKT
SC70
LMV324IDR
LMV324IDR
W
Pin1
(mm) Quadrant
3.23
3.17
1.37
4.0
8.0
Q3
9.2
3.17
3.23
1.37
4.0
8.0
Q3
9.2
3.17
3.23
1.37
4.0
8.0
Q3
178.0
9.0
3.23
3.17
1.37
4.0
8.0
Q3
3000
178.0
9.0
2.4
2.5
1.2
4.0
8.0
Q3
5
3000
180.0
9.2
2.3
2.55
1.2
4.0
8.0
Q3
5
250
178.0
9.0
2.4
2.5
1.2
4.0
8.0
Q3
DCK
5
250
180.0
9.2
2.3
2.55
1.2
4.0
8.0
Q3
SOIC
D
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
SOIC
D
14
2500
330.0
16.8
6.5
9.5
2.3
8.0
16.0
Q1
LMV324IDRG4
SOIC
D
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
LMV324IPWR
TSSOP
PW
14
2000
330.0
12.4
7.0
5.6
1.6
8.0
12.0
Q1
LMV324IPWRG4
TSSOP
PW
14
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
LMV324QDR
SOIC
D
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
LMV324QPWR
TSSOP
PW
14
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
LMV358IDDUR
VSSOP
DDU
8
3000
180.0
8.4
2.25
3.35
1.05
4.0
8.0
Q3
LMV358IDGKR
VSSOP
DGK
8
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LMV358IDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
15-Mar-2014
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LMV358IDR
SOIC
D
8
2500
330.0
12.8
6.4
5.2
2.1
8.0
12.0
Q1
LMV358IDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
LMV358IDRG4
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
LMV358IPWR
TSSOP
PW
8
2000
330.0
12.4
7.0
3.6
1.6
8.0
12.0
Q1
LMV358QDDUR
VSSOP
DDU
8
3000
180.0
8.4
2.25
3.35
1.05
4.0
8.0
Q3
LMV358QDGKR
VSSOP
DGK
8
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LMV358QDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LMV321IDBVR
SOT-23
DBV
5
3000
180.0
180.0
18.0
LMV321IDBVR
SOT-23
DBV
5
3000
205.0
200.0
33.0
LMV321IDBVT
SOT-23
DBV
5
250
205.0
200.0
33.0
LMV321IDBVT
SOT-23
DBV
5
250
180.0
180.0
18.0
LMV321IDCKR
SC70
DCK
5
3000
180.0
180.0
18.0
LMV321IDCKR
SC70
DCK
5
3000
205.0
200.0
33.0
LMV321IDCKT
SC70
DCK
5
250
180.0
180.0
18.0
LMV321IDCKT
SC70
DCK
5
250
205.0
200.0
33.0
LMV324IDR
SOIC
D
14
2500
333.2
345.9
28.6
LMV324IDR
SOIC
D
14
2500
364.0
364.0
27.0
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
15-Mar-2014
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LMV324IDRG4
SOIC
D
14
2500
333.2
345.9
28.6
LMV324IPWR
TSSOP
PW
14
2000
364.0
364.0
27.0
LMV324IPWRG4
TSSOP
PW
14
2000
367.0
367.0
35.0
LMV324QDR
SOIC
D
14
2500
367.0
367.0
38.0
LMV324QPWR
TSSOP
PW
14
2000
367.0
367.0
35.0
LMV358IDDUR
VSSOP
DDU
8
3000
202.0
201.0
28.0
LMV358IDGKR
VSSOP
DGK
8
2500
358.0
335.0
35.0
LMV358IDR
SOIC
D
8
2500
340.5
338.1
20.6
LMV358IDR
SOIC
D
8
2500
364.0
364.0
27.0
LMV358IDR
SOIC
D
8
2500
367.0
367.0
35.0
LMV358IDRG4
SOIC
D
8
2500
340.5
338.1
20.6
LMV358IPWR
TSSOP
PW
8
2000
364.0
364.0
27.0
LMV358QDDUR
VSSOP
DDU
8
3000
202.0
201.0
28.0
LMV358QDGKR
VSSOP
DGK
8
2500
358.0
335.0
35.0
LMV358QDR
SOIC
D
8
2500
340.5
338.1
20.6
Pack Materials-Page 3
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