NJW1154 2-CHANNEL ELECTRONIC VOLUME WITH INPUT SELECTOR ■ GENERAL DESCRIPTION NJW1154 is a two channel electronic volume with 6 in 1 out selector IC. It’s suitable for Input signal trimmer of audio equipments such as DVD recorder 2 and VCR. These functions are controlled by I C Bus. ■ FEATURES ● Operating Voltage 2 ● I C Bus control ● 6in 1out Input Selector ● Volume ● Bi-CMOS Technology ● Package Outline ■ PACKAGE OUTLINE NJW1154V 8 to 13V +12 to -12dB/3dBstep, MUTE SSOP32 22 19 18 100uF 17 GND Vref Internal Power Supply I2C Bus Interface Vref VREFOUT VDDOUT 20 NC 23 22uF C15 21 C16 SDA VREFIN C17 ALCOUT 10uF C18 24 25 10uF R5 10uF C19 26 27 47KΩ 47KΩ ALC1IN R4 1uF C20 10uF ALC2IN C27 ALCCNT 28 29 22KΩ R3 ROUT 10uF C23 10uF C22 LOUT 100uF V+ 30 31 SCL 32 V+ 12V 10uF C24 C25 10uF R1IN L1IN C28 ■ BLOCK DIAGRAM Vref ALC Control 62KΩ R2 1uF C21 ALCINT 1uF R1 ALCVTH R7IN 10uF C14 16 18KΩ 15 C26 14 10uF 13 10uF C13 R6IN 10uF C12 12 L7IN 11 10uF C11 R5IN L5IN 10uF C10 100uF C9 DCCAP_L1 10 L6IN 9 8 10uF C8 C7 10uF L4IN R2IN 10uF C6 100uF C5 DCCAP_R1 7 6 R4IN 5 4 10uF C4 C3 R3IN 10uF L3IN C1 L2IN 3 2 10uF C2 1 –1– NJW1154 ■ ABSOLUTE MAXIMUM RATING (Ta=25°°C) PARAMETER SYMBOL RATING UNIT 15 800 V Power Supply Voltage V+ Power Dissipation PD NOTE: EIA/JEDEC STANDARD Test board (76.2x114.3x1.6mm, 2layer, FR-4) mounting Operating Temperature Range Topr -20 to +75 °C Storage Temperature Range Tstg -40 to +125 °C mW ■ ELECTRICAL CHARACTERISTICS (Ta=25°°C,V+=+12V, RL=47kΩ Ω) PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT ◆ Power Supply Operating Voltage V+ 8 12 13 V Reference Voltage Supply Current Vref 5.5 6 6.5 V - 7 9 mA 3.2 3.7 - Vrms -0.5 0 0.5 dB +11 +12 +13 dB -13 -12 -11 dB -0.5 0 0.5 dB -0.5 0 0.5 dB - -110 - dB - -114 (2µ) -100 (10µ) dBV (Vrms) - 0.001 0.05 % ICC No signal ◆ Input/Output Characteristics (Output) Maximum Output Voltage VOM Voltage Gain 1 GV1 Voltage Gain 2 GV2 Voltage Gain 3 GV3 Voltage Gain Error 1 ∆GV1 Voltage Gain Error 2 ∆GV2 Maximum Attenuation ATT Output Noise VNO Total Harmonic Distortion T.H.D f=1KHz,THD=1% Volume=0dB VIN=1Vrms, f=1kHz Volume=0dB VIN=0.25Vrms, f=1kHz Volume=+12dB VIN=2.5Vrms, f=1kHz Volume=-12dB VIN=0.25Vrms, f=1kHz Volume=+12dB , Ach - Bch VIN=2.5Vrms, f=1kHz Volume=-12dB , Ach - Bch f=1KHz, VIN=1Vrms Volume=Mute, A-weighted Volume=0dB, Rg=0,A-weighted f=1KHz,Vo=1Vrms, Volume=0dB, BW:400 – 30kHz Cross Talk CT Selected Input : No signal Rg=0Ω Unselected Input : Input signal A-weighted - -100 - dB Channel Separation CS f=1KHz,Vo=1Vrms,A-weighted Volume=0dB - -100 -90 dB ◆ ALC Flat Level ALCFLT Vin = 300mVrms - 0 - dB ALC Cut Level ALCCUT Vin = 2Vrms - -12 - dB –2– NJW1154 2 ■ I C BUS BLOCK CHARACTERISTICS (SDA,SCL) 2 I C BUS Load Conditions: Pull up resistance 4kΩ (Connected to +5V), Load capacitance 200pF (Connected to GND) PARAMETER SYMBOL MIN. TYP. MAX. UNIT Low Level Input Voltage VIL 0.0 - 1.5 V High Level Input Voltage VIH 3.0 - 5.0 V Hysteresis of Schmitt trigger inputs Vhys 0.25 - - V LOW level output voltage (3mA at SDA pin) VOL 0 - 0.4 V Output fall time from VIHmin to VILmax with a bus capacitance from 10pF to 400pF tof 20+0.1Cb - 250 ns Pulse width of spikes which must be suppressed by the input filter tSP 0 - 50 ns Input current each I/O pin with an input voltage between 0.1VDD and 0.9VDDmax Ii -10 - 10 µA Capacitance for each I/O pin Ci - - 10 pF fSCL - - 400 kHz tHD:STA 0.6 - - µs LOW period of the SCL clock tLOW 1.3 - - µs HIGH period of the SCL clock tHIGH 0.6 - - µs Set-up time for a repeated START condition tSU:STA 0.6 - - µs Data hold time tHD:DAT 0 0.9 µs Data set-up time tSU:DAT 100 - - ns Rise time of both SDA and SCL signals tr - - 300 ns Fall time of both SDA and SCL signals tf - - 300 ns tSU:STO 0.6 - - µs Bus free time between a STOP and START condition tBUF 1.3 - - µs Capacitive load for each bus line Cb - - 400 pF Noise margin at the LOW level VnL 0.5 - - V Noise margin at the HIGH level VnH 1 - - V SCL clock frequency Hold time (repeated) START condition. Set-up time for STOP condition Cb ; total capacitance of one bus line in pF. SDA tBUF tR tHD:STA tF SCL tHD:STA tLOW P S tHD:DAT tHIGH tSU:STA tSU:DAT tSU:STO Sr P –3– –4– 1uF 62KΩ 18 C21 15 R2 14 ALCINT 13 18KΩ GND 1uF C26 I2C Bus Interface R1 19 ALCVTH 100uF 22uF C15 C16 C28 47KΩ R5 47KΩ R4 1uF C27 100uF VREFOUT VDDOUT SDA NC SCL VREFIN ALCOUT ALC1IN ALC2IN ALCCNT ROUT LOUT V+ R1IN L1IN 20 10uF 10uF C17 10uF C18 10uF C19 10uF C20 22KΩ R3 10uF 10uF C22 C23 V+ 12V 10uF C24 10uF C25 21 R7IN 10uF C14 12 L7IN 11 10uF C13 22 R6IN 10 10uF C12 23 L6IN 9 10uF C11 24 R5IN 8 10uF C10 25 L5IN 7 100uF C9 26 DCCAP_L1 6 10uF C8 27 R4IN 5 C7 4 10uF 28 L4IN Vref 10uF C6 29 R2IN 3 100uF C5 30 DCCAP_R1 2 10uF C4 C3 31 R3IN 1 10uF 10uF C2 C1 32 L3IN L2IN NJW1154 ■ APPLICATION CIRCUIT 17 Vref Internal Power Supply Vref ALC Control 16 NJW1154 2 ■ DEFINITION OF I C REGISTER 2 ♦I C BUS FORMAT MSB S LSB Slave Address 1bit 8bit MSB LSB A Select Address 1bit 8bit MSB LSB A 1bit Data A P 8bit 1bit 1bit S: Starting Term A: Acknowledge Bit P: Ending Term ♦SLAVE ADDRESS MSB LSB 1 0 0 0 0 0 1 R/W R/W=0: Receive Only R/W=1: No Output Data ♦CONTROL REGISTER TABLE The select address sets each function (Volume, Selector). The auto increment function cycles the select address as follows. 00H→01H→02H→00H Select Address BIT D7 D6 D4 D5 D3 D2 D1 00H Don’t Care VOLa 01H Don’t Care VOLb 02H D0 Selector Don’t Care ♦CONTROL REGISTER DEFAULT VALUE Control register default values are as follows : Select Address 00H 01H 02H BIT D7 D6 D5 D4 D3 D2 D1 D0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 –5– NJW1154 ■ CONTROL COMMAND TABLE a) Master Volume Select Address BIT D7 D6 00H 01H D5 D4 D3 D2 D1 D0 VOLa VOLb Don’t Care Don’t Care •VOLa / VOLb : Ach and Bch volume level setting from +12dB to -12dB with 3dB step. VOLa / VOLb D2 D1 Gain (dB) D3 +12 +9 +6 +3 0 -3 -6 -9 -12 Mute 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1 1 1 0 1 0 0 1 1 0 0 1 1 0 1 D7 D6 D5 D0 0 1 0 1 0 1 0 1 0 1 b)Input Selector Select Address BIT 02H D4 D3 D2 D1 D0 Selector Don’t Care •Selector : Input signal selecting Selector Input D2 D1 D0 L1IN / R1IN 0 0 0 L2IN / R2IN 0 0 1 L3IN, L4IN / R3IN, R4IN 0 1 0 L5IN / R5IN 0 1 1 L6IN / R6IN 1 0 0 L7IN / R7IN 1 0 1 [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. –6–