TI1 LM25019SDE 100-ma constant on-time synchronous buck regulator Datasheet

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LM25019
SNVS952E – DECEMBER 2012 – REVISED NOVEMBER 2015
LM25019 48-V, 100-mA Constant On-Time Synchronous Buck Regulator
1 Features
3 Description
•
•
The LM25019 is a 48-V, 100-mA synchronous stepdown regulator with integrated high-side and low-side
MOSFETs. The constant on-time (COT) control
scheme employed in the LM25019 requires no loop
compensation, provides excellent transient response,
and enables very high step-down ratios. The on-time
varies inversely with the input voltage resulting in
nearly constant frequency over the input voltage
range. A high-voltage start-up regulator provides bias
power for internal operation of the IC and for
integrated gate drivers.
1
•
•
•
•
•
•
•
•
•
•
•
•
•
Wide 7.5-V to 48-V Input Range
Integrated 100-mA High-Side and
Low-Side Switches
No Schottky Required
Constant On-Time Control
No Loop Compensation Required
Ultra-Fast Transient Response
Nearly Constant Operating Frequency
Intelligent Peak Current Limit
Adjustable Output Voltage From 1.225 V
Precision 2% Feedback Reference
Frequency Adjustable to 1 MHz
Adjustable Undervoltage Lockout
Remote Shutdown
Thermal Shutdown
Packages:
– 8-Pin WSON
– 8-Pin SO PowerPAD™
A peak current limit circuit protects against overload
conditions. The undervoltage lockout (UVLO) circuit
allows the input undervoltage threshold and
hysteresis to be independently programmed. Other
protection features include thermal shutdown and
bias supply undervoltage lockout.
The LM25019 is available in 8-pin WSON and 8-pin
SO PowerPAD plastic packages.
Device Information(1)
PART NUMBER
2 Applications
•
•
•
•
LM25019
Industrial Equipments
Smart Power Meters
Telecommunication Systems
Isolated Bias Supply
PACKAGE
BODY SIZE (NOM)
SO PowerPAD (8)
4.89 mm x 3.90 mm
WSON (8)
4.00 mm x 4.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application
LM25019
7.5 V - 48 V
VIN
7
+
CIN
4
RUV2
BST
VIN
SW
RON
SD
VCC
UVLO
FB
RUV1
CBST
L1
VOUT
CVCC
RON
3
+
8
RTN
1
+
2
6
RC
RFB2
5
+
RFB1
COUT
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM25019
SNVS952E – DECEMBER 2012 – REVISED NOVEMBER 2015
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
4
5
6.1
6.2
6.3
6.4
6.5
6.6
6.7
5
5
5
5
6
6
7
Absolute Maximum Ratings .....................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information .................................................
Electrical Characteristics...........................................
Switching Characteristics ..........................................
Typical Characteristics ..............................................
Detailed Description .............................................. 9
7.1 Overview ................................................................... 9
7.2 Functional Block Diagram ......................................... 9
7.3 Feature Description................................................. 10
7.4 Device Functional Modes........................................ 15
8
Application and Implementation ........................ 16
8.1 Application Information............................................ 16
8.2 Typical Application .................................................. 16
9 Power Supply Recommendations...................... 20
10 Layout................................................................... 20
10.1 Layout Guidelines ................................................. 20
10.2 Layout Example .................................................... 20
11 Device and Documentation Support ................. 21
11.1
11.2
11.3
11.4
11.5
Documentation Support ........................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
21
21
21
21
21
12 Mechanical, Packaging, and Orderable
Information ........................................................... 21
4 Revision History
Changes from Revision D (December 2014) to Revision E
Page
•
Changed 14 V to 13 V in VCC Regulator section .................................................................................................................. 10
•
Changed 8 to 4 on equation in Input Capacitor section ....................................................................................................... 18
•
Changed 0.06 μF to 0.12 μF in Input Capacitor section ...................................................................................................... 18
Changes from Revision C (December 2013) to Revision D
Page
•
Added Pin Configuration and Functions section, ESD Rating table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
•
Changed Soft-Start Circuit graphic....................................................................................................................................... 14
•
Changed Frequency Selection section, Inductor Selection section, Output Capacitor section, Input Capacitor
section, and UVLO Resistors section ................................................................................................................................... 17
•
Changed Series Ripple Resistor RC section to Type III Ripple Circuit ................................................................................ 18
Changes from Revision B (December 2013) to Revision C
•
Page
Added Thermal Parameters .................................................................................................................................................. 5
Changes from Revision A (September 2013) to Revision B
Page
•
Changed formatting throughout document to the TI standard ............................................................................................... 1
•
Changed minimum operating input voltage from 9 V to 7.5 V in Features ........................................................................... 1
•
Changed minimum operating input voltage from 9 V to 7.5 V in Typical Application ........................................................... 1
•
Changed minimum operating input voltage from 9 V to 7.5 V in Pin Descriptions ............................................................... 4
•
Added Absolute Maximum Junction Temperature.................................................................................................................. 5
•
Changed minimum operating input voltage from 9 V to 7.5 V in Recommended Operating Conditions .............................. 5
2
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Changes from Original (December 2012) to Revision A
•
Page
Added SW to RTN (100 ns transient) in Absolute Maximum Ratings table ........................................................................... 5
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SNVS952E – DECEMBER 2012 – REVISED NOVEMBER 2015
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5 Pin Configuration and Functions
8-Pin SO PowerPAD
DDA Package
Top View
RTN
1
VIN
2
UVLO
3
RON
4
SO
PowePAD-8
Exp Pad
8
SW
7
BST
6
VCC
5
FB
8-Pin WSON
NGU Package
Top View
RTN
1
VIN
2
UVLO
3
RON
4
8 SW
WSON-8
Exp Pad
7 BST
6 VCC
5 FB
Pin Functions
PIN
NO.
NAME
I/O
1
RTN
—
2
VIN
I
DESCRIPTION
APPLICATION INFORMATION
Ground
Ground connection of the integrated circuit.
Input Voltage
Operating input range is 7.5 V to 48 V.
3
UVLO
I
Input Pin of Undervoltage Comparator
Resistor divider from VIN to UVLO to GND programs
the undervoltage detection threshold. An internal
current source is enabled when UVLO is above 1.225 V
to provide hysteresis. When UVLO pin is pulled below
0.66 V externally, the regulator is in shutdown mode.
4
RON
I
On-Time Control
A resistor between this pin and VIN sets the buck switch
on-time as a function of VIN. Minimum recommended
on-time is 100 ns at max input voltage.
5
FB
I
Feedback
This pin is connected to the inverting input of the
internal regulation comparator. The regulation level is
1.225 V.
6
VCC
O
Output from the Internal High Voltage
Series Pass Regulator. Regulated at 7.6 V
The internal VCC regulator provides bias supply for the
gate drivers and other internal circuitry. A 1.0-μF
decoupling capacitor is recommended.
7
BST
I
Bootstrap Capacitor
An external capacitor is required between the BST and
SW pins (0.01-μF ceramic). The BST pin capacitor is
charged by the VCC regulator through an internal diode
when the SW pin is low.
8
SW
O
Switching Node
Power switching node. Connect to the output inductor
and bootstrap capacitor.
—
EP
—
Exposed Pad
Exposed pad must be connected to the RTN pin.
Solder to the system ground plane on application board
for reduced thermal resistance.
4
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6 Specifications
6.1 Absolute Maximum Ratings (1)
MIN
MAX
UNIT
VIN, UVLO to RTN
–0.3
53
V
SW to RTN
–1.5
VIN + 0.3
V
–5
VIN + 0.3
V
BST to VCC
53
V
BST to SW
13
V
SW to RTN (100 ns transient)
RON to RTN
–0.3
53
V
VCC to RTN
–0.3
13
V
FB to RTN
–0.3
5
V
200
°C
150
°C
150
°C
Lead Temperature (2)
Maximum Junction Temperature (3)
Storage temperature, Tstg
(1)
(2)
(3)
–55
Absolute Maximum Ratings are limits beyond which damage to the device may occur. Recommended Operating Conditions are
conditions under which operation of the device is intended to be functional. For specifications and test conditions, see Electrical
Characteristics . The RTN pin is the GND reference electrically connected to the substrate.
For detailed information on soldering plastic SO Power PAD-8 package, refer to the Packaging Data Book available from Texas
Instruments. Max solder time not to exceed 4 seconds.
High junction temperatures degrade operating lifetimes. Operating lifetime is de-rated for junction temperatures greater than 125°C.
6.2 ESD Ratings
VALUE
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
V(ESD)
(1)
(2)
Electrostatic discharge
(1)
UNIT
±2000
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
V
±750
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
7.5
48
V
−40
125
°C
VIN Voltage
Operating Junction Temperature
(1)
(2)
(2)
UNIT
Recommended Operating Conditions are conditions under the device is intended to be functional. For specifications and test conditions,
see Electrical Characteristics.
High junction temperatures degrade operating lifetimes. Operating lifetime is de-rated for junction temperatures greater than 125°C.
6.4 Thermal Information
LM25019
THERMAL METRICS (1)
WSON NGU
SO PowerPAD
DDA
UNIT
8 PINS
RθJA
Junction-to-ambient thermal resistance
41.3
41.1
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
3.2
2.4
°C/W
ΨJB
Junction-to-board thermal characteristic parameter
19.2
24.4
°C/W
RθJB
Junction-to-board thermal resistance
19.1
30.6
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
34.7
37.3
°C/W
ΨJT
Junction-to-top thermal characteristic parameter
0.3
6.7
°C/W
(1)
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report (SPRA953).
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6.5 Electrical Characteristics
Typical values correspond to TJ = 25°C. Minimum and maximum limits apply over –40°C to 125°C junction temperature range
unless otherwise stated. VIN = 48V unless stated otherwise. See (1).
PARAMETER
CONDITIONS
MIN
TYP
MAX
6.25
7.6
8.55
UNIT
VCC SUPPLY
VCC Reg
VCC Regulator Output
VIN = 48 V, ICC = 20 mA
VCC Current Limit
VIN = 48 V (2)
26
VCC Undervoltage Lockout Voltage
(VCC Increasing)
4.15
VCC Undervoltage Hysteresis
V
mA
4.5
4.9
300
V
mV
VCC Drop Out Voltage
VIN = 9 V, ICC = 20 mA
2.3
V
IIN Operating Current
Nonswitching, FB = 3 V
1.75
mA
IIN Shutdown Current
UVLO = 0 V
50
225
µA
Buck Switch RDS(ON)
ITEST = 100 mA, BST-SW = 7 V
0.8
1.8
Ω
Synchronous RDS(ON)
ITEST = 200 mA
0.45
1
Ω
Gate Drive UVLO
VBST − VSW Rising
3
3.6
SWITCH CHARACTERISTICS
2.4
Gate Drive UVLO Hysteresis
260
V
mV
CURRENT LIMIT
Current Limit Threshold
150
Current Limit Response Time
Time to Switch Off
Off-Time Generator (Test 1)
Off-Time Generator (Test 2)
270
370
mA
150
ns
FB = 0.1 V, VIN = 48 V
12
µs
FB = 1 V, VIN = 48 V
2.5
µs
REGULATION AND OVERVOLTAGE COMPARATORS
FB Regulation Level
Internal Reference Trip Point for Switch
ON
FB Overvoltage Threshold
Trip Point for Switch OFF
1.2
FB Bias Current
1.225
1.25
V
1.62
V
60
nA
UNDERVOLTAGE SENSING FUNCTION
UV Threshold
UV Rising
1.19
1.225
1.26
V
UV Hysteresis Input Current
UV = 2.5 V
–10
–20
–29
µA
Remote Shutdown Threshold
Voltage at UVLO Falling
0.32
0.66
V
110
mV
165
°C
20
°C
Remote Shutdown Hysteresis
THERMAL SHUTDOWN
Tsd
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
(1)
(2)
All hot and cold limits are specified by correlating the electrical characteristics to process and temperature variations and applying
statistical process control.
VCC provides self bias for the internal gate drive and control circuits. Device thermal limitations limit external loading.
6.6 Switching Characteristics
Typical values correspond to TJ = 25°C. Minimum and maximum limits apply over –40°C to 125°C junction temperature range
unless otherwise stated. VIN = 48 V unless otherwise stated.
MIN
TYP
MAX
UNIT
ON-TIME GENERATOR
TON Test 1
VIN = 32 V, RON = 100 kΩ
270
350
460
ns
TON Test 2
VIN = 48 V, RON = 100 kΩ
188
250
336
ns
TON Test 4
VIN = 10 V, RON = 250 kΩ
1880
3200
4425
ns
MINIMUM OFF-TIME
Minimum Off-Timer
6
FB = 0 V
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144
ns
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6.7 Typical Characteristics
8
100
VOUT=10V, fsw=240 kHz
7
90
5
VCC (V)
Efficiency (%)
6
80
70
4
3
60
2
15V
24V
36V
48V
50
40
20
40
60
80
1
VCCvsVIN
0
0
100
2
4
6
Load Current (mA)
8
10
12
C004
C011
Figure 1. Efficiency at 240 kHz, 10 V
Figure 2. VCC vs VIN
8
8
7
VIN=48V
VIN=24V
VIN=48V
VIN=24V
7
6
6
ICC (mA)
5
VCC (V)
14
VIN (V)
4
3
1 MHz
5
4
450 kHz
2
3
1
VIN=15V
0
2
0
10
20
30
40
50
60
8
9
10
ICC (mA)
11
12
13
C012
C013
Figure 3. VCC vs ICC
Figure 4. ICC vs External VCC
20
Current Limit Off-Time (µs)
10,000
On-Time (ns)
14
VCC (V)
1,000
100
RON=499KOhms
VIN=48V
VIN=36V
VIN=24V
VIN=14V
16
12
8
4
RON=250kOhms
RON=100kOhms
10
10
20
30
40
50
VIN (V)
0
0.00
0.25
0.50
0.75
1.00
1.25
VFB (V)
C014
Figure 5. TON vs VIN and RON
C015
Figure 6. TOFF (ILIM) vs VFB and VIN
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Typical Characteristics (continued)
1.84
120
UVLO=VIN, FB=3V
UVLO=0
100
Shutdown Current (µA)
Operating Current (mA)
1.80
1.76
1.72
1.68
1.64
80
60
40
20
1.60
0
0
10
20
30
40
50
0
10
VIN (V)
20
30
40
50
VIN (V)
C016
C017
Figure 7. IIN vs VIN (Operating, Nonswitching)
Figure 8. IIN vs VIN (Shutdown)
300
Frequency (kHz)
250
200
150
100
RON=499kOhms,
VOUT=10V
50
10
15
20
25
30
35
40
45
50
VIN (V)
C010
Figure 9. Switching Frequency vs VIN
8
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7 Detailed Description
7.1 Overview
The LM25019 step-down switching regulator features all the functions needed to implement a low-cost, efficient,
buck converter that can supply up to 100 mA to the load. This high-voltage regulator contains 48 V, N-channel
buck and synchronous switches, is easy to implement, and is provided in thermally enhanced SO PowerPAD-8
and WSON-8 packages. The regulator operation is based on a constant on-time control scheme using an ontime inversely proportional to VIN. This control scheme does not require loop compensation. The current limit is
implemented with a forced off-time inversely proportional to VOUT. This scheme ensures short circuit protection
while providing minimum foldback. The simplified block diagram of the LM25019 device is shown in Figure 10.
The LM25019 device can be applied in numerous applications to efficiently regulate down higher voltages. This
regulator is well suited for 12-V and 24-V rails. Protection features include: thermal shutdown, undervoltage
lockout, minimum forced off-time, and an intelligent current limit.
7.2 Functional Block Diagram
LM25019
START-UP
REGULATOR
VIN
VCC
V UVLO
20 µA
4.5V
UVLO
THERMAL
SHUTDOWN
UVLO
1.225V
SD
VDD REG
BST
0.66V
SHUTDOWN
BG REF
VIN
DISABLE
ON/OFF
TIMERS
RON
1.225V
SW
COT CONTROL
LOGIC
FEEDBACK
FB
ILIM
COMPARATOR
OVER-VOLTAGE
1.62V
CURRENT
LIMIT
ONE-SHOT
+
-
RTN
VILIM
Figure 10. Functional Block Diagram
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7.3 Feature Description
7.3.1 Control Overview
The LM25019 buck regulator employs a control principle based on a comparator and a one-shot on-timer, with
the output voltage feedback (FB) compared to an internal reference (1.225 V). If the FB voltage is below the
reference the internal buck switch is turned on for the one-shot timer period, which is a function of the input
voltage and the programming resistor (RON). Following the on-time the switch remains off until the FB voltage
falls below the reference, but never before the minimum off-time forced by the minimum off-time one-shot timer.
When the FB pin voltage falls below the reference and the minimum off-time one-shot period expires, the buck
switch is turned on for another on-time one-shot period. This will continue until regulation is achieved and the FB
voltage is approximately equal to 1.225 V (typ).
In a synchronous buck converter, the low-side (sync) FET is on when the high-side (buck) FET is off. The
inductor current ramps up when the high-side switch is on and ramps down when the high-side switch is off.
There is no diode emulation feature in this IC, and therefore, the inductor current may ramp in the negative
direction at light load. This causes the converter to operate in continuous conduction mode (CCM) regardless of
the output loading. The operating frequency remains relatively constant with load and line variations. The
operating frequency can be calculated as shown in Equation 1.
fSW
VOUT
9 u 10
11
u RON
(1)
The output voltage (VOUT) is set by two external resistors (RFB1, RFB2). The regulated output voltage is calculated
as shown in Equation 2.
VOUT = 1.225V x
RFB2 + RFB1
RFB1
(2)
This regulator regulates the output voltage based on ripple voltage at the feedback input, requiring a minimum
amount of ESR for the output capacitor (COUT). A minimum of 25 mV of ripple voltage at the feedback pin (FB) is
required for the LM25019. In cases where the capacitor ESR is too small, additional series resistance may be
required (RC in Figure 11).
For applications where lower output voltage ripple is required the output can be taken directly from a low ESR
output capacitor, as shown in Figure 11. However, RC slightly degrades the load regulation.
L1
VOUT
SW
LM25019
RFB2
FB
RC
+
RFB1
VOUT
(low ripple)
COUT
Figure 11. Low Ripple Output Configuration
7.3.2 VCC Regulator
The LM25019 device contains an internal high-voltage linear regulator with a nominal output of 7.6 V. The input
pin (VIN) can be connected directly to the line voltages up to 48 V. The VCC regulator is internally current limited
to 30 mA. The regulator sources current into the external capacitor at VCC. This regulator supplies current to
internal circuit blocks including the synchronous MOSFET driver and the logic circuits. When the voltage on the
VCC pin reaches the UVLO threshold of 4.5 V, the IC is enabled.
The VCC regulator contains an internal diode connection to the BST pin to replenish the charge in the gate drive
boot capacitor when SW pin is low.
At high input voltages, the power dissipated in the high-voltage regulator is significant and can limit the overall
achievable output power. As an example, with the input at 48 V and switching at high frequency, the VCC
regulator may supply up to 7 mA of current resulting in 48 V × 7 mA = 336 mW of power dissipation. If the VCC
voltage is driven externally by an alternate voltage source, between 8.55 V and 13 V, the internal regulator is
disabled. This reduces the power dissipation in the IC.
10
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Feature Description (continued)
7.3.3 Regulation Comparator
The feedback voltage at FB is compared to an internal 1.225 V reference. In normal operation, when the output
voltage is in regulation, an on-time period is initiated when the voltage at FB falls below 1.225 V. The high-side
switch will stay on for the on-time, causing the FB voltage to rise above 1.225 V. After the on-time period, the
high-side switch will stay off until the FB voltage again falls below 1.225 V. During start-up, the FB voltage will be
below 1.225 V at the end of each on-time, causing the high-side switch to turn on immediately after the minimum
forced off-time of 144 ns. The high-side switch can be turned off before the on-time is over if the peak current in
the inductor reaches the current limit threshold.
7.3.4 Overvoltage Comparator
The feedback voltage at FB is compared to an internal 1.62 V reference. If the voltage at FB rises above 1.62 V
the on-time pulse is immediately terminated. This condition can occur if the input voltage and/or the output load
changes suddenly. The high-side switch will not turn on again until the voltage at FB falls below 1.225 V.
7.3.5 On-Time Generator
The on-time for the LM25019 device is determined by the RON resistor, and is inversely proportional to the input
voltage (VIN), resulting in a nearly constant frequency as VIN is varied over its range. The on-time equation for the
LM25019 device is shown in Equation 3.
TON
10
10
u RON
VIN
(3)
See Figure 5. RON should be selected for a minimum on-time (at maximum VIN) greater than 100 ns, for proper
operation. This requirement limits the maximum switching frequency for high VIN.
7.3.6 Current Limit
The LM25019 device contains an intelligent current limit off-timer. If the current in the buck switch exceeds
240 mA, the present cycle is immediately terminated, and a nonresetable off-timer is initiated. The length of offtime is controlled by the FB voltage and the input voltage VIN. As an example, when FB = 0 V and VIN = 48 V, the
maximum off-time is set to 16 μs. This condition occurs when the output is shorted, and during the initial part of
start-up. This amount of time ensures safe short circuit operation up to the maximum input voltage of 48 V.
In cases of overload where the FB voltage is above zero volts (not a short circuit) the current limit off-time is
reduced. Reducing the off-time during less severe overloads reduces the amount of foldback, recovery time, and
start-up time. The off-time is calculated from Equation 4.
TOFF(ILIM) =
0.07 x VIN
Ps
VFB + 0.2V
(4)
The current limit protection feature is peak limited. The maximum average output will be less than the peak.
7.3.7 N-Channel Buck Switch and Driver
The LM25019 device integrates an N-Channel Buck switch and associated floating high voltage gate driver. The
gate driver circuit works in conjunction with an external bootstrap capacitor and an internal high voltage diode. A
0.01-uF ceramic capacitor connected between the BST pin and the SW pin provides the voltage to the driver
during the on-time. During each off-time, the SW pin is at approximately 0 V, and the bootstrap capacitor charges
from VCC through the internal diode. The minimum off-timer, set to 144 ns, ensures a minimum time each cycle to
recharge the bootstrap capacitor.
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Feature Description (continued)
7.3.8 Synchronous Rectifier
The LM25019 device provides an internal synchronous N-channel MOSFET rectifier. This MOSFET provides a
path for the inductor current to flow when the high-side MOSFET is turned off.
The synchronous rectifier has no diode emulation mode, and is designed to keep the regulator in continuous
conduction mode even during light loads which would otherwise result in discontinuous operation.
7.3.9 Undervoltage Detector
The LM25019 device contains a dual-level UVLO circuit. A summary of threshold voltages and operational states
is provided in Device Functional Modes. When the UVLO pin voltage is below 0.66 V, the controller is in a low
current shutdown mode. When the UVLO pin voltage is greater than 0.66 V but less than 1.225 V, the controller
is in standby mode. In standby mode the VCC bias regulator is active while the regulator output is disabled. When
the VCC pin exceeds the VCC undervoltage threshold and the UVLO pin voltage is greater than 1.225 V, normal
operation begins. An external set-point voltage divider from VIN to GND can be used to set the minimum
operating voltage of the regulator.
UVLO hysteresis is accomplished with an internal 20-μA current source that is switched on or off into the
impedance of the set-point divider. When the UVLO threshold is exceeded, the current source is activated to
quickly raise the voltage at the UVLO pin. The hysteresis is equal to the value of this current times the resistance
RUV2.
If the UVLO pin is wired directly to the VIN pin, the regulator will begin operation once the VCC undervoltage is
satisfied.
VIN
CIN
2
VIN
+
RUV2
LM25019
3
UVLO
RUV1
Figure 12. UVLO Resistor Setting
7.3.10 Thermal Protection
The LM25019 device should be operated so the junction temperature does not exceed 150°C during normal
operation. An internal Thermal Shutdown circuit is provided to protect the LM25019 in the event of a higher than
normal junction temperature. When activated, typically at 165°C, the controller is forced into a low power reset
state, disabling the buck switch and the VCC regulator. This feature prevents catastrophic failures from accidental
device overheating. When the junction temperature reduces below 145°C (typical hysteresis = 20°C), the VCC
regulator is enabled, and normal operation is resumed.
12
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Feature Description (continued)
7.3.11 Ripple Configuration
LM25019 uses Constant-On-Time (COT) control scheme, in which the on-time is terminated by an on-timer, and
the off-time is terminated by the feedback voltage (VFB) falling below the reference voltage (VREF). Therefore, for
stable operation, the feedback voltage must decrease monotonically, in phase with the inductor current during
the off-time. Furthermore, this change in feedback voltage (VFB) during off-time must be large enough to
suppress any noise component present at the feedback node.
Table 1 shows three different methods for generating appropriate voltage ripple at the feedback node. Type 1
and Type 2 ripple circuits couple the ripple at the output of the converter to the feedback node (FB). The output
voltage ripple has two components:
1. Capacitive ripple caused by the inductor current ripple charging/discharging the output capacitor.
2. Resistive ripple caused by the inductor current ripple flowing through the ESR of the output capacitor.
The capacitive ripple is not in phase with the inductor current. As a result, the capacitive ripple does not
decrease monotonically during the off-time. The resistive ripple is in phase with the inductor current and
decreases monotonically during the off-time. The resistive ripple must exceed the capacitive ripple at the output
node (VOUT) for stable operation. If this condition is not satisfied unstable switching behavior is observed in COT
converters, with multiple on-time bursts in close succession followed by a long off-time.
Type 3 ripple method uses Rr and Cr and the switch node (SW) voltage to generate a triangular ramp. This
triangular ramp is ac coupled using Cac to the feedback node (FB). Because this circuit does not use the output
voltage ripple, it is ideally suited for applications where low output voltage ripple is required. See AN-1481
Controlling Output Ripple and Achieving ESR Independence in Constant On-Time (COT) Regulator Designs
(SNVA166) for more details for each ripple generation method.
Table 1. Ripple Configurations
TYPE 1
LOWEST COST CONFIGURATION
TYPE 2
REDUCED RIPPLE CONFIGURATION
VOUT
TYPE 3
MINIMUM RIPPLE CONFIGURATION
VOUT
L1
VOUT
L1
L1
R FB2
Cac
R FB2
RC
To FB
C OUT
COUT
R FB2
GND
R FB1
GND
25 mV VOUT
x
ûIL(MIN) VREF
Cr
Cac
To FB
R FB1
RC >
Rr
RC
C OUT
To FB
R FB1
GND
C>
(5)
Cr = 3300 pF
Cac = 100 nF
(VIN(MIN) - VOUT) x TON
RrCr <
25 mV
5
gsw (RFB2||RFB1)
25 mV
RC >
ûIL(MIN)
(6)
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7.3.12 Soft Start
A soft-start feature can be implemented with the LM25019 device using an external circuit. As shown in
Figure 13, the soft-start circuit consists of one capacitor C1, two resistors, R1 and R2, and a diode, D. During the
initial start-up, the VCC voltage is established before the VOUT voltage. Capacitor C1 is discharged and D is
thereby forward biased. The FB voltage is pulled up above the reference voltage (1.225 V) and switching is
thereby disabled. As capacitor C1 charges, the voltage at node B gradually decreases and switching
commences. VOUT gradually rises to maintain the FB voltage at the reference voltage. Once the voltage at node
B is less than a diode drop above the FB voltage, the soft-start sequence is finished and D is reverse-biased.
During the initial part of the start-up, the FB voltage can be approximated as shown in Equation 8.
VFB = (VCC - VD) x
RFB1 x RFB2
R2 x (RFB1 + RFB2) + RFB1 x RFB2
(8)
C1 is charged after the first start up. Diode D1 is optional and can be added to discharge C1 and initialize the
soft-start sequence when the input voltage experiences a momentary drop.
To achieve the desired soft-start, the following design guidance is recommended:
(1) R2 is selected so that VFB is higher than 1.225 V for a VCC of 4.5 V, but is lower than 5 V when VCC is 8.55 V.
If an external VCC is used, VFB should not exceed 5 V at maximum VCC.
(2) C1 is selected to achieve the desired start-up time that can be determined from Equation 9.
tS = C1 x (R2 +
RFB1 x RFB2
)
RFB1 + RFB2
(9)
(3) R1 is used to maintain the node B voltage at zero after the soft-start is finished. A value larger than the
feedback resistor divider is preferred. The effect of resistor R1 is ignored in Equation 9.
With component values from the applications schematic shown in Figure 14, selecting C1 = 1 uF, R2 = 1 kΩ, R1 =
30 kΩ results in a soft-start time of about 2 ms.
VOUT
VCC
C1
RFB2
R2
To FB
D
D1
B
RFB1
R1
Figure 13. Soft-Start Circuit
14
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7.4 Device Functional Modes
The UVLO pin controls the operating mode of the LM25018 device (see Table 2 for the detailed functional
states).
Table 2. UVLO Mode
UVLO
VCC
MODE
DESCRIPTION
< 0.66 V
Disabled
Shutdown
VCC regulator disabled.
Switching disabled.
0.66 V – 1.225 V
Enabled
Standby
VCC regulator enabled
Switching disabled.
VCC < 4.5 V
Standby
VCC regulator enabled.
Switching disabled.
VCC > 4.5 V
Operating
> 1.225 V
VCC enabled.
Switching enabled.
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The LM25019 device is step-down DC-DC converter. The device is typically used to convert a higher DC voltage
to a lower DC voltage with a maximum available output current of 650 mA. Use the following design procedure to
select component values for the LM25019 device. Alternately, use the WEBENCH® software to generate a
complete design. The WEBENCH software uses an iterative design procedure and accesses a comprehensive
database of components when generating a design. This section presents a simplified discussion of the design
process.
8.2 Typical Application
The application schematic of a buck supply is shown in Figure 14. For output voltage (VOUT) more than one diode
drop higher than the maximum regulation voltage of VCC (8.55 V, see Electrical Characteristics), the VCC pin can
be connected to VOUT through a diode (D2), as shown in Figure 14, to improve efficiency and reduce power
dissipation in the IC.
The design example shown in Figure 14 uses equations from the Feature Description section with component
names provided in the Typical Application schematic. Corresponding component designators from Figure 14 are
also provided for each selected value.
SW
(TP6)
12.5 V - 48 V
VIN
(TP1)
C4
1µF
LM25019
2
+
C5 +
R5
0.1µF 127 kΩ
GND
(TP2)
(TP4)
UVLO/SD
4
R3
237 kΩ 3
BST
VIN
SW
RON
7 0.01 µF
+
C1
8
R4
46.4 kΩ
UVLO
VCC
R7
14 kΩ
FB
EXP
220 µH
L1
RTN
1
6
D2
VOUT
3300 pF
C8
0.1 µF
R1
6.98 kΩ
(TP3)
R2
0Ω
+ C9
4.7 µF
5
+
U1
C6
0Ω
R8
C7
1 µF
R6
1 kΩ
GND
(TP5)
Figure 14. Final Schematic for 12.5-V to 48-V Input, and 10-V, 100-mA Output Buck Converter
8.2.1 Design Requirements
DESIGN PARAMETERS
VALUE
Input Range
12.5 V to 48 V
Output Voltage
10 V
Maximum Output Current
100 mA
≈ 440 kHz
Nominal Switching Frequency
16
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8.2.2 Detailed Design Procedure
8.2.2.1 RFB1, RFB2
VOUT = VFB × (RFB2 / RFB1 + 1), and because VFB = 1.225 V, the ratio of RFB2 to RFB1 calculates as 7:1. Standard
values are chosen with RFB2 = R1 = 6.98 kΩ and RFB1 = R6 = 1.00 kΩ. Other values could be used as long as
the 7:1 ratio is maintained.
8.2.2.2 Frequency Selection
At the minimum input voltage, the maximum switching frequency of LM25019 is restricted by the forced minimum
off-time (TOFF(MIN)) as shown in Equation 10.
gSW(MAX) =
1 - DMAX
1 - 10/12.5
=
= 1 MHz
200 ns
TOFF(MIN)
(10)
Similarly, at maximum input voltage, the maximum switching frequency of LM25019 is restricted by the minimum
TON as shown in Equation 11.
gSW(MAX) =
DMIN
10/48
=
= 2.1 MHz
TON(MIN) 100 ns
(11)
Resistor RON sets the nominal switching frequency based on Equation 12.
VOUT
¦SW
K u RON
(12)
Where:
K = 9 x 10–11
Operation at high switching frequency results in lower efficiency while providing the smallest solution. Using
440 kHz as the target swtiching frequency, the calculated valued of RON is 253 kΩ. The standard value for RON =
R3 = 237 kΩ is selected.
8.2.2.3 Inductor Selection
The inductance selection is a compromise between solution size, output ripple, and efficiency. The peak inductor
current at maximum load current should be smaller than the minimum current limit of 150 mA. The maximum
permissible peak to peak inductor ripple is determined by Equation 13.
ΔIL = 2 × (ILIM(min) – IOUT(max)) = 2 × 50 = 100 mA
(13)
The minimum inductance is determined by Equation 14.
ûIL =
VIN - VOUT VOUT
x
VIN
L1 x gSW
(14)
Using maximum VIN of 48V, the calculation from Equation 14 results in L = 179 μH. A standard value of 220 μH
is selected. For proper operation, the inductor saturation current should be higher than the peak current
encountered in the application. For robust short circuit protection, the inductor saturation current should be higher
than the maximum current limit of 300 mA.
8.2.2.4 Output Capacitor
The output capacitor is selected to minimize the capacitive ripple across it. The maximum ripple is observed at
maximum input voltage and is shown in Equation 15.
COUT =
ûIL
8 x gsw x ûVripple
(15)
Where:
ΔVripple is the voltage ripple across the capacitor and ΔIL is calculated using Equation 14.
Substituting ΔVripple = 5 mV gives COUT = 4.65 μF. A 4.7-μF standard value is selected for COUT =C9. An X5R or
X7R type capacitor with a voltage rating 16 V or higher should be selected.
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8.2.2.5 Type III Ripple Circuit
Type III ripple circuit as described in Ripple Configuration is chosen for this example. For a constant on-time
converter to be stable, the injected in-phase ripple should be larger than the capacitive ripple on COUT.
Using type III ripple circuit equations, the target ripple should be greater than the capacitive ripple generated at
the primary output.
Cr = C6 = 3300 pF
Cac = C8 = 100 nF
Rr d
(VIN(MIN) VOUT ) u TON(VINMIN)
(25mV u Cr )
(16)
For TON, refer to Equation 3.
Ripple resistor Rr is calculated to be 57.6 kΩ. This value provides the minimum ripple for stable operation. A
smaller resistance should be selected to allow for variations in TON, COUT, and other components. Rr = R4 =
46.4 kΩ is selected for this example application.
8.2.2.6 VCC and Bootstrap Capacitor
The VCC capacitor provides charge to bootstrap capacitor as well as internal circuitry and low-side gate driver.
The bootstrap capacitor provides charge to high-side gate driver. The recommended value for CVCC = C7 is
1-μF. A good value for CBST = C1 is 0.01 μF.
8.2.2.7 Input Capacitor
The input capacitor should be large enough to limit the input voltage ripple and can be calculated using
Equation 17.
CIN >
IOUT(MAX)
4 x gSW x ûVIN
(17)
Choosing a ΔVIN = 0.5 V gives a minimum CIN = 0.12 μF. A standard value of 1 μF is selected for CIN = C4. The
input capacitor should be rated for the maximum input voltage under all conditions. A 50-V, X7R dielectric should
be selected for this design.
The input capacitor should be placed directly across VIN and RTN (pin 2 and 1) of the IC. If it is not possible to
place all of the input capacitor close to the IC, a 0.1-μF capacitor should be placed near the IC to provide a
bypass path for the high-frequency component of the switching current. This helps limit the switching noise.
8.2.2.8 UVLO Resistors
The UVLO resistors RUV1 and RUV2 set the UVLO threshold and hysteresis according to Equation 18 and
Equation 19.
VIN(HYS) = IHYS x RUV2
(18)
RUV2
+ 1)
VIN (UVLO,rising) = 1.225V x (
RUV1
(19)
Where:
IHYS = 20 μA
Selecting UVLO hysteresis of 2.5 V and UVLO rising threshold of 12 V results in RUV1 = 14.53 kΩ and
RUV2 = 125 kΩ. Selecting a standard value of RUV1 = R7 = 14 kΩ and RUV2 = R5 = 127 kΩ results in UVLO
thresholds and hysteresis of 12.5 V to 2.5 V, respectively.
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8.2.3 Application Curves
100
550
VIN=15V
VIN=24V
VIN=36V
90
500
450
FREQUENCY (kHz)
80
Efficiency (%)
70
60
50
40
30
400
350
300
250
200
20
150
10
100
0
50
0
20
40
60
80
100
IOUT (mA)
120
10
Figure 15. Efficiency vs Load Current
15
20
25
30
35
40
45
INPUT VOLTAGE (V)
C001
50
C002
Figure 16. Frequency vs Input Voltage (IOUT = 100 mA)
Figure 17. Typical Switching Waveform (VIN = 24 V, IOUT = 100 mA)
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9 Power Supply Recommendations
LM25019 is a power-management device. The power supply for the device is any DC voltage source within the
specified input range.
10 Layout
10.1 Layout Guidelines
A proper layout is essential for optimum performance of the circuit. In particular, the following guidelines should
be observed:
1. CIN: The loop consisting of input capacitor (CIN), VIN pin, and RTN pin carries switching currents. Therefore,
the input capacitor should be placed close to the IC, directly across VIN and RTN pins and the connections to
these two pins should be direct to minimize the loop area. In general it is not possible to accommodate all of
input capacitance near the IC. A good practice is to use a 0.1-μF or 0.47-μF capacitor directly across the VIN
and RTN pins close to the IC, and the remaining bulk capacitor as close as possible (see Figure 18).
2. CVCC and CBST: The VCC and bootstrap (BST) bypass capacitors supply switching currents to the high and
low-side gate drivers. These two capacitors should also be placed as close to the IC as possible, and the
connecting trace length and loop area should be minimized (see Figure 18).
3. The feedback trace carries the output voltage information and a small ripple component that is necessary for
proper operation of LM25019. Therefore, take care while routing the feedback trace to avoid coupling any
noise to this pin. In particular, feedback trace should not run close to magnetic components, or parallel to any
other switching trace.
4. SW trace: The SW node switches rapidly between VIN and GND every cycle and is therefore a possible
source of noise. The SW node area should be minimized. In particular, the SW node should not be
inadvertently connected to a copper plane or pour.
10.2 Layout Example
RTN
1
VIN
2
UVLO
3
RON
4
8
SW
7
BST
6
VCC
5
FB
CIN
SO
Power
PAD-8
CVCC
Figure 18. Placement of Bypass Capacitors
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11 Device and Documentation Support
11.1 Documentation Support
11.1.1 Related Documentation
•
•
•
AN-1481 Controlling Output Ripple and Achieving ESR Independence in Constant On-Time (COT) Regulator
Designs (SNVA166)
AN-2292 Designing an Isolated Buck (Flybuck) Converter (SNVA674)
LM25019 Isolated Evaluation Board (SNOU100)
11.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.3 Trademarks
PowerPAD, E2E are trademarks of Texas Instruments.
WEBENCH is a registered trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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4-Mar-2015
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LM25019MR/NOPB
ACTIVE SO PowerPAD
DDA
8
95
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
L25019
MR
LM25019MRE/NOPB
ACTIVE SO PowerPAD
DDA
8
250
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
L25019
MR
LM25019MRX/NOPB
ACTIVE SO PowerPAD
DDA
8
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
L25019
MR
LM25019SD/NOPB
ACTIVE
WSON
NGU
8
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
L25019
LM25019SDE/NOPB
ACTIVE
WSON
NGU
8
250
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
L25019
LM25019SDX/NOPB
ACTIVE
WSON
NGU
8
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
L25019
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
4-Mar-2015
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Mar-2015
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LM25019MRE/NOPB
SO
Power
PAD
DDA
8
250
178.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
LM25019MRX/NOPB
SO
Power
PAD
DDA
8
2500
330.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
LM25019SD/NOPB
WSON
NGU
8
1000
178.0
12.4
4.3
4.3
1.3
8.0
12.0
Q1
LM25019SDE/NOPB
WSON
NGU
8
250
178.0
12.4
4.3
4.3
1.3
8.0
12.0
Q1
LM25019SDX/NOPB
WSON
NGU
8
4500
330.0
12.4
4.3
4.3
1.3
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Mar-2015
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM25019MRE/NOPB
SO PowerPAD
DDA
LM25019MRX/NOPB
SO PowerPAD
DDA
8
250
213.0
191.0
55.0
8
2500
367.0
367.0
35.0
LM25019SD/NOPB
WSON
NGU
8
1000
210.0
185.0
35.0
LM25019SDE/NOPB
WSON
NGU
8
250
210.0
185.0
35.0
LM25019SDX/NOPB
WSON
NGU
8
4500
367.0
367.0
35.0
Pack Materials-Page 2
MECHANICAL DATA
DDA0008B
MRA08B (Rev B)
www.ti.com
MECHANICAL DATA
NGU0008B
SDC08B (Rev A)
www.ti.com
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