Maxim MAX16928AGUPV Automotive tft-lcd power supply with boost converter and gate voltage regulator Datasheet

19-5991; Rev 0; 7/11
EVALUATION KIT AVAILABLE
MAX16928
Automotive TFT-LCD Power Supply with Boost
Converter and Gate Voltage Regulators
General Description
Features
The MAX16928 is a highly integrated power supply
for automotive TFT-LCD applications. The device integrates one boost converter, one 1.8V/3.3V regulator
controller, and two gate voltage regulators. The device
comes in several versions to satisfy common automotive
TFT-LCD power-supply requirements (see the Ordering
Information table).
S High-Power (Up to 6W) Boost Output Providing Up
The boost converter uses spread-spectrum modulation to
reduce peak interference and to optimize EMI performance.
to 18V
S 1.8V or 3.3V Regulator Provides 500mA with
External npn Transistor
S One Positive-Gate Voltage Regulator Capable of
Delivering 20mA at 28V
S One Negative-Gate Voltage Regulator
S High-Frequency 2.2MHz Operation
The sequencing input (SEQ) allows flexible sequencing
of the positive-gate and negative-gate voltage regulators.
The power-good indicator (PGOOD) indicates a failure
on any of the converters or regulator outputs. Integrated
thermal shutdown circuitry protects the device from overheating.
S Flexible Stand-Alone Sequencing
The MAX16928 is available in a 20-pin TSSOP package with exposed pad and operates over the -40NC to
+105NC temperature range.
S AEC-Q100 Qualified
Applications
Automotive Dashboards
Automotive Central Information Displays
S True Shutdown™ Boost Converter
S Internal Soft-Start
S Overtemperature Shutdown
S -40NC to +105NC Operation
Ordering Information appears at end of data sheet.
Typical Operating Circuit appears at end of data sheet.
Automotive Navigation Systems
True Shutdown is a trademark of Maxim Integrated Products, Inc.
For related parts and recommended products to use with this part, refer to: www.maxim-ic.com/MAX16928.related
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For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
MAX16928
Automotive TFT-LCD Power Supply with Boost
Converter and Gate Voltage Regulators
ABSOLUTE MAXIMUM RATINGS
INA, COMPV, FBP to GND.......................................-0.3V to +6V
PGOOD to GND.......................................................-0.3V to +6V
CP, GH to GND......................................................-0.3V to +31V
CP, GH to GND (VINA = 3.3V)...............................-0.3V to +29V
LXP to GND............................................................-0.3V to +20V
DRVN to GND.........................................................-25V to +0.3V
ENP, DR, FB, GATE, COMPI, FBGH,
FBGL, REF, SEQ to GND......................-0.3V to (VINA + 0.3V)
GND to PGNDP.....................................................-0.3V to +0.3V
Continuous Power Dissipation (TA = +70NC)
TSSOP (derate 26.5mW/NC above +70NC)................2122mW
Operating Temperature Range......................... -40NC to +105NC
Junction Temperature Range............................ -40NC to +150NC
Storage Temperature Range............................. -65NC to +150NC
Lead Temperature (soldering, 10s).................................+300NC
Soldering Temperature (reflow).......................................+260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
TSSOP
Junction-to-Ambient Thermal Resistance (BJA)........37.7NC/W
Junction-to-Case Thermal Resistance (BJC)..................2NC/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a fourlayer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
ELECTRICAL CHARACTERISTICS
(VINA = 5V, VGND = VPGNDP = 0V, TA = TJ = -40NC to +105NC, typical values are at TA = +25NC unless otherwise noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
5.5
V
2.7
2.9
V
VFBP = VFBGH = 1.3V, VFBGL = 0V,
LXP not switching
1.5
2.0
mA
0.5
FA
+165
NC
15
NC
238
ms
1.9
s
BOOST, POSITIVE (GH), NEGATIVE (GL), 1.8V/3.3V CONVERTERS
INA Input Supply Range
3
INA Undervoltage Lockout
Threshold
INA Supply Current
VINA rising, hysteresis = 200mV,
TA = +25NC
IINA
INA Shutdown Current
ISHDN
VENP = 0V, TA = +25NC
Thermal Shutdown Temperature
TSHDN
Temperature rising
Thermal Shutdown Hysteresis
2.5
TH
Duration to Trigger Fault
Condition
VFBP, VFBGH, or VFBGL below its threshold
Autoretry Time
REFERENCE (REF)
REF Output Voltage
VREF
No output current
REF Load Regulation
0 < IREF < 80FA, REF sourcing
REF Undervoltage Lockout
Threshold
Rising edge, hysteresis = 200mV
1.236
1.25
-2
1.264
V
+2
%
1.165
V
OSCILLATOR
Spread-Spectrum Factor
SSR
As a percentage of switching frequency,
fSW
Q4
%
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MAX16928
Automotive TFT-LCD Power Supply with Boost
Converter and Gate Voltage Regulators
ELECTRICAL CHARACTERISTICS (continued)
(VINA = 5V, VGND = VPGNDP = 0V, TA = TJ = -40NC to +105NC, typical values are at TA = +25NC unless otherwise noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
1.98
2.20
2.42
MHz
93.5
%
BOOST CONVERTER
Switching Frequency
fSW
Maximum Duty Cycle
LXP Current Limit
82
ILIM
LXP On-Resistance
LXP Leakage Current
FBP Regulation Voltage
PGOOD Threshold
Low boost currentlimit option
0.625
0.78
High boost currentlimit option
1.25
1.56
1.87
110
250
mI
8.5
20
FA
A
RDS_ON(LXP) ILXP = 200mA
ILK_LXP
Soft-Start Time
Output Voltage Range
Duty cycle = 70%,
CCOMPI = 220pF
VLXP = 20V, TA =+25NC
(Note 3)
VSH
VFBP
VPG_FBP
30
VINA
VINA = +3V to +5.5V,
0 < ILOAD < full load
ms
18
TA = +25NC
0.985
1.0
1.015
TA = -40NC to
+105NC
0.98
1.0
1.02
0.74
0.85
0.96
Measured at FBP
FBP Load Regulation
0 < ILOAD < full load
-1
FBP Line Regulation
VINA = +3V to +5.5V
0.1
FBP Input Bias Current
VFBP = +1V, TA = +25NC
FBP to COMPV
Transconductance
DI = Q2.5FA at COMPV, TA = +25NC
V
V
V
%
%/V
Q1
400
FA
FS
POSITIVE-GATE VOLTAGE REGULATOR (GH)
Output Voltage Range
VGH
CP Overvoltage Threshold
FBGH Regulation Voltage
PGOOD Threshold
VFBGH
VPG_FBGH
With external charge pump, TA = +25NC
(maximum VCP = 29.5V)
5
29
30.5
V
TA = +25NC (Note 4)
29.5
V
IGH = 1mA
0.96
1.0
1.034
V
Measured at FBGH
0.83
0.85
0.87
V
FBGH Load Regulation
IGH = 0 to 20mA
2
%
FBGH Line Regulation
VCP = 12V to 20V at VGH = 10V,
IGH = 10mA
2
%
FBGH Input Bias Current
GH Output Current
GH Current Limit
IGH
VFBGH = 1V, TA = +25NC
VCP - VGH = 2V
ILIM_GH
Q1
20
35
GH Soft-Start Time
FA
mA
56
mA
7.45
ms
NEGATIVE-GATE VOLTAGE REGULATOR (GL)
Output Voltage Range
FBGL Regulation Voltage
PGOOD Threshold
VDRVN
VFBGL
VPG_FBGL
-24
-2
V
IDRVN = 100FA
0.212
0.242
0.271
V
Measured at FBGL
0.38
0.4
0.42
V
����������������������������������������������������������������� Maxim Integrated Products 3
MAX16928
Automotive TFT-LCD Power Supply with Boost
Converter and Gate Voltage Regulators
ELECTRICAL CHARACTERISTICS (continued)
(VINA = 5V, VGND = VPGNDP = 0V, TA = TJ = -40NC to +105NC, typical values are at TA = +25NC unless otherwise noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
FBGL Input Bias Current
VFBGL = +0.25V
DRVN Source Current
VFBGL = +0.5V, VDRVN = -10V
DRVN Source Current Limit
MIN
TYP
MAX
UNITS
Q1
FA
2
2.5
GL Soft-Start Time
mA
4
mA
7.45
ms
1.8V/3.3V REGULATOR CONTROLLER
Output Voltage
VFB
FB PGOOD Threshold
VPG_FB
FB Input Bias Current
DR Drive Current
VDR = VFB
Measured at FB
(Notes 4, 6)
3.3V regulator option
3.18
3.3
3.38
1.8V regulator option
1.746
1.8
1.854
3.3V regulator option,
FB rising
2.4
2.57
2.7
1.8V regulator option,
FB rising
1.364
1.38
1.396
V
V
VFB = 1.8V
2.5
VFB = 3.3V
4.5
VFB = 1.8V
4.5
6
p-Channel FET GATE Sink
Current
VGATE = 0.5V
33
55
GATE Voltage Threshold
Measured at GATE; below this voltage, the
external p-channel FET is considered on
FA
mA
INPUT SERIES SWITCH CONTROL
75
FA
1.25
V
500
kI
DIGITAL LOGIC
ENP, SEQ Input Pulldown
Resistor Value
RPD
ENP, SEQ Input-Voltage Low
VIL
ENP, SEQ Input-Voltage High
VIH
PGOOD Leakage Current
PGOOD Output-Voltage Low
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
ILK_IN
VOL
0.3 x
VINA
0.7 x
VINA
V
V
TA = +25NC
Q1
FA
2mA sink current, TA = +25NC
0.4
V
Specifications over temperature are guaranteed by design and not production tested.
50% of the soft-start voltage time is due to the soft-start ramp and the other 50% is due to the settling of the output voltage.
After the voltage at CP exceeds this overvoltage threshold, the entire circuit switches off and autoretry is started.
Guaranteed by design; not production tested.
FB power good is indicated by PGOOD. The condition VFB < VPG_FB does not shut down/restart the device.
����������������������������������������������������������������� Maxim Integrated Products 4
MAX16928
Automotive TFT-LCD Power Supply with Boost
Converter and Gate Voltage Regulators
Typical Operating Characteristics
(VINA = +5V, VSH = +12V, VGH = +18V, VGL = -6V, VREG = 3.3V, TA = +25NC, unless otherwise noted.)
90
80
EFFICIENCY (%)
7
6
5
4
70
0.8
0.6
0.4
VINA = 5V
VINA = 3.3V
60
ERROR (%)
8
1.0
MAX16928 toc02
MAX16928 toc01
9
50
40
0.2
-0.2
30
-0.4
2
20
-0.6
1
10
-0.8
0
0
-1.0
3.5
4.0
4.5
5.5
5.0
0
100
INPUT VOLTAGE (V)
200
300
400
500
VINA = 5V
0
100
LOAD CURRENT (mA)
200
300
400
500
600
LOAD CURRENT (A)
BOOST STARTUP WAVEFORMS
LINE REGULATION (BOOST)
MAX16928 toc05
1.0
MAX16928 toc04
3.0
VINA = 3.3V
0
3
0.8
0.6
VENP
5V/div
VLXP
10V/div
0.4
ERROR (%)
SUPPLY CURRENT (nA)
LOAD REGULATION (BOOST)
EFFICIENCY vs. LOAD CURRENT (BOOST)
100
MAX16928 toc03
SHUTDOWN SUPPLY CURRENT
10
0.2
ILX
1A/div
0
-0.2
-0.4
VSH
10V/div
-0.6
-0.8
-1.0
3.0
3.5
4.0
4.5
5.0
4ms/div
5.5
INPUT VOLTAGE (V)
50mA TO 450mA LOAD-TRANSIENT RESPONSE
MAX16928 toc06
SUPPLY SEQUENCING WAVEFORMS
(VSEQ = 0V)
MAX16928 toc07
VENP
5V/div
450mA
50mA
VGH
5V/div
ISH
500mA/div
VSH
5V/div
VREG
5V/div
VSH
200mV/div
100µs/div
VGL
5V/div
10ms/div
����������������������������������������������������������������� Maxim Integrated Products 5
MAX16928
Automotive TFT-LCD Power Supply with Boost
Converter and Gate Voltage Regulators
Typical Operating Characteristics (continued)
(VINA = +5V, VSH = +12V, VGH = +18V, VGL = -6V, VREG = 3.3V, TA = +25NC, unless otherwise noted.)
SUPPLY SEQUENCING WAVEFORMS
(VSEQ = VINA)
LOAD REGULATION
(POSITIVE-GATE VOLTAGE REGULATOR)
MAX16928 toc08
MAX16928 toc09
0
VENP
5V/div
-0.4
-0.8
VGH
5V/div
-1.2
-1.6
ERROR (%)
VSH
5V/div
VREG
5V/div
-2.0
-2.4
VGL
5V/div
-2.8
-3.2
-3.6
-4.0
10ms/div
0
2
4
6
8
10 12 14 16 18 20
LOAD CURRENT (mA)
LOAD REGULATION
(NEGATIVE-GATE VOLTAGE REGULATOR)
ERROR (%)
0
ILOAD = 20mA
-0.4
4
3
20 21 22 23 24 25 26 27 28 29 30
0.08
ILOAD = 10mA
0
-0.08
ILOAD = 20mA
-0.24
-0.32
0
-1.0
0.24
-0.16
1
-0.8
0.32
0.16
5
2
-0.6
0
2
4
6
8
10 12 14 16 18 20
-0.40
-24
-22
LOAD CURRENT (mA)
VCP VOLTAGE (V)
-18
-16
-14
-12
-10
-8
VCN VOLTAGE (V)
MAX16928 toc14
MAX16928 toc13
0
-20
LOAD-TRANSIENT RESPONSE
(3.3V LINEAR REGULATOR)
LOAD REGULATION (3.3V REGULATOR)
-0.05
-0.10
ERROR (%)
ERROR (%)
6
ILOAD = 10mA
0.2
-0.2
7
ERROR (%)
0.6
0.40
MAX16928 toc11
0.8
0.4
8
MAX16928 toc10
1.0
LINE REGULATION
(NEGATIVE-GATE VOLTAGE REGULATOR)
MAX16928 toc12
LINE REGULATION
(POSITIVE-GATE VOLTAGE REGULATOR)
450mA
IOUT
500mA/div
50mA
-0.15
-0.20
-0.25
VREG
(AC-COUPLED)
100mV/div
-0.30
-0.35
EXTERNAL NPN TRANSISTOR USED
-0.40
0
50 100 150 200 250 300 350 400 450 500
100µs/div
LOAD CURRENT (mA)
����������������������������������������������������������������� Maxim Integrated Products 6
MAX16928
Automotive TFT-LCD Power Supply with Boost
Converter and Gate Voltage Regulators
Pin Configuration
TOP VIEW
+
ENP
1
20
SEQ
DR
2
19
REF
FB
3
18
FBGL
GATE
4
17
FBGH
PGNDP
5
LXP
MAX16928
16
COMPI
6
15
GND
DRVN
INA
7
14
COMPV
8
13
GH
FBP
9
12
CP
N.C.
10
11
PGOOD
EP
TSSOP
Pin Description
PIN
NAME
FUNCTION
1
ENP
Boost Circuitry and 1.8V/3.3V Regulator Controller Enable Input. ENP has an internal 500kI pulldown
resistor. Drive high for normal operation and drive low to place the device in shutdown.
2
DR
1.8V or 3.3V Regulator Output. DR has a 4.5mA (min) drive capability. For greater output current capability, use an external npn bipolar transistor whose base is connected to DR.
3
FB
1.8V or 3.3V Regulator Feedback Input. FB is regulated to 1.8V or 3.3V. Connect FB to DR when powering loads demanding less than 4.5mA. For greater output current capability, use an external npn bipolar transistor whose emitter is connected to FB.
4
GATE
External p-Channel FET Gate Drive. GATE is an open-drain driver connected to the gate of the external
input series p-channel FET. Connect a pullup resistor between GATE and INA. During a fault condition,
the gate driver turns off and the pullup resistor turns off the FET.
5
PGNDP
6
LXP
Boost Converter Switching Node. Connect LXP to the inductor and catch diode of the boost converter.
7
INA
Boost Circuitry and 1.8V/3.3V Regulator Controller Power Input. Connect INA to a 3V to 5.5V supply.
8
COMPV
Boost Error Amplifier Compensation Connection. Connect a compensation network between COMPV to
GND.
9
FBP
Boost Converter Feedback Input. FBP is regulated to 1V. Connect FBP to the center of a resistive divider connected between the boost output and GND.
10
N.C.
No Connection. Not internally connected.
11
PGOOD
12
CP
Boost Converter Power Ground
Open-Drain Power-Good Output. Connect PGOOD to INA through an external pullup resistor.
Positive-Gate Voltage Regulator Power Input. Connect CP to the positive output of the external charge
pump. Ensure that VCP does not exceed the CP overvoltage threshold as given in the Electrical
Characteristics table.
����������������������������������������������������������������� Maxim Integrated Products 7
MAX16928
Automotive TFT-LCD Power Supply with Boost
Converter and Gate Voltage Regulators
Pin Description (continued)
PIN
NAME
FUNCTION
13
GH
14
DRVN
Negative-Gate Voltage Regulator Driver Output. DRVN is the open drain of an internal p-channel FET.
Connect DRVN to the base of an external npn pass transistor.
15
GND
Analog Ground
16
COMPI
Boost Slope Compensation Connection. Connect a capacitor between COMPI and GND to set the
slope compensation.
17
FBGH
Positive-Gate Voltage Regulator Feedback Input. FBGH is regulated to 1V. Connect FBGH to the center
of a resistive divider connected between GH and GND.
18
FBGL
Negative-Gate Voltage Regulator Feedback Input. FBGL is regulated to 0.25V. Connect FBGL to the
center of a resistive divider connected between REF and the output of the negative-gate voltage
regulator.
19
REF
1.25V Reference Output. Bypass REF to GND with a 0.1FF ceramic capacitor.
20
SEQ
Sequencing Input. SEQ has an internal 500kI pulldown resistor. SEQ determines the sequence in
which VGH and VGL power up. See Table 1 for supply sequencing options.
—
EP
Positive-Gate Voltage Regulator Output
Exposed Pad. Connect to a large contiguous copper ground plane for optimal heat dissipation. Do not
use EP as the only electrical ground connection.
Detailed Description
The MAX16928 is a highly integrated power supply for
automotive TFT-LCD applications. The device integrates
one boost converter, one 1.8V/3.3V regulator controller,
one positive-gate voltage regulator, and one negativegate voltage regulator.
The device achieves enhanced EMI performance through
spread-spectrum modulation. Digital input control allows
the device to be placed in a low-current shutdown mode
and provides flexible sequencing of the gate voltage
regulators.
Internal thermal shutdown circuitry protects the device
from overheating. The device is designed to shut down
when its die temperature reaches +165NC (typ) and to
resume normal operation once its die temperature has
fallen 15NC.
The device is factory-trimmed to provide a variety of
power options to meet the most common automotive
TFT-LCD display power requirements, as outlined in the
Ordering Information table.
Boost Converter
The boost converter employs a current-mode, fixedfrequency PWM architecture to maximize loop bandwidth
and provide fast transient response to pulsed loads
typical of TFT-LCD panel source drivers. The 2.2MHz
switching frequency allows the use of low-profile inductors and ceramic capacitors to minimize the thickness
of LCD panel designs. The integrated low on-resistance
MOSFET and the device’s built-in digital soft-start functions reduce the number of external components required
while controlling inrush currents. The output voltage
can be set from VINA to 18V with an external resistive
voltage-divider. The regulator controls the output voltage
by modulating the duty cycle (D) of the internal power
MOSFET in each switching cycle. The duty cycle of the
MOSFET is approximated by:
D =1 −
ηVINA
VO
where VINA is the voltage at INA, VO = VSH (the boost
output voltage), and E is the efficiency of the boost converter as shown in the Typical Operating Characteristics.
����������������������������������������������������������������� Maxim Integrated Products 8
MAX16928
Automotive TFT-LCD Power Supply with Boost
Converter and Gate Voltage Regulators
Figure 1 shows the functional diagram of the boost
regulator. An error amplifier compares the signal at
FBP to 1V and changes the COMPV output. The voltage at COMPV sets the peak inductor current. As the
load varies, the error amplifier sources or sinks current
to the COMPV output accordingly to produce the peak
inductor current necessary to service the load. To maintain stability at high duty cycles, a slope-compensation
signal (set by the capacitor at COMPI) is summed with
the current-sense signal. On the rising edge of the
internal clock, the controller sets a flip-flop, turning on
the n-channel MOSFET and applying the input voltage
across the inductor. The current through the inductor
ramps up linearly, storing energy in its magnetic field.
Once the sum of the current feedback signal and the
slope compensation exceeds the COMPV voltage, the
controller turns off the MOSFET. The inductor current
then flows through the diode to the output. The MOSFET
remains off for the rest of the clock cycle.
The external p-channel FET controlled by GATE protects
the output during fault conditions and provides True
Shutdown of the converter. Connect a pullup resistor
between GATE and INA (see the Boost Converter section
to select the value for the pullup resistor). Under normal
operation, GATE turns on the p-channel FET, connecting
the supply to the boost input. During a fault condition or
in shutdown, GATE is off and the pullup resistor turns off
the p-channel FET, disconnecting the supply from the
boost input.
LXP
CLOCK
LOGIC AND
DRIVER
PGNDP
ILIM
COMPARATOR
SOFTSTART
PWM
COMPARATOR
Σ
VLIMIT
CURRENT
SENSE
2.2MHz
OSCILLATOR
SLOPE
COMP
ERROR
AMP
TO FAULT LOGIC
FAULT
COMPARATOR
MAX16928
COMPI
FBP
0.85V
1V
COMPV
Figure 1. Boost Converter Functional Diagram
����������������������������������������������������������������� Maxim Integrated Products 9
MAX16928
Automotive TFT-LCD Power Supply with Boost
Converter and Gate Voltage Regulators
Spread-Spectrum Modulation
The high-frequency 2.2MHz operation of the boost converter moves switching noise outside of the AM band.
The device achieves enhanced EMI performance by
modulating the switching frequency by Q4%. The modulating signal is pseudorandom and changes each switching period (i.e., fSS = 2.2MHz).
Startup
Immediately after power-up, coming out of shutdown,
or going into autoretry, the boost converter performs a
short-circuit detection test on the output by connecting
the input (INA) to the switching node (LXP) through an
internal 50I resistor.
If the resulting voltage on LXP exceeds 1.2V, the device
turns on the external pMOS switch by pulling GATE low.
The boost output ramps to its final value in 15ms.
An overloaded or shorted output is detected if the resulting voltage on LXP is below 1.2V. The external pMOS
switch remains off and the converter does not switch.
After the fault blanking period of 238ms, the device pulls
PGOOD low and starts the autoretry timer.
The short-circuit detection feature places a lower limit
on the output load of approximately 46I when the input
voltage is 3V.
Fault Conditions and PGOOD
PGOOD signals whether all the regulators and the boost
converter are operating normally. PGOOD is an opendrain output that pulls low if any of the following faults
occur:
1) The boost output voltage falls below 85% of its set
value.
2) The positive-gate voltage regulator output (VGH) falls
below 85% of its set value.
3) The negative-gate voltage regulator output (VGL) falls
below 85% of its set value.
4) The LXP voltage is greater than 21V (typ).
5) The positive charge-pump voltage (VCP) is greater
than 30.5V (typ).
6) The 1.8V/3.3V regulator output voltage falls below
85% of its nominal value.
If any of the first three fault conditions persists for longer
than the 238ms fault blanking period, the device pulls
PGOOD low, turns off all outputs, and starts the autoretry
timer.
If either condition 4 or 5 occurs, the device pulls PGOOD
low and turns off all outputs immediately. The device initiates startup only after the fault has cleared.
If the last condition occurs, the device pulls PGOOD low,
but does not turn off any of the outputs.
During startup, PGOOD is masked and goes high as
soon as the 1.8V/3.3V regulator controller turns on. This
regulator turns on as soon as VINA exceeds the INA
undervoltage lockout threshold.
Autoretry
When the autoretry counter finishes incrementing after
1.9s, the device attempts to turn on the boost converter and gate voltage regulators in the order shown
in Table 1. The device continues to autoretry as long as
the fault condition persists. A fault on the 1.8V/3.3V regulator output causes PGOOD to go low, but does not result
in the device shutting down and going into autoretry.
Current Limit
The effective current limit of the boost converter is
reduced by the internally injected slope compensation by
an amount dependent on the duty cycle of the converter.
The effective current limit is given by:
ILIM(EFF) =192 × 10 -12 × ILIM_DC_0 ×
D
C COMPI
where ILIM(EFF) is the effective current limit, ILIM_DC_0 =
1.1A or 2.2A, depending on the boost converter currentlimit option, D is the duty cycle of the boost converter,
and CCOMPI is the value of the capacitor at the COMPI
input. Estimate the duty cycle of the converter using the
formulas shown in the Design Procedure section.
1.8V/3.3V Regulator Controller
The 1.8V/3.3V regulator controller delivers 4.5mA (min)
to an external load. Connect FB to DR for a regulated
1.8V/3.3V output.
For higher output capability, use an external npn transistor as shown in the Typical Operating Circuit. The drive
capability of the regulator is then increased by the current gain of the transistor (hFE). When using an external
transistor, use DR as the base drive and connect FB to
the transistor’s emitter. Bypass the base to ground with a
0.1FF ceramic capacitor.
If the boost output current is greater than 300mA, connect a 30kI resistor between DR and GND.
���������������������������������������������������������������� Maxim Integrated Products 10
MAX16928
Automotive TFT-LCD Power Supply with Boost
Converter and Gate Voltage Regulators
Positive-Gate Voltage Regulator (GH)
The positive-gate voltage regulator includes a p-channel
FET output stage to generate a regulated output between
5V and (VCP - 2V). The regulator maintains accuracy over
wide line and load conditions. It is capable of at least
20mA of output current and includes current-limit protection. VGH is typically used to provide the TFT-LCD gate
drivers’ gate-on voltage.
The regulator derives its positive supply voltage from a
noninverting charge pump, a single-stage example of
which is shown in the Typical Operating Circuit. A higher
voltage using a multistage charge pump is possible, as
described in the Charge Pumps section.
Negative-Gate Voltage Regulator (GL)
The negative-gate voltage regulator is an analog gain
block with an open-drain p-channel output. It drives an
external npn pass transistor with a 6.8kI base-to-emitter
resistor (see the Pass Transistor Selection section). Its
guaranteed base drive source current is at least 2mA.
VGL is typically used to provide the TFT-LCD gate drivers’ gate-off voltage.
The output of the negative-gate voltage regulator (i.e.,
the collector of the external npn pass transistor) has loaddependent bypassing requirements. Connect a ceramic
capacitor between the collector and ground with the
value shown in Table 3.
The regulator derives its negative supply voltage from an
inverting charge pump, a single-stage example of which
is shown in the Typical Operating Circuit. A more negative
voltage using a multistage charge pump is possible, as
described in the Charge Pumps section.
The external npn transistor is not short-circuit protected.
To maintain proper pulldown capability of the external npn
transistor and optimal regulation, a minimum load of at least
500FA is recommended on the output of the GL regulator.
Enable (ENP)
Use the enable input (ENP) to enable and disable the
boost section of the device. Connect ENP to INA for
normal operation and to GND to place the device in shutdown. In shutdown, the INA supply current is reduced to
0.5FA.
Soft-Start and Supply Sequencing (SEQ)
When enabled, the boost output ramps up from VINA to
its set voltage. Once the boost output reaches 85% of the
set voltage and the soft-start timer expires, the gate voltage regulators turn on in the order shown in Table 1. The
1.8V/3.3V regulator controller is enabled at the beginning
of the boost converter’s soft-start.
Both gate voltage regulators have a 7.45ms soft-start
time. The second one turns on as soon as the output of
the first reaches 85% of its set voltage.
Thermal Shutdown
Internal thermal shutdown circuitry shuts down the
device immediately when the die temperature exceeds
+165NC. A 15NC thermal shutdown hysteresis prevents
the device from resuming normal operation until the die
temperature falls below +150NC.
Design Procedure
Boost Converter
Inductor Selection
Three key inductor parameters must be specified for
operation with the device: inductance value (L), inductor
saturation current (ISAT), and DC resistance (RDC). To
determine the inductance value, select the ratio of inductor
peak-to-peak ripple current to average output current (LIR)
first. For LIR values that are too high, the RMS currents are
high, and therefore, I2R losses are high. Use high-valued
inductors to achieve low LIR values. Typically, inductance
is proportional to resistance for a given package type,
Table 1. Supply Sequencing
CONTROL INPUTS
ENP
SEQ
0
X
SUPPLY SEQUENCING
FIRST
SECOND
THIRD
Device is in shutdown
1
0
VSH
VGH
VGL
1
1
VSH
VGL
VGH
���������������������������������������������������������������� Maxim Integrated Products 11
MAX16928
Automotive TFT-LCD Power Supply with Boost
Converter and Gate Voltage Regulators
which again makes I2R losses high for very low LIR values.
A good compromise between size and loss is to select a
30%-to-60% peak-to-peak ripple current to average-current
ratio. If extremely thin high-resistance inductors are used,
as is common for LCD-panel applications, the best LIR can
increase between 0.5 and 1.0. The size of the inductor is
determined as follows:
Rectifier Diode
The catch diode should be a Schottky type to minimize
its voltage drop and maximize efficiency. The diode must
be capable of withstanding a reverse voltage of at least
VSH. The diode should have an average forward current
rating greater than:
V ×I
VINA × D
L=
and IINA = O O
LIR × IINA × fSW
ηVINA
where IINA and D are the input current and duty cycle
given above. In addition ensure that the peak current rating of the diode is greater than:
 LIR 
IINA × 1+
2 

D=
1- ηVINA
VO
where VINA is the input voltage, VO is the output voltage,
IO is the output current, IINA is the average boost input
current, E is the efficiency of the boost converter, D is
the duty cycle, and fSW is 2.2MHz (the switching frequency of the buck converter). The efficiency of the buck
converter can be estimated from the Typical Operating
Characteristics and accounts for losses in the internal
switch, catch diode, inductor RDC, and capacitor ESR.
Capacitor Selection
The input and output filter capacitors should be of a lowESR type (tantalum, ceramic, or low-ESR electrolytic) and
should have IRMS ratings greater than:
IRMS =
IRMS =I O
LIR × IINA
12
for the input capacitor
LIR 2
12 for the output capacitor
1− D
D+
where IINA and D are the input current and duty cycle
given above.
The output voltage contains a ripple component whose
peak-to-peak value depends on the value of the ESR and
capacitance of the output capacitor and is approximately
given by:
DVRIPPLE = DVESR + DVCAP
LIR
∆VESR =IINA × (1+
) × R ESR
2
∆VCAP =
IO × D
C OUT ×fSW
where IINA and D are the input current and duty cycle
given above.
ID = IINA × (1-D)
Output Voltage Selection
The output voltage of the boost converter can be adjusted by using a resistive voltage-divider formed by RTOP
and RBOTTOM. Connect RTOP between the output and
FBP and connect RBOTTOM between FBP and GND.
Select RBOTTOM in the 10kI to 50kI range. Calculate
RTOP with the following equation:
R TOP = R BOTTOM × (
VO
− 1)
VFBP
where VFBP, the boost converter’s feedback set point, is
1V. Place both resistors as close as possible to the device
and connect RBOTTOM to the analog ground plane.
Loop Compensation
Choose RCOMPV to set the high-frequency integrator
gain for fast transient response. Choose CCOMPV to set
the integrator zero to maintain loop stability. For low-ESR
output capacitors, use Table 2 to select the initial values
for RCOMPV and CCOMPV. Use a 22pF capacitor in parallel with RCOMPV + CCOMPV.
Table 2. Compensation Component Values
VSH (V)
8
18
ISH (mA)
200
200
VINA (V)
3.3
5
PIN (W)
1.75
3.75
L (µH)
5
5
RCOMPV (kI)
33
39
CCOMPV (pF)
220
180
CCOMPI (pF)
820
330
���������������������������������������������������������������� Maxim Integrated Products 12
MAX16928
Automotive TFT-LCD Power Supply with Boost
Converter and Gate Voltage Regulators
To further optimize transient response, vary RCOMPV
in 20% steps and CCOMPV in 50% steps while observing transient-response waveforms. The ideal transient
response is achieved when the output settles quickly with
little or no overshoot. Connect the compensation network
to the analog ground plane.
Charge Pumps
Selecting the Number of Charge-Pump Stages
For most applications, a single charge-pump stage is
sufficient, as shown in the Typical Operating Circuit.
Connect the flying capacitors to LXP. The output voltages
generated on the storage capacitors are given by:
Use the following formula to calculate the value for CCOMPI:
VCP = 2 x VSH + VSCHOTTKY - 2 x VD
VCN = -(VSH + VSCHOTTKY - 2 x VD)
CCOMPI ≤ 550 × 10-6 × L/fSW × (VSH + VSCHOTTKY - VINA)
where fSW = 2.2MHz.
p-Channel FET Selection
The p-channel FET used to gate the boost converter’s
input should have low on-resistance. Connect a resistor
(RSG) between the source and gate of the FET. Under
normal operation, RSG carries a gate drive current of
55FA and the resulting gate source voltage (VGS) turns
on the FET. When the gate drive is removed under a fault
condition or in shutdown, RSG bleeds off charge to turn
off the FET. Size RSG to produce the VGS needed to turn
on the FET.
1.8V/3.3V Regulator Controller
npn Bipolar Transistor Selection
There are two important considerations in selecting the
pass npn bipolar transistor: current gain (hFE) and power
dissipation. Select a transistor with an hFE high enough
to ensure adequate drive capability. This condition is
satisfied when IDR x (hFE + 1) is greater than the maximum load current. The regulator can source IDR­= 4.5mA
(min). The transistor should be capable of dissipating:
PNPN_REG = (VINA – VREG_OUT) × ILOAD(MAX)
where VREG_OUT = 1.8V or 3.3V. Bypass DR to ground
with a 0.1FF ceramic capacitor. For applications in which
the boost output current exceeds 300mA, connect a
30kI resistor from DR to ground.
Supply Considerations
INA needs to be at least 4.5V for the 3.3V regulator to
operate properly.
VSH
VCP
where VCP is the positive supply for the positive-gate voltage regulator, and VCN is the negative supply for the negative-gate voltage regulator. Where larger output voltages
are needed, use multistage charge pumps (however, the
maximum charge-pump voltage is limited by the absolute
maximum ratings of CP and DRVN). Figure 2 and Figure 3
show the configuration of a multistage charge pump for
both positive and negative output voltages.
For mutistage charge pumps the output voltages are:
VCP = VSH + n × (VSH + VSCHOTTKY - 2 x VD)
VCN = -n × (VSH + VSCHOTTKY - 2 x VD)
For highest efficiency, choose the lowest number of
charge-pump stages that meets the output requirement.
The number of positive charge-pump stages needed is
given by:
n CP =
VGH+VDROPOUT − VSH
VSH+VSCHOTTKY − 2 × VD
and the number of negative charge-pump stages is
given by:
n CN =
|VGL |+VDROPOUT
VSH + VSCHOTTKY − 2 × VD
where nCP is the number of positive charge-pump stages, nCN is the number of negative charge-pump stages,
VGH is the positive-gate voltage regulator output voltage, VGL is the negative-gate voltage regulator output
voltage, VSH is the boost converter’s output voltage, VD
VCN
LXP
LXP
Figure 2. Multistage Charge Pump for Positive Output Voltage
Figure 3. Multistage Charge Pump for Negative Output Voltage
���������������������������������������������������������������� Maxim Integrated Products 13
MAX16928
Automotive TFT-LCD Power Supply with Boost
Converter and Gate Voltage Regulators
is the forward-voltage drop of the charge-pump diode,
VSCHOTTKY is the forward drop of the Schottky diode
of the boost converter, and VDROPOUT is the dropout
margin for the regulator. Use VDROPOUT = 0.3V for the
negative voltage regulator and VDROPOUT = 2V at 20mA
for the positive-gate voltage regulator.
Flying Capacitors
Increasing the flying capacitor (CX) value lowers the
effective source impedance and increases the output
current capability. Increasing the capacitance indefinitely has a negligible effect on output current capability
because the internal switch resistance and the diode
impedance place a lower limit on the source impedance.
A 0.1FF ceramic capacitor works well in most low-current
applications. The voltage rating of the flying capacitors
for the positive charge pump should exceed VCP, and
that for the negative charge pump should exceed the
magnitude of VCN.
Charge-Pump Output Capacitor
Increasing the output capacitance or decreasing the ESR
reduces the output-ripple voltage and the peak-to-peak
transient voltage. With ceramic capacitors, the outputvoltage ripple is dominated by the capacitance value.
Use the following equation to approximate the required
output capacitance for the noninverting charge pump
connected to CP:
C OUT_CP ≥
D × ILOAD_CP
fSW × VRIPPLE_CP
where COUT_CP is the output capacitor of the charge
pump, D is the duty cycle of the boost converter, ILOAD_CP
is the load current of the charge pump, fSW is the switching frequency of the boost converter, and VRIPPLE_CP is
the peak-to-peak value of the output ripple.
For the inverting charge pump connected to CN, use the
following equation to approximate the required output
capacitance:
C OUT_CN ≥
(1-D) × ILOAD_CN
fSW × VRIPPLE_CN
where COUT_CN is the output capacitor of the charge
pump, D is the duty cycle of the boost converter,
ILOAD_CN is the load current of the charge pump, fSW
is the switching frequency of the boost converter, and
VRIPPLE_CN is the peak-to-peak value of the output
ripple.
Charge-Pump Rectifier Diodes
Use high-speed silicon switching diodes with a current
rating equal to or greater than two times the average
charge-pump input current. If it helps avoid an extra
stage, some or all of the diodes can be replaced with
Schottky diodes with an equivalent current rating.
Positive-Gate Voltage Regulator
Output Voltage Selection
The output voltage of the positive-gate voltage regulator can be adjusted by using a resistive voltage-divider
formed by RTOP and RBOTTOM. Connect RTOP between
the output and FBGH, and connect RBOTTOM between
FBGH and GND. Select RBOTTOM in the 10kI to 50kI
range. Calculate RTOP with the following equation:
R TOP = R BOTTOM × (
VGH
− 1)
VFBGH
where VGH is the desired output voltage and VFBGH = 1V
(the regulated feedback voltage for the regulator). Place
both resistors as close as possible to the device.
Avoid excessive power dissipation within the internal
pMOS device of the regulator by paying attention to the
voltage drop across the drain and source. The amount of
power dissipation is given by:
PGL = (VCP - VGH) × ILOAD(MAX)
where VCP is the noninverting charge-pump output voltage applied to the drain, VGH is the regulated output
voltage, and ILOAD(MAX) is the maximum load current.
Stability Requirements
The positive-gate voltage regulator (GH) requires a minimum output capacitance for stability. For an output voltage of 5V to (VCP - 2V) and an output current of 10mA to
15mA, use a minimum capacitance of 0.47FF.
Negative-Gate Voltage Regulator
Output Voltage Selection
The output voltage of the negative-gate voltage regulator can be adjusted by using a resistive voltage-divider
formed by RTOP and RBOTTOM. Connect RTOP between
REF and FBGL and connect RBOTTOM between FBGL
and the collector of the external npn transistor. Select
���������������������������������������������������������������� Maxim Integrated Products 14
MAX16928
Automotive TFT-LCD Power Supply with Boost
Converter and Gate Voltage Regulators
RTOP greater than 20kI to avoid loading down the reference output. Calculate RBOTTOM with the following
equation:
V
− VGL
R BOTTOM = R TOP × FBGL
VREF − VFBGL
where VGL is the desired output voltage, VREF = 1.25V,
and VFBGL = 0.25V (the regulated feedback voltage of
the regulator).
Pass Transistor Selection
The pass transistor must meet specifications for current
gain (hFE), input capacitance, collector-emitter saturation
voltage, and power dissipation. The transistor’s current
gain limits the guaranteed maximum output current to:
V
ILOAD(MAX) = (IDRVN − BE ) × h FE(MIN)
R BE
where IDRVN is the minimum guaranteed base-drive current, VBE is the transistor’s base-to-emitter forward voltage drop, and RBE is the pulldown resistor connected
between the transistor’s base and emitter. Furthermore,
the transistor’s current gain increases the regulator’s DC
loop gain (see the Stability Requirements section), so
excessive gain destabilizes the output.
The transistor’s saturation voltage at the maximum output
current determines the minimum input-to-output voltage differential that the regulator can support. Also, the
package’s power dissipation limits the usable maximum
input-to-output voltage differential. The maximum powerdissipation capability of the transistor’s package and
mounting must exceed the actual power dissipated in
the device. The power dissipated equals the maximum
load current (ILOAD(MAX)_GL) multiplied by the maximum
input-to-output voltage differential:
PNPN_GL = (VGL - VCN) × ILOAD(MAX)
where VGL is the regulated output voltage on the collector of the transistor, VCN is the inverting charge-pump
output voltage applied to the emitter of the transistor, and
ILOAD(MAX) is the maximum load current. Note that the
external transistor is not short circuit protected.
Stability Requirements
The device’s negative-gate voltage regulator uses an
internal transconductance amplifier to drive an external
pass transistor. The transconductance amplifier, the
pass transistor, the base-emitter resistor, and the output
capacitor determine the loop stability.
The transconductance amplifier regulates the output voltage by controlling the pass transistor’s base current. The
total DC loop gain is approximately:
A V_GL ≅ (
I
× h FE
4
) × (1 + BIAS
) × VREF
VT
ILOAD
where VT is 26mV at room temperature, and IBIAS is the
current through the base-to-emitter resistor (RBE). For
the device, the bias current for the negative-gate voltage
regulator is 0.1mA. Therefore, the base-to-emitter resistor
should be chosen to set 0.1mA bias current:
R BE =
VBE
0.7V
=
= 7kΩ
0.1mA 0.1mA
Use the closest standard resistor value of 6.8kI. The
output capacitor and the load resistance create the
dominant pole in the system. However, the internal
amplifier delay, pass transistor’s input capacitance,
and the stray capacitance at the feedback node create
additional poles in the system, and the output capacitor’s
ESR generates a zero. For proper operation, use the following procedure to verify that the regulator is properly
compensated:
1) First, determine the dominant pole set by the regulator’s output capacitor and the load resistor:
fPOLE_GL =
ILOAD(MAX)_GL
2π × C OUT_GL × VOUT_GL
The unity-gain crossover frequency of the regulator is:
fCROSSOVER = AV_LR × fPOLE_LR
2) The pole created by the internal amplifier delay is
approximately 1MHz:
fPOLE_AMP = 1MHz
3) Next, calculate the pole set by the transistor’s input
capacitance, the transistor’s input resistance, and the
base-to-emitter pullup resistor:
fPOLE_IN =
1
2π × CIN × (R BE /RIN )
where:
CIN =
gm
h
, RIN = FE
2πfT
gm
gm is the transconductance of the pass transistor, and
fT is the transition frequency. Both parameters can be
���������������������������������������������������������������� Maxim Integrated Products 15
MAX16928
Automotive TFT-LCD Power Supply with Boost
Converter and Gate Voltage Regulators
found in the transistor’s data sheet. Because RBE is
much greater than RIN, the above equation can be
simplified:
fPOLE_IN =
1
2π × CIN × RIN
Substituting for CIN and RIN yields:
f
fPOLE = T
h FE
4) Next, calculate the pole set by the regulator’s feedback resistance and the capacitance between FBGL
and GND (including stray capacitance):
fPOLE_FBGL =
1
2π × C FBGL × (R TOP /R BOTTOM )
where CFBGL is the capacitance between FBGL and
GND and is equal to 30pF, RTOP is the upper resistor
of the regulator’s feedback divider, and RBOTTOM is
the lower resistor of the divider.
5) Next, calculate the zero caused by the output capacitor’s ESR:
fZERO_ESR =
1
2π × C OUT_LR × R ESR
where RESR is the equivalent series resistance of
COUT_LR. To ensure stability, make COUT_LR large
enough so the crossover occurs well before the poles
and zero calculated in steps 2 to 5. The poles in steps
3 and 4 generally occur at several MHz and using
ceramic capacitors ensures the ESR zero also occurs
at several MHz. Placing the crossover frequency
below 500kHz is sufficient to avoid the amplifier delay
pole and generally works well, unless unusual component choices or extra capacitances move one of the
other poles or the zero below 1MHz.
Table 3 is a list of recommended minimum output capacitance for the negative-gate voltage regulator and is applicable for output currents in the 10mA to 15mA range.
Table 3. Minimum Output Capacitance vs.
Output Voltage Range for Negative-Gate
Voltage Regulator (IOUT = 10mA to 15mA)
OUTPUT VOLTAGE
RANGE
MINIMUM OUTPUT
CAPACITANCE (µF)
-2V R VGL R -4V
2.2
-5V R VGL R -7V
-8V R VGL R -13V
1.5
1
Applications Information
Power Dissipation
An IC’s maximum power dissipation depends on the thermal resistance from the die to the ambient environment
and the ambient temperature. The thermal resistance
depends on the IC package, PCB copper area, other
thermal mass, and airflow. More PCB copper, cooler
ambient air, and more airflow increase the possible dissipation, while less copper or warmer air decreases the
IC’s dissipation capability. The major components of
power dissipation are the power dissipated in the boost
converter, positive-gate voltage regulator, negative-gate
voltage regulator, and the 1.8V/3.3V regulator controller.
Boost Converter
Power dissipation in the boost converter is primarily due
to conduction and switching losses in the low-side FET.
Conduction loss is produced by the inductor current
flowing through the on-resistance of the FET during the
on-time. Switching loss occurs during switching transitions and is a result of the finite time needed to fully turn
on and off the FET. Power dissipation in the boost converter can be estimated with the following formula:
PLXP ≈ [(IIN(DC,MAX) × √D)2 × RDS_ON(LXP)] + VSH ×
IIN(DC,MAX) × fSW × [(tR-V + tF-I) + (tR-I + tF-V)]
where IIN(DC,MAX) is the maximum expected average
input (i.e., inductor) current, D is the duty cycle of the
boost converter, RDS_ON(LXP) is the on-resistance of
the internal low-side FET, VSH­ is the output voltage, and
fSW is the switching frequency of the boost converter.
RDS_ON(LXP) is 110mI (typ) and fSW is 2.2MHz.
���������������������������������������������������������������� Maxim Integrated Products 16
MAX16928
Automotive TFT-LCD Power Supply with Boost
Converter and Gate Voltage Regulators
The voltage and current rise and fall times at the LXP
node are equal to tR-V (voltage rise time), tF-V (voltage fall
time), tR-I (current rise time), and tF-I (current fall time),
and are determined as follows:
V + VSCHOTTKY
t R-V = SH
K R-V
voltage regulator. Estimate the power dissipated in the
negative-gate voltage regulator using the following:
PGL = (VINA + |VCN| - VBE) × IDRVN
where VBE is the base-emitter voltage of the external npn
bipolar transistor, and IDRVN is the current sourced from
DRVN to the RBE bias resistor and to the base of the
transistor, which is given by:
V + VSCHOTTKY
t F-V = SH
K F-V
t R-I =
t F-I =
I
V
IDRVN = BE + GL
RBE h FE +1
IIN(DC,MAX)
1.8V/3.3V Regulator Controller
The power dissipated in the 1.8V/3.3V regulator controller
is given by:
K R-I
IIN(DC,MAX)
K F-I
KR-V, KF-V, KR-I, and KF-I are the voltage and current
slew rates of the LXP node and are supply dependent.
Use Table 4 to determine their values.
Positive-Gate Voltage Regulator
Use the lowest number of charge-pump stages possible
in supplying power to the positive voltage regulator.
Doing so minimizes the drain-source voltage of the integrated pMOS switch and power dissipation. The power
dissipated in the switch is given as:
PGH = (VCP - VGH) × ILOAD(MAX)_GH
Ensure that the voltage on CP does not exceed the
CP overvoltage threshold as given in the Electrical
Characteristics table.
Negative-Gate Voltage Regulator
Use the lowest number of charge-pump stages possible
to provide the negative voltage to the negative-gate
PREG = (VINA - VOUT_REG - VBE) × IDR
where VOUT_REG = 1.8V or 3.3V, VBE is the base-emitter
voltage of the external npn bipolar transistor, and IDR is
the current sourced from DR to the base of the transistor.
IDR is given by:
I
IDR = LOAD
h FE + 1
where ILOAD is load current of the 1.8V/3.3V regulator
controller, and hFE is the current gain of the transistor.
Total Power Dissipation
The total power dissipated in the package is the sum of
the losses previously calculated. Therefore, total power
dissipation can be estimated as follows:
PT = PLXP + PGH + PGL + PREG
Achieve maximum heat transfer by connecting the
exposed pad to a thermal landing pad and connecting
the thermal landing pad to a large ground plane through
thermal vias.
Table 4. LXP Voltage and Current Slew Rates vs. Supply Voltage
LXP VOLTAGE AND CURRENT SLEW RATES
RISING VOLTAGE
SLEW RATE,
KR-V (V/ns)
FALLING VOLTAGE
SLEW RATE,
KF-V (V/ns)
RISING CURRENT
SLEW RATE,
KR-I (A/ns)
FALLING CURRENT
SLEW RATE,
KF-I (A/ns)
3.3
0.52
1.7
0.13
0.38
5
1.35
2
0.3
0.44
VINA (V)
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MAX16928
Automotive TFT-LCD Power Supply with Boost
Converter and Gate Voltage Regulators
Layout Considerations
3) Keep the high-current paths as short and wide as
possible. Keep the path of switching currents short.
Careful PCB layout is critical in achieving stable and
optimized performance. Follow these guidelines for good
PCB layout:
4) Place the feedback resistors as close as possible to
the device. Connect the negative end of the resistive
divider and the compensation network to the analog
ground plane.
1) Place decoupling capacitors as close as possible to
the device. Connect the power ground planes and the
analog ground plane together at one point close to the
device.
5) Route the high-speed switching node LXB and LXP
away from sensitive analog nodes (FB, FBP, FBGH,
FBGL, and REF).
2) Connect input and output capacitors to the power
ground planes; connect all other capacitors to the
analog ground plane.
Refer to the MAX16928 Evaluation Kit data sheet for a
recommended PCB layout.
Ordering Information
TEMP RANGE
REGULATOR VREG
(V)
BOOST ILIM
(A)
PIN-PACKAGE
MAX16928AGUP/V+
-40°C to +105°C
3.3
1.5
20 TSSOP-EP*
MAX16928BGUP/V+
-40°C to +105°C
1.8
1.5
20 TSSOP-EP*
MAX16928CGUP/V+
-40°C to +105°C
3.3
0.75
20 TSSOP-EP*
-40°C to +105°C
1.8
0.75
20 TSSOP-EP*
PART
MAX16928DGUP/V+
/V denotes an automotive qualified part.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maxim-ic.com/packages. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
20 TSSOP-EP
U20ME+1
21-0108
90-0114
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MAX16928
Automotive TFT-LCD Power Supply with Boost
Converter and Gate Voltage Regulators
Typical Operating Circuit
3V TO 5.5V
RCOMPV
CCOMP1
INA
COMPI
CCOMPV
COMPV
GATE
LP
OPTIONAL
LXP
VSH
DR
LXP
FB
1.8V/3.3V
1.8V/3.3V
REGULATOR
CONTROLLER
VINA TO 18V
BOOST
PGNDP
FBP
VCN
VCN
OSCILLATOR
CP
DRVN
VSH
GH
VGH
POSITIVE
GATE
VOLTAGE
REGULATOR
NEGATIVE
GATE
VOLTAGE
REGULATOR
FBGH
VGL
FBGL
INA
MAX16928
REF
PGOOD
ENP
SEQ
CONTROL
BANDGAP
REFERENCE
GND
���������������������������������������������������������������� Maxim Integrated Products 19
MAX16928
Automotive TFT-LCD Power Supply with Boost
Converter and Gate Voltage Regulators
Revision History
REVISION
NUMBER
REVISION
DATE
0
7/11
DESCRIPTION
Initial release
PAGES
CHANGED
—
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical
Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
©
2011 Maxim Integrated Products
20
Maxim is a registered trademark of Maxim Integrated Products, Inc.