BSC072N03LD G OptiMOS™3 Power-Transistors Product Summary Features V DS 30 V • Dual N-channel, logic level R DS(on),max 7.2 mΩ • Fast switching MOSFETs for SMPS ID 20 A PG-TDSON-8 • Optimized technology for DC/DC converters • Qualified according to JEDEC1) for target applications • Excellent gate charge x R DS(on) product (FOM) • Very low on-resistance R DS(on) • Superior thermal resistance • 100% avalanche tested • Pb-free plating; RoHS compliant • Halogen-free according to IEC61249-2-21 Type Package Marking BSC072N03LD G PG-TDSON-8 072N03LD Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Value Symbol Conditions ≤10 secs Continuous drain current ID steady state V GS=10 V, T C=25 °C 20 V GS=10 V, T C=100 °C 20 V GS=4.5 V, T C=25 °C 20 V GS=4.5 V, T C=100 °C 20 V GS=10 V, T A=25 °C3) Unit 17.9 A 11.5 Pulsed drain current2) I D,pulse T C=25 °C 80 Avalanche energy, single pulse E AS I D=20 A, R GS=25 Ω 90 mJ Gate source voltage V GS ±20 V Power dissipation P tot 57 W T C=25 °C T A=25 °C3) Operating and storage temperature T j, T stg Rev. 1.4 1.5 -55 ... 150 °C 55/150/56 IEC climatic category; DIN IEC 68-1 1) 3.6 J-STD20 and JESD22 page 1 2009-10-23 BSC072N03LD G Parameter Values Symbol Conditions Unit min. typ. max. - - 2.2 Thermal characteristics Thermal resistance, junction - case R thJC bottom top Thermal resistance, junction ambient, 6 cm² cooling area 3) R thJA K/W 20 t≤10 s - - 35 steady state - - 85 30 - - Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=1 mA Gate threshold voltage V GS(th) V DS=V GS, I D=250 µA 1 - 2.2 Zero gate voltage drain current I DSS V DS=30 V, V GS=0 V, T j=25 °C - 0.1 1 V DS=30 V, V GS=0 V, T j=125 °C - 10 100 V µA Gate-source leakage current I GSS V GS=20 V, V DS=0 V - 10 100 nA Drain-source on-state resistance R DS(on) V GS=4.5 V, I D=20 A - 7.5 9.4 mΩ V GS=10 V, I D=20 A - 6.0 7.2 - 1.5 2.3 Ω 28 57 - S Gate resistance RG Transconductance g fs 2) |V DS|>2|I D|R DS(on)max, I D=20 A See figure 3 3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm² (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. One transistor active. Rev. 1.4 page 2 2009-10-23 BSC072N03LD G Parameter Values Symbol Conditions Unit min. typ. max. - 2600 3500 - 920 1200 Dynamic characteristics Input capacitance C iss V GS=0 V, V DS=15 V, f =1 MHz Output capacitance C oss Reverse transfer capacitance Crss - 49 - Turn-on delay time t d(on) - 6.0 - Rise time tr - 4.0 - Turn-off delay time t d(off) - 25 - Fall time tf - 4.0 - Gate to source charge Q gs - 7.2 - Gate charge at threshold Q g(th) - 3.8 - Gate to drain charge Q gd - 3.4 - Switching charge Q sw - 6.8 - Gate charge total Qg - 15 20 Gate plateau voltage V plateau - 3.0 - Gate charge total Qg V DD=15 V, I D=20 A, V GS=0 to 10 V - 31 41 Gate charge total, sync. FET Q g(sync) V DS=0.1 V, V GS=0 to 4.5 V - 13 - Output charge Q oss V DD=15 V, V GS=0 V - 24 - - - 20 - - 80 V DD=15 V, V GS=10 V, I D=20 A, R G=1.6 Ω pF ns Gate Charge Characteristics 4) V DD=15 V, I D=20 A, V GS=0 to 4.5 V nC V nC Reverse Diode Diode continuous forward current IS Diode pulse current I S,pulse Diode forward voltage V SD V GS=0 V, I F=20 A, T j=25 °C - 0.87 1.1 V Reverse recovery charge Q rr V R=15 V, I F=I S, di F/dt =400 A/µs - - 10 nC 4) Rev. 1.4 T C=25 °C A See figure 16 for gate charge parameter definition page 3 2009-10-23 BSC072N03LD G 1 Power dissipation 2 Drain current P tot=f(T C) I D=f(T C); V GS≥10 V 60 25 50 20 40 I D [A] P tot [W] 15 30 10 20 5 10 0 0 0 40 80 120 160 0 40 80 T C [°C] 120 160 T C [°C] 3 Safe operating area 4 Max. transient thermal impedance I D=f(V DS); T C=25 °C; D =0 Z thJC=f(t p) parameter: t p parameter: D =t p/T 103 10 limited by on-state resistance 1 µs 102 10 µs Z thJC [K/W] I D [A] 100 µs DC 10 0.5 1 10 ms 1 1 ms 0.2 0.1 0.05 0.1 10 0.02 0 0.01 single pulse 10-1 10-1 100 101 102 0 0 0 0 0 0 1 10-6 10-5 10-4 10-3 10-2 10-1 100 t p [s] V DS [V] Rev. 1.4 0.01 page 4 2009-10-23 BSC072N03LD G 5 Typ. output characteristics 6 Typ. drain-source on resistance I D=f(V DS); T j=25 °C R DS(on)=f(I D); T j=25 °C parameter: V GS parameter: V GS 80 20 10 V 70 5V 4.5 V 3V 60 15 3.2 V 3.5 V 4V R DS(on) [mΩ] I D [A] 50 40 30 3.5 V 10 4V 4.5 V 3.2 V 10 V 20 5V 5 3V 10 2.8 V 0 0 0 1 2 3 0 10 V DS [V] 20 30 20 30 I D [A] 7 Typ. transfer characteristics 8 Typ. forward transconductance I D=f(V GS); |V DS|>2|I D|R DS(on)max g fs=f(I D); T j=25 °C 80 80 70 70 60 60 50 50 g fs [S] I D [A] parameter: T j 40 30 30 20 20 150 °C 10 10 25 °C 0 0 0 1 2 3 4 5 0 10 I D [A] V GS [V] Rev. 1.4 40 page 5 2009-10-23 BSC072N03LD G 9 Drain-source on-state resistance 10 Typ. gate threshold voltage R DS(on)=f(T j); I D=20 A; V GS=10 V V GS(th)=f(T j); V GS=V DS; I D=250 µA 12 2.5 10 2 98 % 6 V GS(th) [V] R DS(on) [mΩ] 8 typ 1.5 1 4 0.5 2 0 0 -60 -20 20 60 100 140 180 -60 -20 20 60 100 140 180 T j [°C] T j [°C] 11 Typ. capacitances 12 Forward characteristics of reverse diode C =f(V DS); V GS=0 V; f =1 MHz I F=f(V SD) parameter: T j 104 100 150 °C, 98% Ciss 25 °C Coss I F [A] C [pF] 103 10 150 °C 25 °C, 98% 10 2 Crss 101 1 0 10 20 30 Rev. 1.4 0.0 0.5 1.0 1.5 2.0 V SD [V] V DS [V] page 6 2009-10-23 BSC072N03LD G 13 Avalanche characteristics 14 Typ. gate charge I AS=f(t AV); R GS=25 Ω V GS=f(Q gate); I D=20 A pulsed parameter: T j(start) parameter: V DD 100 12 15 V 10 6V 24 V 25 °C 10 8 100 °C I AV [A] V GS [V] 125 °C 1 6 4 2 0.1 0 1 10 100 1000 0 10 20 30 40 Q gate [nC] t AV [µs] 15 Drain-source breakdown voltage 16 Gate charge waveforms V BR(DSS)=f(T j); I D=1 mA 34 V GS Qg 32 V BR(DSS) [V] 30 28 26 V g s(th) 24 Q g(th) 22 Q sw Q gs 20 -60 -20 20 60 100 140 Q g ate Q gd 180 T j [°C] Rev. 1.4 page 7 2009-10-23 BSC072N03LD G Package Outline and Footprint Rev. 1.4 PG-TDSON-8 dual page 8 2009-10-23 BSC072N03LD G Tape PG-TDSON-8 Dimensions in mm Rev. 1.4 page 9 2009-10-23 BSC072N03LD G Published by Infineon Technologies AG 81726 Munich, Germany © 2008 Infineon Technologies AG All Rights Reserved. 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Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1.4 page 10 2009-10-23