Lyontek LY6125616I 5v 256k x 16 bit high speed cmos sram Datasheet

®
LY6125616
5V 256K X 16 BIT HIGH SPEED CMOS SRAM
Rev. 2.1
REVISION HISTORY
Revision
Rev. 1.0
Rev. 1.1
Rev. 1.2
Rev. 2.0
Rev. 2.1
Description
Initial Issue
Revised VIL = 0.6V => 0.8V
Revised Package Outline Dimension(TSOP-II)
Added LL Spec.
Revised Test Condition of ISB1/IDR
Added -12ns Spec.
Revised ICC and ISB1
Added I grade
Revised ABSOLUTE MAXIMUN RATINGS
Revised Test Condition of ICC
Revised FEATURES & ORDERING INFORMATION
Lead free and green package available to Green package
available
Deleted TSOLDER in ABSOLUTE MAXIMUN RATINGS
Added packing type in ORDERING INFORMATION
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
0
Issue Date
Mar.23.2006
Jun.9.2006
Apr.12.2007
Jun.25.2007
Apr.17.2009
®
LY6125616
Rev. 2.1
5V 256K X 16 BIT HIGH SPEED CMOS SRAM
FEATURES
GENERAL DESCRIPTION
„ Fast access time : 12/15/20/25ns
„ Low power consumption:
Operating current : 180/140/110/100mA(MAX.)
Standby current :
15mA(MAX. for 12ns)
3mA(MAX. for 15/20/25ns)
100µA( (MAX. for 15/20/25ns LL version)
„ Single 5V power supply
„ All inputs and outputs TTL compatible
„ Fully static operation
„ Tri-state output
„ Data byte control : LB# (DQ0 ~ DQ7)
UB# (DQ8 ~ DQ15)
„ Data retention voltage : 2.0V (MIN.)
„ Green package available
„ Package : 44-pin 400 mil TSOP-II
The LY6125616 is a 4,194,304-bit low power CMOS
static random access memory organized as 262,144
words by 16 bits. It is fabricated using very high
performance, high reliability CMOS technology. Its
standby current is stable within the range of
operating temperature.
The LY6125616 is well designed for low power
application, and particularly well suited for battery
back-up nonvolatile memory application.
The LY6125616 operates from a single power
supply of 5V and all inputs and outputs are fully TTL
compatible
PRODUCT FAMILY
Product
Operating
Family
Temperature
0 ~ 70℃
LY6125616
-20 ~ 80℃
LY6125616(E)
-40 ~ 85℃
LY6125616(I)
0 ~ 70℃
LY6125616
-20 ~ 80℃
LY6125616(E)
-40 ~ 85℃
LY6125616(I)
0 ~ 70℃
LY6125616(LL)
-20
~ 80℃
LY6125616(LLE)
LY6125616(LLI) -40 ~ 85℃
Vcc
Range
4.5 ~ 5.5V
4.5 ~ 5.5V
4.5 ~ 5.5V
4.5 ~ 5.5V
4.5 ~ 5.5V
4.5 ~ 5.5V
4.5 ~ 5.5V
4.5 ~ 5.5V
4.5 ~ 5.5V
Speed
12ns
12ns
12ns
15/20/25ns
15/20/25ns
15/20/25ns
15/20/25ns
15/20/25ns
15/20/25ns
Power Dissipation
Standby(ISB1)
Operating(Icc)
15mA(MAX.)
180mA(MAX.)
15mA(MAX.)
180mA(MAX.)
15mA(MAX.)
180mA(MAX.)
3mA(MAX.) 140/110/100mA(MAX.)
3mA(MAX.) 140/110/100mA(MAX.)
3mA(MAX.) 140/110/100mA(MAX.)
100µA(MAX.) 140/110/100mA(MAX.)
100µA(MAX.) 140/110/100mA(MAX.)
100µA(MAX.) 140/110/100mA(MAX.)
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
1
®
LY6125616
5V 256K X 16 BIT HIGH SPEED CMOS SRAM
Rev. 2.1
FUNCTIONAL BLOCK DIAGRAM
PIN DESCRIPTION
Vcc
Vss
A0-A17
DQ0-DQ7
Lower Byte
DQ8-DQ15
Upper Byte
CE#
WE#
OE#
LB#
UB#
SYMBOL
DESCRIPTION
A0 - A17
Address Inputs
DQ0 – DQ15 Data Inputs/Outputs
DECODER
I/O DATA
CIRCUIT
256Kx16
MEMORY ARRAY
CE#
Chip Enable Input
WE#
Write Enable Input
OE#
Output Enable Input
LB#
Lower Byte Control
UB#
Upper Byte Control
VCC
Power Supply
VSS
Ground
COLUMN I/O
CONTROL
CIRCUIT
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
2
®
LY6125616
5V 256K X 16 BIT HIGH SPEED CMOS SRAM
Rev. 2.1
PIN CONFIGURATION
A4
1
44
A5
A3
2
43
A6
A2
3
42
A7
A1
4
41
OE#
A0
5
40
UB#
6
39
LB#
7
38
DQ15
DQ1
8
37
DQ14
DQ2
9
36
DQ13
DQ3
10
35
DQ12
Vcc
11
34
Vss
Vss
12
33
Vcc
DQ4
13
32
DQ11
DQ5
14
31
DQ10
DQ6
15
30
DQ9
DQ7
16
29
DQ8
WE#
17
28
NC
A17
18
27
A8
A16
19
26
A9
A15
20
25
A10
A14
21
24
A11
A13
22
23
A12
LY6125616
CE#
DQ0
TSOP II
ABSOLUTE MAXIMUN RATINGS*
PARAMETER
Voltage on VCC relative to VSS
Voltage on any other pin relative to VSS
Operating Temperature
Storage Temperature
Power Dissipation
DC Output Current
SYMBOL
VT1
VT2
TA
TSTG
PD
IOUT
RATING
-0.5 to 6.5
-0.5 to VCC+0.5
0 to 70(C grade)
-20 to 80(E grade)
-40 to 85(I grade)
-65 to 150
1
50
UNIT
V
V
℃
℃
W
mA
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
3
®
LY6125616
5V 256K X 16 BIT HIGH SPEED CMOS SRAM
Rev. 2.1
TRUTH TABLE
MODE
Standby
Output Disable
Read
Write
Note:
CE#
OE#
H
L
L
L
L
L
L
L
L
X
H
X
L
L
L
X
X
X
WE# LB#
X
H
X
H
H
H
L
L
L
UB#
X
X
H
L
H
L
L
H
L
X
X
H
H
L
L
H
L
L
I/O OPERATION
DQ0-DQ7
DQ8-DQ15
High – Z
High – Z
High – Z
High – Z
High – Z
High – Z
DOUT
High – Z
High – Z
DOUT
DOUT
DOUT
DIN
High – Z
High – Z
DIN
DIN
DIN
SUPPLY CURRENT
ISB1
ICC
ICC
ICC
H = VIH, L = VIL, X = Don't care.
DC ELECTRICAL CHARACTERISTICS
SYMBOL
TEST CONDITION
PARAMETER
Supply Voltage
VCC
*1
Input High Voltage
VIH
*2
Input Low Voltage
VIL
Input Leakage Current
ILI
VCC ≧ VIN ≧ VSS
Output Leakage
VCC ≧ VOUT ≧ VSS,
ILO
Current
Output Disabled
Output High Voltage
VOH IOH = -4mA
Output Low Voltage
VOL
IOL = 8mA
12
Cycle time = Min.
Average Operating
15
ICC
CE# = VIL , II/O = 0mA
Power supply Current
20
Others at VIL or VIH
25
12
Standby Power
CE# ≧VCC - 0.2V
ISB1
15/20/25
Supply Current
Others at 0.2V / VCC-0.2V
15/20/25LL
MIN.
4.5
2.2
- 0.3
-1
TYP.
5.0
-
*4
MAX.
5.5
VCC+0.3
0.8
1
UNIT
V
V
V
µA
-1
-
1
µA
2.4
-
100
80
75
0.1
20
0.4
180
140
110
100
15
5
3*
6
100*
V
V
mA
mA
mA
mA
mA
mA
µA
Notes:
1. VIH(max) = VCC + 3.0V for pulse width less than 10ns.
2. VIL(min) = VSS - 3.0V for pulse width less than 10ns.
3. Over/Undershoot specifications are characterized, not 100% tested.
4. Typical values are included for reference only and are not guaranteed or tested.
Typical valued are measured at VCC = VCC(TYP.) and TA = 25℃
5. 1mA for special request
6. 50µA for special request
CAPACITANCE (TA = 25℃, f = 1.0MHz)
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
CIN
CI/O
MIN.
-
Note : These parameters are guaranteed by device characterization, but not production tested.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
4
MAX
8
10
UNIT
pF
pF
®
LY6125616
Rev. 2.1
5V 256K X 16 BIT HIGH SPEED CMOS SRAM
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
0.2V to VCC - 0.2V
3ns
1.5V
CL = 30pF + 1TTL, IOH/IOL = -8mA/16mA
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
PARAMETER
SYM. LY6125616-12 LY6125616-15 LY6125616-20 LY6125616-25 UNIT
MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.
Read Cycle Time
tRC
12
15
20
25
ns
Address Access Time
tAA
12
15
20
25
ns
Chip Enable Access Time
tACE
12
15
20
25
ns
Output Enable Access Time
tOE
6
7
8
9
ns
Chip Enable to Output in Low-Z
tCLZ*
3
4
4
4
ns
Output Enable to Output in Low-Z tOLZ*
0
0
0
0
ns
Chip Disable to Output in High-Z tCHZ*
6
7
8
9
ns
Output Disable to Output in High-Z tOHZ*
6
7
8
9
ns
Output Hold from Address Change tOH
3
3
3
3
ns
LB#, UB# Access Time
tBA
6
7
8
9
ns
LB#, UB# to High-Z Output
tBHZ*
6
7
8
9
ns
LB#, UB# to Low-Z Output
tBLZ*
4
4
4
4
ns
(2) WRITE CYCLE
PARAMETER
SYM. LY6125616-12 LY6125616-15 LY6125616-20 LY6125616-25 UNIT
MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.
Write Cycle Time
tWC
12
15
20
25
ns
Address Valid to End of Write
tAW
8
12
16
20
ns
Chip Enable to End of Write
tCW
8
12
16
20
ns
Address Set-up Time
tAS
0
0
0
0
ns
Write Pulse Width
tWP
8
10
11
12
ns
Write Recovery Time
tWR
0
0
0
0
ns
Data to Write Time Overlap
tDW
6
8
9
10
ns
Data Hold from End of Write Time tDH
0
0
0
0
ns
Output Active from End of Write
tOW*
3
4
5
6
ns
Write to Output in High-Z
tWHZ*
6
8
9
10
ns
LB#, UB# Valid to End of Write
tBW
8
12
16
20
ns
*These parameters are guaranteed by device characterization, but not production tested.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
5
®
LY6125616
5V 256K X 16 BIT HIGH SPEED CMOS SRAM
Rev. 2.1
TIMING WAVEFORMS
READ CYCLE 1 (Address Controlled) (1,2)
tRC
Address
tAA
Dout
tOH
Previous Data Valid
Data Valid
READ CYCLE 2 (CE# and OE# Controlled) (1,3,4,5)
tRC
Address
tAA
CE#
tACE
LB#,UB#
tBA
OE#
tOE
tOH
tOHZ
tBHZ
tCHZ
tOLZ
tBLZ
tCLZ
Dout
High-Z
Data Valid
High-Z
Notes :
1.WE#is high for read cycle.
2.Device is continuously selected OE# = low, CE# = low, LB# or UB# = low.
3.Address must be valid prior to or coincident with CE# = low, LB# or UB# = low transition; otherwise tAA is the limiting parameter.
4.tCLZ, tBLZ, tOLZ, tCHZ, tBHZ and tOHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.
5.At any given temperature and voltage condition, tCHZ is less than tCLZ , tBHZ is less than tBLZ, tOHZ is less than tOLZ.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
6
®
LY6125616
5V 256K X 16 BIT HIGH SPEED CMOS SRAM
Rev. 2.1
WRITE CYCLE 1 (WE# Controlled) (1,2,3,5,6)
tWC
Address
tAW
CE#
tCW
tBW
LB#,UB#
tAS
tWP
tWR
WE#
tWHZ
Dout
TOW
High-Z
(4)
tDW
Din
(4)
tDH
Data Valid
WRITE CYCLE 2 (CE# Controlled) (1,2,5,6)
tWC
Address
tAW
CE#
tAS
tWR
tCW
tBW
LB#,UB#
tWP
WE#
tWHZ
Dout
High-Z
(4)
tDW
tDH
Data Valid
Din
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
7
®
LY6125616
5V 256K X 16 BIT HIGH SPEED CMOS SRAM
Rev. 2.1
WRITE CYCLE 3 (LB#,UB# Controlled) (1,2,5,6)
tWC
Address
tAW
tWR
CE#
tAS
tCW
tBW
LB#,UB#
tWP
WE#
tWHZ
Dout
High-Z
(4)
tDW
tDH
Data Valid
Din
Notes :
1.WE#,CE#, LB#, UB# must be high during all address transitions.
2.A write occurs during the overlap of a low CE#, low WE#, LB# or UB# = low.
3.During a WE# controlled write cycle with OE# low, tWP must be greater than tWHZ + tDW to allow the drivers to turn off and data to be
placed on the bus.
4.During this period, I/O pins are in the output state, and input signals must not be applied.
5.If the CE#, LB#, UB# low transition occurs simultaneously with or after WE# low transition, the outputs remain in a high impedance
state.
6.tOW and tWHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
8
®
LY6125616
5V 256K X 16 BIT HIGH SPEED CMOS SRAM
Rev. 2.1
DATA RETENTION CHARACTERISTICS
PARAMETER
SYMBOL
TEST CONDITION
MIN.
VCC for Data Retention
VDR
CE# ≧ VCC - 0.2V
2.0
12
VCC = 2.0V
CE# ≧ VCC - 0.2V
Data Retention Current
IDR
15/20/25
other pins at 0.2V or VCC-0.2V 15/20/25LL
Chip Disable to Data
See Data Retention
tCDR
0
Retention Time
Waveforms (below)
Recovery Time
tR
tRC*
tRC* = Read Cycle Time
DATA RETENTION WAVEFORM
VDR ≧ 2.0V
Vcc
Vcc(min.)
Vcc(min.)
tCDR
CE#
VIH
tR
CE# ≧ Vcc-0.2V
VIH
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
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TYP. MAX. UNIT
5.5
V
10
mA
0.05
2
mA
10
50
µA
-
-
ns
-
-
ns
®
LY6125616
5V 256K X 16 BIT HIGH SPEED CMOS SRAM
Rev. 2.1
PACKAGE OUTLINE DIMENSION
θ
44-pin 400mil TSOP-Ⅱ Package Outline Dimension
SYMBOLS
A
A1
A2
b
c
D
E
E1
e
L
ZD
y
Θ
DIMENSIONS IN MILLMETERS
MIN.
NOM.
MAX.
1.20
0.05
0.10
0.15
0.95
1.00
1.05
0.30
0.45
0.12
0.21
18.212
18.415
18.618
11.506
11.760
12.014
9.957
10.160
10.363
0.800
0.40
0.50
0.60
0.805
0.076
o
o
o
3
6
0
DIMENSIONS IN MILS
MIN.
NOM.
MAX.
47.2
2.0
3.9
5.9
37.4
39.4
41.3
11.8
17.7
4.7
8.3
717
725
733
453
463
473
392
400
408
31.5
15.7
19.7
23.6
31.7
3
o
o
o
0
3
6
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
10
®
LY6125616
Rev. 2.1
5V 256K X 16 BIT HIGH SPEED CMOS SRAM
ORDERING INFORMATION
LY6125616 U V - WW XX Y Z
Z : Packing Type
Blank : Tube or Tray
T : Tape Reel
Y : Temperature Range
Blank : (Commercial) 0°C ~ 70°C
E : (Extended) -20°C ~ +80°C
I : (Industrial) -40°C ~ +85°C
XX : Power Type
LL : Ultra Low Power
WW : Access Time(Speed)
V : Lead Information
L : Green Package
U : Package Type
M : 44-pin 400 mil TSOP-II
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
11
®
LY6125616
Rev. 2.1
5V 256K X 16 BIT HIGH SPEED CMOS SRAM
THIS PAGE IS LEFT BLANK INTENTIONALLY.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
12
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