CONEXANT CY74FCT2374ATSOCG4 8-bit register with 3-state output Datasheet

CY74FCT2374T
8-BIT REGISTER
WITH 3-STATE OUTPUTS
SCCS040A – SEPTEMBER 1994 – REVISED OCTOBER 2001
D
D
D
D
D
D
D
D
D
D
D
D
Function and Pinout Compatible With FCT
and F Logic
25-Ω Output Series Resistors to Reduce
Transmission-Line Reflection Noise
Reduced VOH (Typically = 3.3 V) Version of
Equivalent FCT Functions
Edge-Rate Control Circuitry for
Significantly Improved Noise
Characteristics
Ioff Supports Partial-Power-Down Mode
Operation
Matched Rise and Fall Times
Fully Compatible With TTL Input and
Output Logic Levels
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
3-State Outputs
12-mA Output Sink Current
15-mA Output Source Current
Edge-Triggered D-Type Inputs
250-MHz Typical Switching Rate
SN74FCT2374T . . . Q OR SO PACKAGE
(TOP VIEW)
OE
O0
D0
D1
O1
O2
D2
D3
O3
GND
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
O7
D7
D6
O6
O5
D5
D4
O4
CP
description
The CY74FCT2374T is a high-speed, low-power, octal D-type flip-flop featuring separate D-type inputs for each
flip-flop. On-chip termination resistors at the outputs reduce system noise caused by reflections. The
CY74FCT2374T can replace the CY74FCT374T to reduce noise in an existing design. The device has 3-state
outputs for bus-oriented applications. A buffered clock (CP) and output-enable (OE) inputs are common to all
flip-flops. The flip-flops in the CY74FCT2374T store the state of their individual data (D) inputs that meet the
setup-time and hold-time requirements on the low-to-high CP transition. When OE is low, the contents of the
flip-flops are available at the outputs. When OE is high, the outputs are in the high-impedance state. The state
of OE does not affect the state of the flip-flops.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
CY74FCT2374T
8-BIT REGISTER
WITH 3-STATE OUTPUTS
SCCS040A – SEPTEMBER 1994 – REVISED OCTOBER 2001
ORDERING INFORMATION
SPEED
(ns)
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
Tape and reel
5.2
CY74FCT2374CTQCT
FCT2374C
Tube
5.2
CY74FCT2374CTSOC
Tape and reel
5.2
CY74FCT2374CTSOCT
Tape and reel
6.5
CY74FCT2374ATQCT
Tube
6.5
CY74FCT2374ATSOC
Tape and reel
6.5
CY74FCT2374ATSOCT
Tube
10
CY74FCT2374TSOC
Tape and reel
10
CY74FCT2374TSOCT
PACKAGE†
TA
QSOP – Q
SOIC – SO
–40°C
40°C to 85°C
QSOP – Q
SOIC – SO
SOIC – SO
FCT2374C
FCT2374A
FCT2374A
FCT2374
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
INPUTS
D
CP
OE
OUTPUT
O
H
↑
L
H
L
↑
L
L
X
X
H
Z
H = High logic level, L = Low logic level,
X = Don’t care, Z = High-impedance
state, ↑ = Low-to-high clock transition
logic diagram (positive logic)
OE
CP
D0
1
11
3
CP
D
Q
To Seven Other Channels
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
2
O0
CY74FCT2374T
8-BIT REGISTER
WITH 3-STATE OUTPUTS
SCCS040A – SEPTEMBER 1994 – REVISED OCTOBER 2001
absolute maximum rating over operating free-air temperature range (unless otherwise noted)†
Supply voltage range to ground potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC output current (maximum sink current/pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 mA
Package thermal impedance, θJA (see Note 1): Q package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68°C/W
SO package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
Ambient temperature range with power applied, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 135°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 2)
VCC
VIH
Supply voltage
VIL
IOH
Low-level input voltage
IOL
TA
Low-level output current
High-level input voltage
MIN
NOM
MAX
UNIT
4.75
5
5.25
V
2
High-level output current
Operating free-air temperature
–40
V
0.8
V
– 15
mA
12
mA
85
°C
NOTE 2: All unused inputs of the device must be held at VCC or GND to ensure proper device operation.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
CY74FCT2374T
8-BIT REGISTER
WITH 3-STATE OUTPUTS
SCCS040A – SEPTEMBER 1994 – REVISED OCTOBER 2001
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VIK
VOH
VCC = 4.75 V,
VCC = 4.75 V,
IIN = –18 mA
IOH = –15 mA
VOL
ROUT
VCC = 4.75 V,
VCC = 4.75 V,
IOL = 12 mA
IOL = 12 mA
Vhys
II
All inputs
MIN
2.4
20
VIN = VCC
VIN = 2.7 V
VCC = 5.25 V,
VCC = 5.25 V,
VIN = 0.5 V
VOUT = 2.7 V
VCC = 5.25 V,
VCC = 5.25 V,
VOUT = 0.5 V
VOUT = 0 V
Ioff
VCC = 0 V,
VOUT = 4.5 V
ICC
∆ICC
VCC = 5.25 V,
VIN ≤ 0.2 V,
VIN ≥ VCC – 0.2 V
§
VCC = 5.25 V, VIN = 3.4 V , f1 = 0, Outputs open
ICCD¶
VCC = 5.25 V, Outputs open, One input switching at 50% duty cycle,
OE = GND, VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V
VIN ≤ 0.2 V or
VIN ≥ VCC – 0.2V
IOZH
IOZL
IOS‡
MAX
UNIT
–0.7
–1.2
V
3.3
V
0.3
0.55
V
25
40
Ω
5
µA
±1
µA
±1
µA
10
µA
0.2
VCC = 5.25 V,
VCC = 5.25 V,
IIH
IIL
TYP†
V
–10
µA
–225
mA
±1
µA
0.1
0.2
mA
0.5
2
mA
0.06
0.12
mA/
MHz
0.7
1.4
VIN = 3.4 V or GND
VIN ≤ 0.2 V or
VIN ≥ VCC – 0.2 V
1.2
3.4
1.6
3.2||
VIN = 3.4 V or GND
3.9
12.2||
Ci
5
10
Co
9
12
IC#
25 V,
V
VCC = 5
5.25
Outputs open,,
f0 = 10 MHz,
OE = GND
–60
One bit switching
at f1 = 5 MHz
at 50% duty cycle
Eight bits switching
at f1 = 2.5 MHz
at 50% duty cycle
–120
mA
pF
pF
† Typical values are at VCC = 5 V, TA = 25°C.
‡ Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus
and/or sample-and-hold techniques are preferable to minimize internal chip heating and more accurately reflect operational values. Otherwise,
prolonged shorting of a high output can raise the chip temperature well above normal and cause invalid readings in other parametric tests. In
any sequence of parameter tests, IOS tests should be performed last.
§ Per TTL-driven input (VIN = 3.4 V); all other inputs at VCC or GND
¶ This parameter is derived for use in total power-supply calculations.
# IC
= ICC + ∆ICC × DH × NT + ICCD (f0/2 + f1 × N1)
Where:
IC
= Total supply current
ICC = Power-supply current with CMOS input levels
∆ICC = Power-supply current for a TTL high input (VIN = 3.4 V)
DH
= Duty cycle for TTL inputs high
NT
= Number of TTL inputs at DH
ICCD = Dynamic current caused by an input transition pair (HLH or LHL)
f0
= Clock frequency for registered devices, otherwise zero
f1
= Input signal frequency
N1
= Number of inputs changing at f1
All currents are in milliamperes and all frequencies are in megahertz.
|| Values for these conditions are examples of the ICC formula.
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
CY74FCT2374T
8-BIT REGISTER
WITH 3-STATE OUTPUTS
SCCS040A – SEPTEMBER 1994 – REVISED OCTOBER 2001
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (see Figure 1)
CY74FCT2374T
MIN
CY74FCT2374AT
MAX
MIN
MAX
CY74FCT2374CT
MIN
MAX
UNIT
tw
tsu
Pulse duration, CP
7
5
4
ns
Setup time, data before CP↑
2
2
1.5
ns
th
Hold time, data after CP↑
1.5
1.5
1
ns
switching characteristics over operating free-air temperature range (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
CP
O
tPZH
tPZL
OE
O
tPHZ
tPLZ
OE
O
POST OFFICE BOX 655303
CY74FCT2374T
CY74FCT2374AT
CY74FCT2374CT
MIN
MAX
MIN
MAX
MIN
MAX
2
10
2
6.5
2
5.2
2
10
2
6.5
2
5.2
1.5
12.5
1.5
6.5
1.5
6.2
1.5
12.5
1.5
6.5
1.5
6.2
1.5
8
1.5
5.5
1.5
5
1.5
8
1.5
5.5
1.5
5
• DALLAS, TEXAS 75265
UNIT
ns
ns
ns
5
CY74FCT2374T
8-BIT REGISTER
WITH 3-STATE OUTPUTS
SCCS040A – SEPTEMBER 1994 – REVISED OCTOBER 2001
PARAMETER MEASUREMENT INFORMATION
7V
From Output
Under Test
From Output
Under Test
Test
Point
CL = 50 pF
(see Note A)
Open
TEST
GND
CL = 50 pF
(see Note A)
500 Ω
S1
500 Ω
S1
Open
7V
Open
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
500 Ω
LOAD CIRCUIT FOR
3-STATE OUTPUTS
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
3V
1.5 V
Timing Input
0V
tw
tsu
3V
1.5 V
Input
1.5 V
th
3V
1.5 V
Data Input
1.5 V
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3V
1.5 V
Input
1.5 V
0V
tPLH
tPHL
1.5 V
1.5 V
VOL
tPHL
Out-of-Phase
Output
tPLZ
≈3.5 V
1.5 V
tPZH
VOH
1.5 V
VOL
1.5 V
0V
Output
Waveform 1
(see Note B)
tPLH
1.5 V
1.5 V
tPZL
VOH
In-Phase
Output
3V
Output
Control
Output
Waveform 2
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOL + 0.3 V
VOL
tPHZ
1.5 V
VOH – 0.3 V
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
24-May-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
74FCT2374ATSOCTE4
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74FCT2374ATSOCTG4
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74FCT2374CTSOCTE4
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74FCT2374CTSOCTG4
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74FCT2574ATQCTE4
ACTIVE
SSOP/
QSOP
DBQ
20
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
74FCT2574ATSOCTE4
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74FCT2574ATSOCTG4
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74FCT2574CTSOCTE4
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74FCT2574CTSOCTG4
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT2374ATQCT
ACTIVE
SSOP/
QSOP
DBQ
20
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
CY74FCT2374ATQCTE4
ACTIVE
SSOP/
QSOP
DBQ
20
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
CY74FCT2374ATQCTG4
ACTIVE
SSOP/
QSOP
DBQ
20
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
CY74FCT2374ATSOC
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT2374ATSOCE4
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT2374ATSOCG4
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT2374ATSOCT
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT2374CTQCT
ACTIVE
SSOP/
QSOP
DBQ
20
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
CY74FCT2374CTQCTE4
ACTIVE
SSOP/
QSOP
DBQ
20
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
CY74FCT2374CTQCTG4
ACTIVE
SSOP/
QSOP
DBQ
20
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
CY74FCT2374CTSOC
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT2374CTSOCE4
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT2374CTSOCG4
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT2374CTSOCT
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT2374TSOC
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT2374TSOCE4
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Addendum-Page 1
Lead/Ball Finish
MSL Peak Temp (3)
PACKAGE OPTION ADDENDUM
www.ti.com
24-May-2007
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
CY74FCT2374TSOCG4
ACTIVE
SOIC
DW
20
CY74FCT2374TSOCT
ACTIVE
SOIC
DW
CY74FCT2374TSOCTE4
ACTIVE
SOIC
CY74FCT2374TSOCTG4
ACTIVE
CY74FCT2574ATQCT
25
Lead/Ball Finish
MSL Peak Temp (3)
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
ACTIVE
SSOP/
QSOP
DBQ
20
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
CY74FCT2574ATQCTG4
ACTIVE
SSOP/
QSOP
DBQ
20
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
CY74FCT2574ATSOC
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT2574ATSOCE4
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT2574ATSOCG4
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT2574ATSOCT
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT2574CTQCT
ACTIVE
SSOP/
QSOP
DBQ
20
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
CY74FCT2574CTQCTE4
ACTIVE
SSOP/
QSOP
DBQ
20
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
CY74FCT2574CTQCTG4
ACTIVE
SSOP/
QSOP
DBQ
20
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
CY74FCT2574CTSOC
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT2574CTSOCE4
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT2574CTSOCG4
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT2574CTSOCT
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT2574TSOC
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT2574TSOCE4
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT2574TSOCG4
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT2574TSOCT
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT2574TSOCTE4
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT2574TSOCTG4
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
24-May-2007
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
19-May-2007
TAPE AND REEL INFORMATION
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
Device
19-May-2007
Package Pins
Site
Reel
Diameter
(mm)
Reel
Width
(mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
CY74FCT2374ATQCT
DBQ
20
MLA
330
16
6.5
9.0
2.1
8
16
Q1
CY74FCT2374ATSOCT
DW
20
MLA
330
24
10.8
13.0
2.7
12
24
Q1
CY74FCT2374CTQCT
DBQ
20
MLA
330
16
6.5
9.0
2.1
8
16
Q1
CY74FCT2374CTSOCT
DW
20
MLA
330
24
10.8
13.0
2.7
12
24
Q1
CY74FCT2374TSOCT
DW
20
MLA
330
24
10.8
13.0
2.7
12
24
Q1
CY74FCT2574ATQCT
DBQ
20
MLA
330
16
6.5
9.0
2.1
8
16
Q1
CY74FCT2574ATSOCT
DW
20
MLA
330
24
10.8
13.0
2.7
12
24
Q1
CY74FCT2574CTQCT
DBQ
20
MLA
330
16
6.5
9.0
2.1
8
16
Q1
CY74FCT2574CTSOCT
DW
20
MLA
330
24
10.8
13.0
2.7
12
24
Q1
CY74FCT2574TSOCT
DW
20
MLA
330
24
10.8
13.0
2.7
12
24
Q1
TAPE AND REEL BOX INFORMATION
Device
Package
Pins
Site
Length (mm)
Width (mm)
Height (mm)
CY74FCT2374ATQCT
DBQ
20
MLA
0.0
0.0
0.0
CY74FCT2374ATSOCT
DW
20
MLA
333.2
333.2
31.75
CY74FCT2374CTQCT
DBQ
20
MLA
0.0
0.0
0.0
CY74FCT2374CTSOCT
DW
20
MLA
333.2
333.2
31.75
CY74FCT2374TSOCT
DW
20
MLA
333.2
333.2
31.75
CY74FCT2574ATQCT
DBQ
20
MLA
0.0
0.0
0.0
CY74FCT2574ATSOCT
DW
20
MLA
333.2
333.2
31.75
CY74FCT2574CTQCT
DBQ
20
MLA
0.0
0.0
0.0
CY74FCT2574CTSOCT
DW
20
MLA
333.2
333.2
31.75
CY74FCT2574TSOCT
DW
20
MLA
333.2
333.2
31.75
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
19-May-2007
Pack Materials-Page 3
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logic.ti.com
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www.ti.com/military
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microcontroller.ti.com
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