BSC016N06NS OptiMOSTM Power-MOSFET Product Summary Features • Optimized for synchronous rectification • 100% avalanche tested • Superior thermal resistance • N-channel VDS 60 V RDS(on),max 1.6 mW ID 100 A QOSS 81 nC QG(0V..10V) 71 nC 1) • Qualified according to JEDEC for target applications PG-TDSON-8 FL enlarged source interconnection • Pb-free lead plating; RoHS compliant • Halogen-free according to IEC61249-2-21 • Higher solder joint reliability due to enlarged source interconnection Type Package Marking BSC016N06NS PG-TDSON-8 FL 016N06NS Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Continuous drain current ID Value V GS=10 V, T C=25 °C 100 V GS=10 V, T C=100 °C 100 V GS=10 V, T A=25 °C, R thJA=50 K/W 2) 30 Unit A Pulsed drain current3) I D,pulse T C=25 °C 400 Avalanche energy, single pulse4) E AS I D=50 A, R GS=25 W 380 mJ Gate source voltage V GS ±20 V 1) J-STD20 and JESD22 Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 2) 3) 4) See figure 3 for more detailed information See figure 13 for more detailed information Rev. 2.1 page 1 2013-01-29 BSC016N06NS Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Power dissipation P tot Operating and storage temperature Value T C=25 °C 139 T A=25 °C, R thJA=50 K/W 2.5 T j, T stg W -55 ... 150 IEC climatic category; DIN IEC 68-1 Parameter Unit °C 55/150/56 Values Symbol Conditions Unit min. typ. max. bottom - - 0.9 top - - 20 6 cm2 cooling area2) - - 50 Thermal characteristics Thermal resistance, junction - case Device on PCB R thJC R thJA K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=1 mA 60 - - Gate threshold voltage V GS(th) V DS=V GS, I D=95 µA 2.1 2.8 3.3 Zero gate voltage drain current I DSS V DS=60 V, V GS=0 V, T j=25 °C - 0.5 1 V DS=60 V, V GS=0 V, T j=125 °C - 10 100 V µA Gate-source leakage current I GSS V GS=20 V, V DS=0 V - 10 100 nA Drain-source on-state resistance R DS(on) V GS=10 V, I D=50 A - 1.4 1.6 mW V GS=6 V, I D=12.5 A - 1.9 2.4 - 1.9 2.9 W 70 140 - S Gate resistance RG Transconductance g fs Rev. 2.1 |V DS|>2|I D|R DS(on)max, I D=50 A page 2 2013-01-29 BSC016N06NS Parameter Values Symbol Conditions Unit min. typ. max. 3900 5200 6500 900 1200 1500 Dynamic characteristics Input capacitance C iss Output capacitance C oss Reverse transfer capacitance Crss 14 48 96 Turn-on delay time t d(on) - 19 38 Rise time tr - 9 18 Turn-off delay time t d(off) - 35 70 Fall time tf - 9 18 V GS=0 V, V DS=30 V, f =1 MHz V DD=30 V, V GS=10 V, I D=30 A, R G,ext=1.6 W pF ns Gate Charge Characteristics5) Gate to source charge Q gs 16 22 30 Gate charge at threshold Q g(th) 10 14 19 Gate to drain charge Q gd 8.8 13 20 Switching charge Q sw 14 21 30 Gate charge total Qg 58 71 95 Gate plateau voltage V plateau 3.7 4.3 4.9 V Gate charge total, sync. FET Q g(sync) V DS=0.1 V, V GS=0 to 10 V 49 62 86 nC Output charge Q oss V DD=30 V, V GS=0 V 60 81 102 - - 100 - - 400 V DD=30 V, I D=50 A, V GS=0 to 10 V nC Reverse Diode Diode continuous forward current IS A T C=25 °C Diode pulse current I S,pulse Diode forward voltage V SD V GS=0 V, I F=50 A, T j=25 °C - 0.9 1.2 V Reverse recovery time t rr V R=30 V, I F=50A, di F/dt =100 A/µs 24 61 98 ns Reverse recovery charge Q rr 39 78 156 nC 5) See figure 16 for gate charge parameter definition Rev. 2.1 page 3 2013-01-29 BSC016N06NS 1 Power dissipation 2 Drain current P tot=f(T C) I D=f(T C); V GS≥10 V 160 120 140 100 120 80 ID [A] Ptot [W] 100 80 60 60 40 40 20 20 0 0 0 40 80 120 160 0 40 80 TC [°C] 120 TC [°C] 3 Safe operating area 4 Max. transient thermal impedance I D=f(V DS); T C=25 °C; D=0 Z thJC=f(t p) parameter: t p parameter: D =t p/T 103 160 101 limited by on-state resistance 1 µs 10 µs 102 100 100 µs 0.5 ZthJC [K/W] 1 ms ID [A] 10 ms 101 DC 0.2 0.1 10-1 0.05 0.02 0.01 100 10-2 10-1 10-3 10-1 100 101 102 VDS [V] Rev. 2.1 single pulse 10-6 10-5 10-4 10-3 10-2 10-1 100 tp [s] page 4 2013-01-29 BSC016N06NS 5 Typ. output characteristics 6 Typ. drain-source on resistance I D=f(V DS); T j=25 °C R DS(on)=f(I D); T j=25 °C parameter: V GS parameter: V GS 400 10 V 8V 350 6V 5V 3 300 5.5 V 2.5 5.5 V RDS(on) [mW] ID [A] 250 200 150 6V 2 8V 1.5 5V 10 V 100 1 50 0 0.5 0.0 1.0 2.0 0 50 100 150 VDS [V] 200 250 300 350 400 ID [A] 7 Typ. transfer characteristics 8 Typ. forward transconductance I D=f(V GS); |V DS|>2|I D|R DS(on)max g fs=f(I D); T j=25 °C parameter: T j 200 320 160 240 120 ID [A] gfs [S] 400 160 80 80 40 150 °C 25 °C 0 0 0 1 2 3 4 5 6 VGS [V] Rev. 2.1 0 20 40 60 80 100 ID [A] page 5 2013-01-29 BSC016N06NS 9 Drain-source on-state resistance 10 Typ. gate threshold voltage R DS(on)=f(T j); I D=50 A; V GS=10 V V GS(th)=f(T j); V GS=V DS 3.5 4 3 3.5 3 950 µA 2.5 2 max VGS(th) [V] RDS(on) [mW] 2.5 1.5 typ 95 µA 2 1.5 1 1 0.5 0.5 0 0 -60 -20 20 60 100 140 180 -60 -20 20 Tj [°C] 60 100 140 180 Tj [°C] 11 Typ. capacitances 12 Forward characteristics of reverse diode C =f(V DS); V GS=0 V; f =1 MHz I F=f(V SD) parameter: T j 104 1000 10000 Ciss 25 °C Coss 100 1000 150 °C IF [A] C [pF] 103 102 10 100 Crss 101 1 10 0 10 20 30 40 50 60 VDS [V] Rev. 2.1 0.0 0.5 1.0 1.5 VSD [V] page 6 2013-01-29 BSC016N06NS 13 Avalanche characteristics 14 Typ. gate charge I AS=f(t AV); R GS=25 W V GS=f(Q gate); I D=50 A pulsed parameter: T j(start) parameter: V DD 100 12 30 V 10 12 V 25 °C 48 V 100 °C 8 VGS [V] IAV [A] 125 °C 10 6 4 2 1 0 1 10 100 1000 0 20 tAV [µs] 40 60 80 Qgate [nC] 15 Drain-source breakdown voltage 16 Gate charge waveforms V BR(DSS)=f(T j); I D=1 mA 70 V GS 68 Qg 66 VBR(DSS) [V] 64 62 60 V gs(th) 58 56 54 Q g(th) Q sw 52 Q gs 50 -60 -20 20 60 100 Q gate Q gd 140 Tj [°C] Rev. 2.1 page 7 2013-01-29 BSC016N06NS Package Outline PG-TDSON-8 FL PG-TDSON-8 FL: Outline Rev. 2.1 page 8 2013-01-29 BSC016N06NS Package Outline PG-TDSON-8: Tape Dimensions in mm Rev. 2.1 page 9 2013-01-29 BSC016N06NS Published by Infineon Technologies AG 81726 Munich, Germany © 2012 Infineon Technologies AG All Rights Reserved. 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Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 2.1 page 10 2013-01-29