SN54F138, SN74F138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SDFS051B – MARCH 1987 – REVISED JULY 1996 D D D Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Incorporates Three Enable Inputs to Simplify Cascading and/or Data Reception Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs SN54F138 . . . J PACKAGE SN74F138 . . . D OR N PACKAGE (TOP VIEW) A B C G2A G2B G1 Y7 GND description 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC Y0 Y1 Y2 Y3 Y4 Y5 Y6 SN54F138 . . . FK PACKAGE (TOP VIEW) B A NC VCC Y0 The ′F138 is designed to be used in high-performance memory-decoding or datarouting applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay times of this decoder and the enable time of the memory are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible. 1 C G2A NC G2B G1 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 Y1 Y2 NC Y3 Y4 Y7 GND NC Y6 Y5 The conditions at the binary-select inputs and the three enable inputs select one of eight output lines. Two active-low and one active-high enable NC – No internal connection inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications. The SN54F138 is characterized for operation over the full military temperature range of – 55°C to 125°C. The SN74F138 is characterized for operation from 0°C to 70°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 1996, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54F138, SN74F138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SDFS051B – MARCH 1987 – REVISED JULY 1996 FUNCTION TABLE ENABLE INPUTS G1 G2A X X SELECT INPUTS OUTPUTS G2B C B A Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 H X X X X H H H H H H H H X H X X X H H H H H H H H L X X X X X H H H H H H H H H L L L L L L H H H H H H H H L L L L H H L H H H H H H H L L L H L H H L H H H H H H L L L H H H H H L H H H H H L L H L L H H H H L H H H H L L H L H H H H H H L H H H L L H H L H H H H H H L H H L L H H H H H H H H H H L logic symbols (alternatives)† A B C G1 1 2 3 6 4 G2A G2B 5 BIN/OCT 1 0 2 1 4 2 3 & 4 EN 5 6 7 15 14 13 12 11 10 9 7 Y0 A Y1 B Y2 C 1 G1 Y5 G2A Y6 G2B 3 6 4 5 Y7 POST OFFICE BOX 655303 G 2 0 7 1 2 & 3 4 5 6 7 † These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 2 0 2 Y3 Y4 DMUX 0 • DALLAS, TEXAS 75265 15 14 13 12 11 10 9 7 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 SN54F138, SN74F138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SDFS051B – MARCH 1987 – REVISED JULY 1996 logic diagram (positive logic) 15 A 1 14 Select Inputs B C 13 3 12 10 Enable Inputs 6 9 4 7 G2A G2B Y1 2 11 G1 Y0 Y2 Y3 Data Outputs Y4 Y5 Y6 Y7 5 Pin numbers shown are for the D, J, and N packages. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN54F138, SN74F138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SDFS051B – MARCH 1987 – REVISED JULY 1996 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 1.2 V to 7 V Input current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 30 mA to 5 mA Voltage range applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA Operating free-air temperature range: SN54F138 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C SN74F138 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed. recommended operating conditions SN54F138 VCC VIH Supply voltage VIL IIK Low-level input voltage IOH IOL High-level output current Low-level output current TA Operating free-air temperature High-level input voltage SN74F138 MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 2 2 Input clamp current – 55 UNIT V V 0.8 0.8 V – 18 – 18 mA –1 –1 mA 20 20 mA 70 °C 125 0 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH VOL II IIH IIL IOS§ ICC TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V, II = – 18 mA IOH = – 1 mA VCC = 4.75 V, VCC = 4.5 V, IOH = – 1 mA IOL = 20 mA VCC = 5.5 V, VCC = 5.5 V, VI = 7 V VI = 2.7 V VCC = 5.5 V, VCC = 5.5 V, VI = 0.5 V VO = 0 SN54F138 TYP‡ MAX MIN SN74F138 TYP‡ MAX MIN – 1.2 2.5 3.4 – 1.2 2.5 3.4 0.5 0.3 0.5 V 0.1 0.1 mA 20 20 µA – 0.6 mA –150 mA 20 mA – 0.6 – 60 –150 – 60 VCC = 5.5 V, See Note 2 13 20 13 ‡ All typical values are at VCC = 5 V, TA = 25°C. § Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second. NOTE 2: ICC is measured with outputs enabled and open. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V V 2.7 0.3 UNIT SN54F138, SN74F138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SDFS051B – MARCH 1987 – REVISED JULY 1996 switching characteristics (see Note 3) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 5 V, CL = 50 PF, RL = 500 Ω, TA = 25°C VCC = 4.5 V TO 5.5 V, CL = 50 PF, RL = 500 Ω, TA = MIN TO MAX† ′F138 tPLH tPHL A B, A, B or C Y tPLH tPHL G2A or G2B Y tPLH tPHL G1 Y UNIT SN54F138 SN74F138 MIN TYP MAX MIN MAX MIN MAX 2.7 5.2 7.5 2.7 12 2.7 8.5 3.2 5.7 8 3.2 9.5 3.2 9 2.7 5 7 2.7 11 2.7 8 2.2 4.9 7 2.2 8 2.2 7.5 3.2 5.8 8 3.2 12.5 3.2 9 2.7 5.2 7.5 2.7 8.5 2.7 8.5 ns ns ns † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. NOTE 3: Load circuits and waveforms are shown in Section 1. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2014 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) 5962-9758201Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 59629758201Q2A SNJ54F 138FK 5962-9758201QEA ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9758201QE A SNJ54F138J 5962-9758201QFA ACTIVE CFP W 16 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9758201QF A SNJ54F138W JM38510/33701B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/ 33701B2A JM38510/33701BEA ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 33701BEA JM38510/33701BFA ACTIVE CFP W 16 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 33701BFA M38510/33701B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/ 33701B2A M38510/33701BEA ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 33701BEA M38510/33701BFA ACTIVE CFP W 16 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 33701BFA SN54F138J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to 125 SN54F138J SN74F138D ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F138 SN74F138DG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F138 SN74F138DR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F138 SN74F138DRE4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F138 SN74F138DRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F138 Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2014 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty SN74F138N ACTIVE PDIP N 16 Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 Device Marking (4/5) SN74F138N SN74F138N3 OBSOLETE PDIP N 16 TBD Call TI Call TI 0 to 70 SN74F138NE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74F138N SN74F138NSR ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74F138 SNJ54F138FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 59629758201Q2A SNJ54F 138FK SNJ54F138J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9758201QE A SNJ54F138J SNJ54F138W ACTIVE CFP W 16 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9758201QF A SNJ54F138W (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2014 (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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OTHER QUALIFIED VERSIONS OF SN54F138, SN74F138 : • Catalog: SN74F138 • Military: SN54F138 NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product • Military - QML certified for Military and Defense Applications Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN74F138DR Package Package Pins Type Drawing SOIC D 16 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 16.4 Pack Materials-Page 1 6.5 B0 (mm) K0 (mm) P1 (mm) 10.3 2.1 8.0 W Pin1 (mm) Quadrant 16.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74F138DR SOIC D 16 2500 333.2 345.9 28.6 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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