MAS MAS9138N Asynchronous to synchronous converter Datasheet

DA9138.005
12 April, 2006
MAS9138
ASYNCHRONOUS TO SYNCHRONOUS CONVERTER
• Pin compatible with MAS7838
• Interfaces a duplex asynchronous to synchronous channel
• Modem speeds of 600, 1.2k, 2.4k, 4.8k, 7.2k, 9.6k, 12k,
14.4k, 19.2k and 38.4k bps with a single 4.9152 MHz crystal
DESCRIPTION
MAS9138 is a single chip duplex asynchronous to
synchronous converter. It converts asynchronous start
stop characters to synchronous format, with stop bit
deletion when required as defined in the CCITT
recommendation V.14. On the receiver channel
MAS9138 converts the incoming synchronous data to
asynchronous start stop character format with stop bit
insertion when required as defined in the CCITT
recommendation V.14. MAS9138 implements the data
modes for the synchronous interface as specified in the
V.14. MAS9138 can be configured to operate at any
frequency up to 38.4 kbits/s within these modes. The
device contains a bit generator and frequency selection
logic to allow easy operation at other data rates. With
just one crystal the device can adapt to ten (10)
different bit rates so it is ideally suited to be used with
the most common modem systems ranging from V.22
to V.34.
FEATURES
APPLICATION
•
•
•
•
•
•
•
•
•
•
•
Implements CCITT recommendation V.14
Bypass operation
Character length from 8 to 11 bits including start
stop and parity bits
CMOS and LS-TTL compatible interface
Low power consumption (typically 10 mW)
No additional circuitry needed to perform conversion
Single +3.3...+5V supply
Operating temperature -40oC to 85oC
16-pin PDIP and SO package
•
•
Data communication systems
Adapts asynchronous terminals to synchronous
modems
Full or half card PC modems using UART as a data
source
Simplifying data multiplexing systems
BLOCK DIAGRAM
CL1
VDD
CONTROL
CL2
XESR
TMG
OSC
O
S
C
TSL
ASYNC
TO
SYNC
TXC
TDO
SYNC
TO
ASYNC
RXC
RDI
TDI
RDO
XASY
>
_1
XHST
VSS
MAS9138
1 (10)
DA9138.005
12 April, 2006
PIN CONFIGURATION
PDIP 16
SO16
MAS9138N
TMG 2
15 RXC
OSC 3
14 RDI
TXC* 4
13 RDO
CL1 5
CL2 6
12 XHST
11 XASY
XESR 7
10 TDO
VSS 8
9 TDI
Top marking: YYWW = Year Week, XXXXX.X = Lot Number,
MAS9138SB/SD
TSL 1
TMG 2
OSC 3
TXC* 4
CL1 5
CL2 6
XESR 7
VSS 8
9138
XXXXX.X
YYWW
16 VDD
9138
XXXXX.X
YYWW
TSL 1
16
15
14
13
12
11
10
9
VDD
RXC
RDI
RDO
XHST
XASY
TDO
TDI
=ESD Indicator
PIN DESCRIPTION
Pin name
Pin no.
I/O
Function
PDIP
SO
TSL
1
1
I
Timing select. 0 selects external sampling timing 16 x TXC from pin 2,
TMG. 1 selects internal sampling timing.
TMG
2
2
I
Timing. Square wave timing signal 16 x TXC (TSL = 0) or 128 x
TXCmax (TSL = 1).
Max f = 10 Mhz when VDD = 5v and 5MHz when VDD = 3.3v.
OSC
3
3
O
Oscillator. Output for crystal. If used, the crystal is connected between
pins 2 and 3.
TXC
4
4
I
Transmitter timing (MAS9138 only).
Synchronous square wave timing for transmitter. The transmitted data
output, TDO is synchronized to the rising edge of TXC. The duty cycle
of TXC has to be 50% +/- 5%.
CL1
5
5
I
Character length. The total character length including one start bit, one
stop bit and possible parity bit is selected with the CL1 and CL2
signals.
CL2
6
6
I
XESR
7
7
I
Extended signalling rate. The tolerance of the synchronous bit rate can
be:
XESR = 1 (basic signalling rate) TXC -2.5%...+1.0%
XESR = 0 (extended signalling rate) TXC -2.5%...2.3%
VSS
8
8
G
Ground
2 (10)
DA9138.005
12 April, 2006
PIN DESCRIPTION
Pin name
Pin no.
I/O
Function
PDIP
SO
TDI
9
9
I
TDO
10
10
O
XASY
11
11
I
Asynchronous mode. XASY = 0 Asynchronous transmission, XASY = 1
Synchronous transmission. In synchronous transmission the converter
is totally bypassed in both directions: TDI = TDO, RDI = RDO
XHST
12
12
I
Higher speed signalling timing. XHST = 1 normal synchronous to
asynchronous conversion (CCITT V.14). XHST = 0 asynchronous to
synchronous conversion with higher speed synchronous timing (TXC,
RXC). TXC and RXC timing must be 1-2% higher than the normal bit
rate in order to allow some overspeed in the asynchronous data.
On the receiver side the RX buffer is deleted and the synchronous
data RDI is directly connected to the asynchronous output RDO.
RDO
13
13
O
RDI
14
14
I
Receiver data output. RDO is the received data converted back to
asynchrnous mode.
1 = mark or stop bit, 0 = space, start or break signal
Receiver data input. 1 = mark, 0 = space. The received data must be
synchronized to the receiver timing RXC from the synchronous
channel (pin 15).
RXC
15
15
I
Receiver timing (MAS9138 only). Receiver square wave timing from
the synchronous channel. The received data RDI must be
synchronized to the rising edge of RXC.
VDD
16
16
P
Power supply
Transmitter data input. 1 = mark or stop bit. 0 = space, start or break
signal.
Transmitter data output. Output data is synchronized to the
synchronous timing signal TXC (pin 4). 1 = mark. 0 = space.
ABSOLUTE MAXIMUM RATINGS
(GND = 0V)
Parameter
Supply Voltage
Storage Temperature
Symbol
Conditions
VDD
Ts
Min
Max
-0.5
-55
5.5
+150
Unit
V
C
o
RECOMMEDED OPERATION CONDITIONS
Parameter
Symbol
Supply Voltage
VDD
Supply current
IDD
Operating Temperature
Ta
Conditions
VDD = 5V
Min
Typ
Max
Unit
3
3.3 to
5.0
5.25
V
2
5
mA
-40
+85
3 (10)
o
C
DA9138.005
12 April, 2006
ELECTRICAL CHARACTERISTICS
Inputs
Parameter
(test conditions: -40oC to 85oC)
Symbol
Conditions
Input low voltage
VIL
VDD=5V, VSS=0V
VDD=3.3V, VSS=0V
Input high voltage
VIH
VDD=5V, VSS=0V
2
V
1.4
V
IIL
VDD=3.3V, VSS=0V
VDD=5V, VSS=0V
Input leakage current
Input capacitance load
Internal pull-up resistor for
digital inputs
Min
Typ
Max
Unit
0.8
0.4
V
V
-100
µA
VDD=3.3V, VSS=0V
-100
µA
CI
VDD=5V, VSS=0V
1
pF
Rpull-up
VDD=3.3V, VSS=0V
VDD=5V, VSS=0V, VIN=0.4V
1
150
kΩ
VDD=5V, VSS=0V, VIN=2.5V
300
kΩ
pF
VDD=3.3V, VSS=0V,
VIN=0.4V
200
275
350
kΩ
VDD=3.3V, VSS=0V,
VIN=1.5V
600
1000
1500
kΩ
Outputs (TDO, RDO)
(test conditions: -40oC to 85oC)
Parameter
Output low voltage
Output high voltage
Symbol
Conditions
VOL
VDD=5V, VSS=0V, IOL=+1.8mA
0.4
V
VDD=3.3V, VSS=0V,
IOL=+0.6mA
0.2
V
VOH
Min
Typ
Max
Unit
VDD=5V, VSS=0V, IOL=-4.3mA
3.0
V
VDD=3.3V, VSS=0V, IOL=2.1mA
1.8
V
Outputs (OSC)
(test conditions: -40oC to 85oC)
Parameter
Symbol
Conditions
Output low voltage
VOL
Output high voltage
VOH
VDD=5V, VSS=0V, IOL=+0.5mA
VDD=3.3V, VSS=0V,
IOL=+0.19mA
VDD=5V, VSS=0V, IOL=-1.4mA
VDD=3.3V, VSS=0V, IOL=0.7mA
Min
Typ
Max
Unit
0.4
0.2
V
V
3.0
V
1.8
4 (10)
DA9138.005
12 April, 2006
Data timing
(test conditions:VDD=3.3V - 5V, VSS=0V, -40oC to 85oC)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Low to high logic transition
time
tR
CL = 10pF
20
ns
High to low logic transition
time
tR
CL = 10 pF
20
ns
(test conditions:VDD=3.3V - 5V, VSS=0V, -40oC to 85oC, TSL = 1)
Parameter
Symbol
Conditions
Min
TDO delay time after TXC
T1
50
RDI setup time before RXC
T2
RDI hold time after RXC
T3
1/4
TRXC
1/4
TRXC
Typ
Max
Unit
TTXC/16
+ 350
ns
ns
ns
(test conditions:VDD=3.3V - 5V, VSS=0V, -40oC to 85oC, TSL = 0, TMG = 16xTXC)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
1/TMG
+ 350
ns
TDO delay time after TXC
T1
50
RDI setup time before RXC
T2
1/4
TRXC
ns
RDI hold time after RXC
T3
1/4
TRXC
ns
TIMING DIAGRAMS
The MAS9138 shifts the data out with rising edge of TXC. The data from RDI is read in with falling edge of RXC.
TTXC
TXC
TDO
delay
T1
TRXC
RXC
T2
T3
RDI
5 (10)
DA9138.005
12 April, 2006
FUNCTIONS
Asynchronous to synchronous converter
The
synchronous
start-stop
character,
TDI
(transmitter data input), is read into the Tx buffer.
When the character is available the data bits are
transferred as TDO (transmitter data output) with the
synchronous timing signal TXC (transmitter clock).
The bit rate of TDI must be the same as the TDO rate
within -2.5%...+1% or -2.5%...+2.3% tolerance
depending on XESR (extended signalling rate) signal.
The transmitter adds extra stop bits to the
synchronous data stream, if TDI is slower than TDO.
The over speed is handled by deleting one stop bit in
Synchronous to asynchronous converter
The synchronous RDI (receiver data input) is buffered
to recognize the stop and start bits. If a missing stop
bit is detected, it is added to the RDO (receiver data
output). In this case the stop bits are shortened 12.5%
Converting with higher speed timing
An alternative method to handle the over speed in
asynchronous data is to boost synchronous timing
TXC and RXC by 1-2%. In this mode XHST (higher
speed timing) = 0. In this case there is no need to
Timing selection
The MAS9138 requires clock signals in order to
function properly. The synchronous data transfer
always requires the TXC clock. The clock is used
internally for:
-shifting data out from the TX buffer (to pin TDO)
-detection of the bit rate in order to adjust the internal
baud rate generator (only if TSL = 1)
The asynchronous data transfer (pins TDI, TDO) is
accomplished by generating an internal timing signal
for the asychronous circuits. This internal timing signal
(16T) is 16 times the TXC bit rate in order to sample
the asynchronous data stream (TDI) at the proper
every 8th character at maximum in the synchronous
output data TDO. When extended signal rate (XESR =
0) is used 4th stop bit may be deleted. When the
transmitter detects a break signal( at least M bits of
start polarity, where M is length of character), it sends
2M + 3 bits of start - polarity to TDO. If the break is
longer than 2M + 3 bits, then all bits are transferred to
TDO. After a break signal, at least 2M bits of stop
polarity must be transmitted before sending further
data.
(25% if XESR = 0) during each character. When the
receiver gets at least 2M + 3 bits of start polarity, it
does not add stop bits to RDO. This enables the break
signal to go through the buffer.
delete any stop bits in the transmitter buffer. The
break signal goes through unchanged. On the receiver
side the synchronous data, RDI, is transferred directly
to the asynchronous output RDO with RXC.
speed. The internal clock 16T is either generated from
a crystal frequency by dividing it by 8, 16, 21 1/3, 25
3/5, 32, 42 2/3,64,128,256 or 512. Or it can also be
generated externally and fed to pin TMG (TSL = 0).
This is especially useful if the system already
generates a clock which is 16 times the bit clock TXC
as shown or if the bit rate is higher than 38.4 kHz. The
divider is automatically selected by internal logic by
measuring the TXC clock speed (TSL = 1). A crystal
oscillator or a resonator can also be connected
between pins 2 and 3. The crystal frequency should
be 128 x TXCmax.
Timing Circuits
MAS 9138
16 x TXC
TXC
EXTERNALLY GENERATED 16T CLOCK
Character Length CL1,CL2
CL1
1
0
1
0
CL2
0
0
1
1
Conditions
8 bits
9 bits
10 bits
11 bits
6 (10)
DA9138.005
12 April, 2006
APPLICATION INFORMATION
Synchronous modem with asynchronous interface
The MAS9138 is intended for applications where an asynchronous and synchronous data source must be linked
together. A typical case appears in a data modem where the terminal interface of the modem has been specified to
be asynchronous but the modem data pump operates in a synchronous fashion.
RS232C
MODEM CIRCUITS
MAS9138
INTERFACE
TXD
TDO
TDI
TXC
RDI
RXD
RDO
RXC
PHONE LINE
Synchronous serial interface with uP interface
Another application is a synchronous serial interface for uP which uses UART as a data source. The concept is
illustrated below.
M AS9138
UART
RS-232-C
V.24
T TL/V.28
TxD
RDI
RxD
TDO
RxC
uP-INTERFACE
TxC
7 (10)
DA9138.005
12 April, 2006
APPLICATION INFORMATION
Data multiplexer
A third application is a data multiplexing/demultiplexing system. The system accepts data from several sources.
These data lines are sampled and the samples are sent through a multiplexer to a demultiplexer. To accomplish this,
either a very high sample rate is needed or first convert the data to synchronous mode, where synchronous
multiplexing can be used and only one sample per data bit is needed.
M AS9138
CH 1
RDI
TDO
RDI
TDI
M AS9138
TDO
RDO
1
RDO
1
TDI
M AS9138
M AS9138
FORWARD
CH 2
2
CH N
N
MUX/
DEMUX
MUX/
DEMUX
BACKWARD
2
TIMING
N
Synchronous modem with asynchronous interface
The following application shows how to add an asynchronous interface to a synchronous modem with MAS9138. TSL
and XHST inputs (pins 1 and 12) are connected to VDD. If the crystal is removed and the external 16 x TXC clock
signal is used (dotted line) then tie the TSL input to ground. CL1, Cl2, XASY and XHST are user adjustable with
jumpers or dip switches.
+5v
Synchronous
Modem
RS232C
TTL/V28
TXD
TDI
78189A
16
9
4
470pF
14
TTL/V28
RXD
75189A
470pF
-12v
+12v
RDO
15
13
+5v
MAS9138
TSL
XHST
Ext. Signal Rate
Char. Length
Char. Length
ASY/SYN Select
mode
selection
jumpers
10
TDO
TTL-Level
TXC
TTL-Level
RDI
TTL-Level
RXC
TTL-Level
*)
2
1
TXC
RXC
16 x TXC
22pF
12
CR 1
7
9.8304MHz
5
3
6
11
8
22pF
Modem
Timing
Circuit
*) Optional timing from the
synchronous modem.
In this case CR 1 can be
eliminated.
MAS9138 simplified application:
V.28 interface for synchronous modem
8 (10)
DA9138.005
12 April, 2006
PACKAGE OUTLINES
16 LEAD PDIP OUTLINE (300 MIL BODY)
6.10
7.11
7.62
BSC
0.254
1.15
1.77
0.36
0.56
5.33
MAX
5.5
5-7°
2.93
4.95
1.52
18.93
21.33
SEATING
PLANE
2.54
BSC
0.63 TYPICAL
1 PIN
ALL MEASUREMENTS IN mm
All dimensions are in accordance with JEDEC standard MS-001.
16 LEAD SO OUTLINE (300 MIL BODY)
0-0.13
RAD.
2.36
2.64
.
0.86 TYP
SEATING
PLANE
10.10
10.50
PIN 1
7.40
7.60
10.00
10.65
5° TYP.
0.25 RAD.
MIN.
0.36
0.48
0.10
0.30
5° TYP.
5° TYP.
1.27
5° TYP. TYP.
5°TYP
0.94
1.12
0.33 x 45°
ALL MEASUREMENTS IN mm
All dimensions in accordance with JEDEC standard MS-013.
9 (10)
DA9138.005
12 April, 2006
ORDERING INFORMATION
Product Code
Product
Package
Comments
MAS9138N
PDIP16
25 pcs/tube
MAS9138ASB1
SO16
47 pcs/tube
MSB0091A Bake
recommendation for surface
mounted devices
MAS9138A1SD06
SO16 RoHS compliant
Tape&Reel in MBB, 1000 pcs
LOCAL DISTRIBUTOR
MICRO ANALOG SYSTEMS CONTACTS
Micro Analog Systems Oy
Kamreerintie 2, P.O. Box 51
FIN-02771 Espoo, FINLAND
Tel. +358 9 80 521
Fax +358 9 805 3213
http://www.mas-oy.com
NOTICE
Micro Analog Systems Oy reserves the right to make changes to the products contained in this data sheet in order to improve the design or
performance and to supply the best possible products. Micro Analog Systems Oy assumes no responsibility for the use of any circuits shown in this
data sheet, conveys no license under any patent or other rights unless otherwise specified in this data sheet, and makes no claim that circuits are
free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Micro Analog Systems Oy makes
no claim or warranty that such applications will be suitable for the use specified without further testing or modification.
10 (10)
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