Rohm BD9107FVM Synchronous buck converter integrated fet Datasheet

Synchronous Buck Converter
Integrated FET
BD9106FVM
BD9107FVM
BD9109FVM
BD9110NV
●General Description
ROHM’s high efficiency step-down switching regulators
(BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,B
D9120HFN) are the power supply designed to produce
a low voltage including 1 volts from 5/3.3 volts power
supply line. Offers high efficiency with our original pulse
skip control technology and synchronous rectifier.
Employs a current mode control system to provide
faster transient response to sudden change in load.
●Key Specifications
 Input voltage range
BD9120HFN:
BD9106FVM,BD9107FVM:
BD9109FVM,BD9110NV:
 Output voltage range
BD9109FVM:
BD9120HFN:
BD9107FVM:
BD9106FVM,BD9110NV:
 Output current
BD9106FVM, BD9109FVM,
BD9120HFN:
BD9107FVM:
BD9110NV:
 Switching frequency:
 FET ON resistance
●Features
 Offers fast transient response with current mode
PWM control system.
 Offers highly efficiency for all load range with
synchronous rectifier (Nch/Pch FET)
TM
and SLLM (Simple Light Load Mode)
Incorporates soft-start function.
 Incorporates thermal protection and ULVO
functions.
 Incorporates short-current protection circuit with
time delay function.
 Incorporates shutdown function
BD9110NV:
BD9106FVM,BD9107FVM:
BD9120HFN,BD9109FVM:
 Standby current:
 Operating temperature range
BD9110NV:
BD9120HFN,BD9106FVM:
BD9107FVM,BD9109FVM:
●Application
Power supply for LSI including DSP, Micro computer
and ASIC
●Packages
HSON8
MSOP8
SON008V5060
●Typical Application Circuit
VCC
Cin
2.7V to 4.5V
4.0V to 5.5V
4.5V to 5.5V
3.30V ± 2%
1.0V to 1.5V
1.0V to 1.8V
1.0V to 2.5V
0.8A(Max.)
1.2A(Max.)
2.0A(Max.)
1MHz(Typ.)
Pch(Typ.)
200mΩ
350mΩ
350mΩ
/ Nch(Typ.)
/ 150mΩ
/ 250mΩ
/ 250mΩ
0μA(Typ.)
-25℃ to +105℃
-25℃ to +85℃
-25℃ to +85℃
(Typ.)
(Typ.)
(Max.)
2.90mm x 3.00mm x 0.60mm
2.90mm x 4.00mm x 0.90mm
5.00mm x 6.00mm x 1.00mm
L
EN
VOUT
BD9120HFN
VCC,PVCC
VOUT
ITH
SW
VOUT
ESR
GND,PGND
RO
HSON8
CO
RITH
SON008V5060
CITH
MSOP8
Fig.1 Typical Application Circuit
○Product structure：Silicon monolithic integrated circuit ○This product is not designed protection against radioactive rays.
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TSZ22111･14･001
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TSZ02201-0J3J0AJ00090-1-2
02.MAR.2012 Rev.001
BD9106FVM
BD9107FVM
BD9109FVM
BD9110NV
Datasheet
BD9120HFN
●Pin Configurations
(Top View)
(Top View)
1
ADJ
VCC
8
1
VOUT
2
ITH
PVCC
7
2
3
EN
SW
6
4
GND
PGND
5
VCC
8
ITH
PVCC
7
3
EN
SW
6
4
GND
PGND
5
Fig.3 BD9109FVM
Fig.2 BD9106FVM, BD9107FVM
(Top View)
(Top View)
ADJ 1
8 EN
VCC 2
7 PVCC
ITH 3
6 SW
GND 4
1
ADJ
2
ITH
3
EN
4
GND
VCC
8
PVCC
7
SW
6
PGND
5
Fig.5 BD9120HFN
5 PGND
Fig.4 BD9110NV
●Pin Descriptions
【BD9106FVM, BD9107FVM, BD9109FVM】
Pin No.
Pin name
1
ADJ/VOUT
2
ITH
3
EN
4
GND
5
PGND
6
SW
7
PVCC
8
VCC
【BD9110NV】
Pin No.
Pin name
1
ADJ
2
VCC
3
ITH
4
GND
5
PGND
6
SW
7
PVCC
8
EN
【BD9120HFN】
Pin No.
Pin name
1
ADJ
2
ITH
3
EN
4
GND
5
PGND
6
SW
7
PVCC
8
VCC
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111･15･001
PIN function
Output voltage detect pin/ ADJ for BD9106･07FVM
GmAmp output pin/Connected phase compensation capacitor
Enable pin(Active High)
Ground
Nch FET source pin
Pch/Nch FET drain output pin
Pch FET source pin
VCC power supply input pin
PIN function
Output voltage adjust pin
VCC power supply input pin
GmAmp output pin/Connected phase compensation capacitor
Ground
Nch FET source pin
Pch/Nch FET drain output pin
Pch FET source pin
Enable pin(Active High)
PIN function
Output voltage adjust pin
GmAmp output pin/Connected phase compensation capacitor
Enable pin(Active High)
Ground
Nch FET source pin
Pch/Nch FET drain output pin
Pch FET source pin
VCC power supply input pin
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TSZ02201-0J3J0AJ00090-1-2
02.MAR.2012 Rev.001
BD9106FVM
BD9107FVM
BD9109FVM
BD9110NV
x
-
Datasheet
BD9120HFN
●Ordering Information
B
D
9
1
x
Part Number
x
x
x x
Package
NV:SON008V5060
HFN:HSON8
FVM:MSOP8
Packaging and forming specification
E2: Embossed tape and reel
TR: Embossed tape and reel
●Lineup
Operating
Temperature
Range
Adjustable
(1.0 to 2.5V)
Adjustable
(1.0 to 1.8V)
3.30±2%
Adjustable
(1.0 to 1.5V)
Adjustable
(1.0 to 2.5V)
4.0V to 5.5V
-25℃ to +85℃
4.5V to 5.5V
2.7V to 4.5V
-25℃ to +105℃
UVLO
Output
Threshold
Current
voltage
（Max.）
（Typ．）
Output
voltage
range
Input voltage
range
4.5V to 5.5V
Orderable
Part Number
Package
0.8A
3.4V
MSOP8
Reel of 3000
BD9106FVM-TR
1.2A
2.7V
MSOP8
Reel of 3000
BD9107FVM-TR
0.8A
3.8V
MSOP8
Reel of 3000
BD9109FVM-TR
0.8A
2.5V
HSON8
Reel of 3000
BD9120HFN-TR
2.0A
3.7V
SON00
8V5060
Reel of 2000
BD9110NV-E2
●Absolute Maximum Ratings (Ta=25℃)
Parameter
Symbol
VCC voltage
PVCC voltage
EN voltage
SW,ITH voltage
Power dissipation 1
Power dissipation 2
Operating temperature range
Storage temperature range
Maximum junction temperature
VCC
PVCC
EN
SW,ITH
Pd1
Pd2
Topr
Tstg
Tjmax
Limits
BD9110NV
*1
-0.3 to +7
*1
-0.3 to +7
-0.3 to +7
-0.3 to +7
*4
900
*5
3900
-25 to +105
-55 to +150
+150
BD910xFVM
*1
-0.3 to +7
*1
-0.3 to +7
-0.3 to +7
-0.3 to +7
*2
387.5
*3
587.4
-25 to +85
-55 to +150
+150
Unit
BD9120HFN
*1
-0.3 to +7
*1
-0.3 to +7
-0.3 to +7
-0.3 to +7
*6
1350
*7
1750
-25 to +85
-55 to +150
+150
V
V
V
V
mW
mW
℃
℃
℃
Pd should not be exceeded.
Derating in done 3.1mW/℃ for temperatures above Ta=25℃.
Derating in done 4.7mW/℃ for temperatures above Ta=25℃, Mounted on 70mm×70mm×1.6mm Glass Epoxy PCB.
Derating in done 7.2mW/℃ for temperatures above Ta=25℃, Mounted on 70mm×70mm×1.6mm Glass Epoxy PCB
which has 1 layer (3%) of copper on the back side).
*5 Derating in done 31.2mW/℃ for temperatures above Ta=25℃, Mounted on a board according to JESD51-7.
*6 Derating in done 10.8mW/℃ for temperatures above Ta=25℃, Mounted on 70mm×70mm×1.6mm Glass Epoxy PCB
which has 1 layer (7%) of copper on the back side).
*7 Derating in done 14mW/℃ for temperatures above Ta=25℃, Mounted on 70mm×70mm×1.6mm Glass Epoxy PCB
which has 1 layer (6.5%) of copper on the back side).
*1
*2
*3
*4
●Recommended Operating Ratings (Ta=25℃)
Parameter
VCC voltage
PVCC voltage
EN voltage
SW average output current
Symbol
*8
VCC
PVCC
*8
EN
Isw
*8
BD9106FVM
BD9107FVM
BD9109FVM
BD9110NV
BD9120HFN
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
4.0
5.5
4.0
5.5
4.5
5.5
4.5
5.5
2.7
4.5
V
4.0
5.5
4.0
5.5
4.5
5.5
4.5
5.5
2.7
4.5
V
0
VCC
0
VCC
0
VCC
0
VCC
0
VCC
V
-
0.8
-
1.2
-
0.8
-
2.0
-
0.8
A
Unit
*8 Pd should not be exceeded.
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TSZ22111･15･001
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TSZ02201-0J3J0AJ00090-1-2
02.MAR.2012 Rev.001
BD9106FVM
BD9107FVM
BD9109FVM
BD9110NV
Datasheet
BD9120HFN
●Electrical Characteristics
◎BD9106FVM (Ta=25℃, VCC=5V, EN=VCC, R1=20kΩ, R2=10kΩ unless otherwise specified.)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Standby current
ISTB
0
10
μA
Bias current
ICC
250
400
μA
EN Low voltage
VENL
GND
0.8
V
EN High voltage
VENH
2.0
VCC
V
EN input current
IEN
1
10
μA
Oscillation frequency
FOSC
0.8
1
1.2
MHz
*9
Pch FET ON resistance
RONP
0.35
0.60
Ω
*9
Nch FET ON resistance
RONN
0.25
0.50
Ω
ADJ Voltage
VADJ
0.780
0.800
0.820
V
*9
Output voltage
VOUT
1.200
V
ITH SInk current
ITHSI
10
20
μA
ITH Source Current
ITHSO
10
20
μA
UVLO threshold voltage
VUVLOTh
3.2
3.4
3.6
V
UVLO hysteresis voltage
VUVLOHys
50
100
200
mV
Soft start time
TSS
1.5
3
6
ms
Timer latch time
TLATCH
0.5
1
2
ms
Conditions
EN=GND
Standby mode
Active mode
VEN=5V
PVCC=5V
PVCC=5V
ADJ=H
ADJ=L
VCC=H→L
*9 Outgoing inspection is not done on all products
◎BD9107FVM (Ta=25℃, VCC=5V, EN=VCC, R1=20kΩ, R2=10kΩ unless otherwise specified.)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Standby current
ISTB
0
10
μA
Bias current
ICC
250
400
μA
EN Low voltage
VENL
GND
0.8
V
EN High voltage
VENH
2.0
VCC
V
EN input current
IEN
1
10
μA
Oscillation frequency
FOSC
0.8
1
1.2
MHz
*9
Pch FET ON resistance
RONP
0.35
0.60
Ω
*9
Nch FET ON resistance
RONN
0.25
0.50
Ω
ADJ Voltage
VADJ
0.780
0.800
0.820
V
*9
Output voltage
VOUT
1.200
V
ITH SInk current
ITHSI
10
20
μA
ITH Source Current
ITHSO
10
20
μA
UVLO threshold voltage
VUVLOTh
2.6
2.7
2.8
V
UVLO hysteresis voltage
VUVLOHys
150
300
600
mV
Soft start time
TSS
0.5
1
2
ms
Timer latch time
TLATCH
0.5
1
2
ms
Conditions
EN=GND
Standby mode
Active mode
VEN=5V
PVCC=5V
PVCC=5V
VOUT =H
VOUT =L
VCC=H→L
*9 Outgoing inspection is not done on all products
◎BD9109FVM (Ta=25℃, VCC=PVCC=5V, EN= VCC unless otherwise specified.)
Parameter
Symbol
Min.
Typ.
Max.
Standby current
ISTB
0
10
Bias current
ICC
250
400
EN Low voltage
VENL
GND
0.8
EN High voltage
VENH
2.0
VCC
EN input current
IEN
1
10
Oscillation frequency
FOSC
0.8
1
1.2
*9
Pch FET ON resistance
RONP
0.35
0.60
*9
Nch FET ON resistance
RONN
0.25
0.50
Output voltage
VOUT
3.234
3.300
3.366
ITH SInk current
ITHSI
10
20
ITH Source Current
ITHSO
10
20
UVLO threshold voltage
VUVLO1
3.6
3.8
4.0
UVLO hysteresis voltage
VUVLO2
3.65
3.9
4.2
Soft start time
TSS
0.5
1
2
Timer latch time
TLATCH
1
2
3
Output Short circuit
VSCP
2
2.7
Threshold Voltage
Unit
μA
μA
V
V
μA
MHz
Ω
Ω
V
μA
μA
V
V
ms
ms
V
Conditions
EN=GND
Standby mode
Active mode
VEN=5V
PVCC=5V
PVCC=5V
VOUT =H
VOUT =L
VCC=H→L
VCC=L→H
SCP/TSD operated
VOUT =H→L
*9 Outgoing inspection is not done on all products
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TSZ22111･15･001
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TSZ02201-0J3J0AJ00090-1-2
02.MAR.2012 Rev.001
BD9106FVM
BD9107FVM
BD9109FVM
BD9110NV
Datasheet
BD9120HFN
◎BD9110NV (Ta=25℃, VCC=PVCC=5V, EN=VCC, R1=10kΩ,R2=5kΩ unless otherwise specified.)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Standby current
ISTB
0
10
μA
Bias current
ICC
250
350
μA
EN Low voltage
VENL
GND
0.8
V
EN High voltage
VENH
2.0
VCC
V
EN input current
IEN
1
10
μA
Oscillation frequency
FOSC
0.8
1
1.2
MHz
*9
Pch FET ON resistance
RONP
200
320
mΩ
*9
Nch FET ON resistance
RONN
150
270
mΩ
ADJ Voltage
VADJ
0.780
0.800
0.820
V
*9
Output voltage
VOUT
1.200
V
ITH SInk current
ITHSI
10
20
μA
ITH Source Current
ITHSO
10
20
μA
UVLO threshold voltage
VUVLOTh
3.5
3.7
3.9
V
UVLO hysteresis voltage
VUVLOHys
50
100
200
mV
Soft start time
TSS
2.5
5
10
ms
Timer latch time
TLATCH
0.5
1
2
ms
Conditions
EN=GND
Standby mode
Active mode
VEN=5V
PVCC=5V
PVCC=5V
VOUT =H
VOUT =L
VCC=H→L
*9 Outgoing inspection is not done on all products
◎BD9120HFN (Ta=25℃, VCC=PVCC=3.3V, EN=VCC, R1=20kΩ, R2=10kΩ unless otherwise specified.)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Conditions
Standby current
ISTB
0
10
μA
EN=GND
Bias current
ICC
200
400
μA
EN Low voltage
VENL
GND
0.8
V
Standby mode
EN High voltage
VENH
2.0
VCC
V
Active mode
EN input current
IEN
1
10
μA
VEN=3.3V
Oscillation frequency
FOSC
0.8
1
1.2
MHz
*9
Pch FET ON resistance
RONP
0.35
0.60
Ω
PVCC=3.3V
*9
Nch FET ON resistance
RONN
0.25
0.50
Ω
PVCC=3.3V
ADJ Voltage
VADJ
0.780
0.800
0.820
V
*9
Output voltage
VOUT
1.200
V
ITH SInk current
ITHSI
10
20
μA
VOUT =H
ITH Source Current
ITHSO
10
20
μA
VOUT =L
UVLO threshold voltage
VUVLO1
2.400
2.500
2.600
V
VCC=H→L
UVLO hysteresis voltage
VUVLO2
2.425
2.550
2.700
V
VCC=L→H
Soft start time
TSS
0.5
1
2
ms
Timer latch time
TLATCH
1
2
3
ms
SCP/TSD operated
Output Short circuit
VSCP
VOUT×0.5 VOUT×0.7
V
VOUT =H→L
Threshold Voltage
*9 Outgoing inspection is not done on all products
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TSZ22111･15･001
5/40
TSZ02201-0J3J0AJ00090-1-2
02.MAR.2012 Rev.001
BD9106FVM
BD9107FVM
BD9109FVM
BD9110NV
BD9120HFN
Datasheet
●Block Diagram
【BD9106FVM, BD9107FVM】
Fig.6 BD9106FVM, BD9107FVM Block Diagram
【BD9109FVM】
Fig.7 BD9109FVM Block Diagram
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TSZ22111･15･001
6/40
TSZ02201-0J3J0AJ00090-1-2
02.MAR.2012 Rev.001
BD9106FVM
BD9107FVM
BD9109FVM
BD9110NV
BD9120HFN
Datasheet
【BD9110NV】
Fig.8 BD9110NV Block Diagram
【BD9120HFN】
Fig.9 BD9120HFN Block Diagram
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TSZ22111･15･001
7/40
TSZ02201-0J3J0AJ00090-1-2
02.MAR.2012 Rev.001
BD9106FVM
BD9107FVM
BD9109FVM
BD9110NV
BD9120HFN
Datasheet
●Typical Performance Curves
【BD9106FVM】
Fig.10 Vcc-Vout
Fig.11 Ven-Vout
Fig.13 Ta-Vout
Fig.12 Iout-Vout
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TSZ22111･15･001
8/40
TSZ02201-0J3J0AJ00090-1-2
02.MAR.2012 Rev.001
BD9106FVM
BD9107FVM
BD9109FVM
BD9110NV
Datasheet
Fig.15 Ta-Fosc
Fig.14 Efficiency
Fig.16 Ta-Ronn, Ronp
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111･15･001
BD9120HFN
Fig.17 Ta-Ven
9/40
TSZ02201-0J3J0AJ00090-1-2
02.MAR.2012 Rev.001
BD9106FVM
BD9107FVM
BD9109FVM
BD9110NV
Datasheet
Fig.19 Vcc-Fosc
Fig.18 Ta-Icc
Fig.21 SW waveform Io=10mA
Fig.20 Soft start waveform
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111･15･001
BD9120HFN
10/40
TSZ02201-0J3J0AJ00090-1-2
02.MAR.2012 Rev.001
BD9106FVM
BD9107FVM
BD9109FVM
BD9110NV
BD9120HFN
Datasheet
Fig. 23 Transient response
Io=100→600mA(10μs)
Fig.22 SW waveform Io=200mA
Fig.24 Transient response
Io=600→100mA(10μs)
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TSZ22111･15･001
11/40
TSZ02201-0J3J0AJ00090-1-2
02.MAR.2012 Rev.001
BD9106FVM
BD9107FVM
BD9109FVM
BD9110NV
BD9120HFN
Datasheet
【BD9107FVM】
Fig.25 Vcc-Vout
Fig.26 Ven-Vout
Fig.27 Iout-Vout
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111･15･001
Fig.28 Ta-Vout
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TSZ02201-0J3J0AJ00090-1-2
02.MAR.2012 Rev.001
BD9106FVM
BD9107FVM
BD9109FVM
BD9110NV
Datasheet
Fig.30 Ta-Fosc
Fig.29 Efficiency
Fig.32 Ta-VEN
Fig.31 Ta-RONN, RONP
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111･15･001
BD9120HFN
13/40
TSZ02201-0J3J0AJ00090-1-2
02.MAR.2012 Rev.001
BD9106FVM
BD9107FVM
BD9109FVM
BD9110NV
Fig.33 Ta-ICC
Datasheet
Fig.34 Vcc-Fosc
Fig.36 SW waveform Io=10mA
Fig.35 Soft start waveform
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111･15･001
BD9120HFN
14/40
TSZ02201-0J3J0AJ00090-1-2
02.MAR.2012 Rev.001
BD9106FVM
BD9107FVM
BD9109FVM
BD9110NV
BD9120HFN
Datasheet
Fig. 38 Transient response
Io=100→600mA(10μs)
Fig.37 SW waveform Io=500mA
Fig.39 Transient response
Io=600→100mA(10μs)
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TSZ22111･15･001
15/40
TSZ02201-0J3J0AJ00090-1-2
02.MAR.2012 Rev.001
BD9106FVM
BD9107FVM
BD9109FVM
BD9110NV
BD9120HFN
Datasheet
【BD9109FVM】
Fig.40 Vcc-Vout
Fig.41 Ven-Vout
Fig. 43 Ta-Vout
Fig.42 Iout-Vout
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TSZ22111･15･001
16/40
TSZ02201-0J3J0AJ00090-1-2
02.MAR.2012 Rev.001
BD9106FVM
BD9107FVM
BD9109FVM
BD9110NV
Datasheet
Fig.45 Ta-Fosc
Fig.44 Efficiency
Fig.46 Ta-Ronn, Ronp
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Fig.47 Ta-Ven
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BD9106FVM
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BD9109FVM
BD9110NV
Fig.48 Ta-Icc
Datasheet
Fig.49 Vcc-Fosc
Fig.50 Soft start waveform
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Fig.51 SW waveform Io=10mA
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BD9109FVM
BD9110NV
BD9120HFN
Datasheet
Fig. 53 Transient response
Io=100→600mA(10μs)
Fig.52 SW waveform Io=500mA
Fig.54 Transient response
Io=600→100mA(10μs)
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BD9106FVM
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BD9109FVM
BD9110NV
BD9120HFN
Datasheet
【BD9110NV】
Fig.55 Vcc-Vout
Fig.56 Ven-Vout
Fig.57 Iout-Vout
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Fig. 58 Ta-Vout
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BD9106FVM
BD9107FVM
BD9109FVM
BD9110NV
Datasheet
Fig.60 Ta-Fosc
Fig.59 Efficiency
Fig.62 Ta-Ven
Fig.61 Ta-Ronn, Ronp
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BD9109FVM
BD9110NV
Datasheet
Fig.64 Vcc-Fosc
Fig.63 Ta-Icc
Fig.65 Soft start waveform
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Fig.66 SW waveform Io=10mA
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BD9106FVM
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BD9110NV
Fig.67 SW waveform Io=500mA
BD9120HFN
Datasheet
Fig. 68 Transient response
Io=100→600mA(10μs)
Fig.69 Transient response
Io=600→100mA(10μs)
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BD9106FVM
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BD9109FVM
BD9110NV
BD9120HFN
Datasheet
【BD9120HFN】
Fig.70 Vcc-Vout
Fig.71 Ven-Vout
Fig.72 Iout-Vout
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Fig. 73 Ta-Vout
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Datasheet
Fig.75 Ta-Fosc
Fig.74 Efficiency
Fig.76 Ta-Ronn, Ronp
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Fig.77 Ta-Ven
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BD9106FVM
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BD9110NV
Fig.78 Ta-Icc
Datasheet
Fig.79 Vcc-Fosc
Fig.81 SW waveform Io=10mA
Fig.80 Soft start waveform
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BD9106FVM
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BD9109FVM
BD9110NV
BD9120HFN
Datasheet
Fig. 83 Transient response
Io=100→600mA(10μs)
Fig.82 SW waveform Io=200mA
Fig.84 Transient response
Io=600→100mA(10µs)
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BD9106FVM
BD9107FVM
BD9109FVM
BD9110NV
Datasheet
BD9120HFN
Application Information
●Operation
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN are a synchronous rectifying step-down switching
regulator that achieves faster transient response by employing current mode PWM control system. It utilizes
TM
switching operation in PWM (Pulse Width Modulation) mode for heavier load, while it utilizes SLLM (Simple Light
Load Mode) operation for lighter load to improve efficiency.
○Synchronous rectifier
It does not require the power to be dissipated by a rectifier externally connected to a conventional DC/DC converter IC,
and its P.N junction shoot-through protection circuit limits the shoot-through current during operation, by which the power
dissipation of the set is reduced.
○Current mode PWM control
Synthesizes a PWM control signal with a inductor current feedback loop added to the voltage feedback.
・PWM (Pulse Width Modulation) control
The oscillation frequency for PWM is 1 MHz. SET signal form OSC turns ON a P-channel MOS FET (while a
N-channel MOS FET is turned OFF), and an inductor current I L increases. The current comparator (Current Comp)
receives two signals, a current feedback control signal (SENSE: Voltage converted from I L) and a voltage feedback
control signal (FB), and issues a RESET signal if both input signals are identical to each other, and turns OFF the
P-channel MOS FET (while a N-channel MOS FET is turned ON) for the rest of the fixed period. The PWM control
repeat this operation.
TM
・SLLM (Simple Light Load Mode) control
When the control mode is shifted from PWM for heavier load to the one for lighter load or vise versa, the switching
pulse is designed to turn OFF with the device held operated in normal PWM control loop, which allows linear operation
without voltage drop or deterioration in transient response during the mode switching from light load to heavy load or
vise versa.
Although the PWM control loop continues to operate with a SET signal from OSC and a RESET signal from Current
Comp, it is so designed that the RESET signal is held issued if shifted to the light load mode, with which the switching
is tuned OFF and the switching pulses are thinned out under control. Activating the switching intermittently reduces
the switching dissipation and improves the efficiency.
SENSE
Current
Comp
VOUT
RESET
Level
Shift
FB
R Q
SET
Gm Amp.
ITH
IL
S
Driver
Logic
VOUT
SW
Load
OSC
Fig.85 Diagram of current mode PWM control
PVCC
Current
Comp
SENSE
PVCC
SENSE
Current
Comp
FB
FB
SET
GND
SET
GND
RESET
GND
RESET
GND
SW
GND
SW
IL
GND
IL(AVE)
IL
0A
VOUT
VOUT
VOUT(AVE)
VOUT(AVE)
Not switching
Fig.86 PWM switching timing chart
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Fig.87 SLLM switching timing chart
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BD9106FVM
BD9107FVM
BD9109FVM
BD9110NV
Datasheet
BD9120HFN
●Description of Operations
・Soft-start function
EN terminal shifted to “High” activates a soft-starter to gradually establish the output voltage with the current limited
during startup, by which it is possible to prevent an overshoot of output voltage and an inrush current.
・Shutdown function
With EN terminal shifted to “Low”, the device turns to Standby Mode, and all the function blocks including reference
voltage circuit, internal oscillator and drivers are turned to OFF. Circuit current during standby is 0 μA (Typ.).
・UVLO function
Detects whether the input voltage sufficient to secure the output voltage of this IC is supplied. And the hysteresis width of
50 to 300 mV (Typ.) is provided to prevent output chattering.
Hysteresis 50 to 300mV
VCC
EN
VOUT
Tss
Tss
Tss
Soft start
Standby mode
Operating mode
Standby
mode
Standby
mode
Operating mode
UVLO
UVLO
Operating mode
EN
Standby mode
UVLO
*Soft Start time(typ.)
Fig.88 Soft start, Shutdown, UVLO timing chart
BD9106FVM
3
Tss
BD9107FVM
1
BD9109FVM
1
BD9110NV
5
BD9120HFN
1
Unit
msec
・Short-current protection circuit with time delay function
Turns OFF the output to protect the IC from breakdown when the incorporated current limiter is activated continuously for the
fixed time(TLATCH) or more. The output thus held tuned OFF may be recovered by restarting EN or by re-unlocking UVLO.
EN
Output OFF
latch
VOUT
Limit
IL
1msec
Standby
mode
*Timer Latch time (typ.)
Standby
mode
Operating mode
Timer latch
EN
Operating mode
EN
Fig.89 Short-current protection circuit with time delay timing chart
TLATCH
BD9106FVM
1
BD9107FVM
1
BD9109FVM
2
BD9110NV
1
BD9120HFN
2
Unit
msec
※ In addition to current limit circuit, output short detect circuit is built in on BD9109FVM and BD9120HFN. If output voltage fall below
2V(typ, BD9109FVM) or Vout×0.5(typ,BD9120HFN), output voltage will hold turned OFF.
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BD9106FVM
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BD9109FVM
BD9110NV
Datasheet
BD9120HFN
●Information on Advantages
Advantage 1：Offers fast transient response with current mode control system.
Conventional product (VOUT of which is 3.3 volts)
BD9109FVM (Load response IO=100mA→600mA)
VOUT
VOUT
228mV
IOUT
IOUT
Voltage drop due to sudden change in load was reduced by about 40%.
Fig.90 Comparison of transient response
Advantage 2： Offers high efficiency for all load range.
・For lighter load:
TM
Utilizes the current mode control mode called SLLM
for lighter load, which reduces various dissipation such as
switching dissipation (PSW ), gate charge/discharge dissipation, ESR dissipation of output capacitor (PESR) and
on-resistance dissipation (PRON) that may otherwise cause degradation in efficiency for lighter load.
Achieves efficiency improvement for lighter load.
100
Efficiency η[%]
SLLMTM
・For heavier load:
Utilizes the synchronous rectifying mode and the low on-resistance
MOS FETs incorporated as power transistor.
ON resistance of P-channel MOS FET: 0.2 to 0.35 Ω (Typ.)
ON resistance of N-channel MOS FET: 0.15 to 0.25 Ω (Typ.)
②
50
①
PWM
①inprovement by SLLM system
②improvement by synchronous rectifier
0
0.001
0.01
0.1
Output current Io[A]
1
Fig.91 Efficiency
Achieves efficiency improvement for heavier load.
Offers high efficiency for all load range with the improvements mentioned above.
Advantage 3：・Supplied in smaller package due to small-sized power MOS FET incorporated.
(3 package like MOSP8, HSON8, SON008V5060)
・Allows reduction in size of application products
・Output capacitor Co required for current mode control: 10 μF ceramic capacitor
・Inductance L required for the operating frequency of 1 MHz: 4.7 μH inductor
(BD9110NV:Co=22µF, L=2.2µH)
Reduces a mounting area required.
VCC
15mm
Cin
CIN
DC/DC
Convertor
Controller
RITH
RITH
L
VOUT
L
10mm
CITH
Co
CO
CITH
Fig.92 Example application
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BD9106FVM
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BD9109FVM
BD9110NV
Datasheet
BD9120HFN
●Switching Regulator Efficency
Efficiency ŋ may be expressed by the equation shown below:
VOUT×IOUT
η=
POUT
×100[%]=
POUT
×100[%]=
×100[%]
Vin×Iin
Pin
POUT+PDα
Efficiency may be improved by reducing the switching regulator power dissipation factors P Dα as follows:
Dissipation factors:
2
1) ON resistance dissipation of inductor and FET：PD(I R)
2) Gate charge/discharge dissipation：PD(Gate)
3) Switching dissipation：PD(SW)
4) ESR dissipation of capacitor：PD(ESR)
5) Operating current dissipation of IC：PD(IC)
2
2
1)PD(I R)=IOUT ×(RCOIL+RON) (RCOIL[Ω]：DC resistance of inductor, RON[Ω]：ON resistance of FETIOUT[A]：Output current.)
2
2)PD(Gate)=Cgs×f×V (Cgs[F]：Gate capacitance of FET,f[H]：Switching frequency,V[V]：Gate driving voltage of FET)
2
3)PD(SW)=
Vin ×CRSS×IOUT×f
IDRIVE
(CRSS[F]：Reverse transfer capacitance of FET、IDRIVE[A]：Peak current of gate.)
2
4)PD(ESR)=IRMS ×ESR (IRMS[A]：Ripple current of capacitor,ESR[Ω]：Equivalent series resistance.)
5)PD(IC)=Vin×ICC (ICC[A]：Circuit current.)
●Consideration on Permissible Dissipation and Heat Generation
As this IC functions with high efficiency without significant heat generation in most applications, no special consideration is
needed on permissible dissipation or heat generation. In case of extreme conditions, however, including lower input
voltage, higher output voltage, heavier load, and/or higher temperature, the permissible dissipation and/or heat generation
must be carefully considered.
For dissipation, only conduction losses due to DC resistance of inductor and ON resistance of FET are considered.
Because the conduction losses are considered to play the leading role among other dissipation mentioned above including
gate charge/discharge dissipation and switching dissipation.
400
①587.4mW
②387.5mW
1.5
① mounted on glass epoxy PCB
θj-a=133.0℃/W
② Using an IC alone
θj-a=195.3℃/W
①1.15W
Power dissipation:Pd [W]
800
600
1.5
①mounted on glass epoxy PCB
θj-a=212.8℃/W
②Using an IC alone
θj-a=322.6℃/W
Power dissipation:Pd [W]
Power dissipation:Pd [mW]
1000
1.0
②0.63W
0.5
① for SON008V5060
ROHM standard 1layer board
θj-a=138.9℃/W
② Using an IC alone
θj-a=195.3℃/W
①0.90W
1.0
②0.64W
0.5
200
0
0
0
25
50
75 85 100
125
Ambient temperature:Ta [℃]
Fig.93 Thermal derating curve
(MSOP8)
150
0
0
25
50
75 85 100
125
150
Ambient temperature:Ta [℃]
2
P=0.8 ×(0.15+0.316)
≒298[mV]
25
50
75
100105 125
150
Ambient temperature:Ta [℃]
Fig.94 Thermal derating curve
(HSON8)
If VCC=5V, VOUT=3.3V, RCOIL=0.15Ω, RONP=0.35Ω, RONN=0.25Ω
IOUT=0.8A, for example,
D=VOUT/VCC=3.3/5=0.66
RON=0.66×0.35+(1-0.66)×0.25
=0.231+0.085
=0.316[Ω]
0
Fig.95 Thermal derating curve
(SON008V5060)
2
P=IOUT ×(RCOIL+RON)
RON=D×RONP+(1-D)×RONN
D：ON duty (=VOUT/VCC)
RCOIL：DC resistance of coil
RONP：ON resistance of P-channel MOS FET
RONN：ON resistance of N-channel MOS FET
IOUT：Output current
As RONP is greater than RONN in this IC, the dissipation increases as the ON duty becomes greater. With the
consideration on the dissipation as above, thermal design must be carried out with sufficient margin allowed.
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BD9109FVM
BD9110NV
Datasheet
BD9120HFN
●Selection of Components Externally Connected
1. Selection of inductor (L)
IL
ΔIL
The inductance significantly depends on output ripple current.
As seen in the equation (1), the ripple current decreases as the
inductor and/or switching frequency increases.
ΔIL=
VCC
(VCC-VOUT)×VOUT
[A]・・・(1)
L×VCC×f
Appropriate ripple current at output should be 30% more or less of
the maximum output current.
IL
VOUT
ΔIL=0.3×IOUTmax. [A]・・・(2)
L
(VCC-VOUT)×VOUT
L=
Co
ΔIL×VCC×f
[H]・・・(3)
(ΔIL: Output ripple current, and f: Switching frequency)
Fig.96 Output ripple current
* Current exceeding the current rating of the inductor results in magnetic saturation of the inductor, which decreases efficiency.
The inductor must be selected allowing sufficient margin with which the peak current may not exceed its current rating.
If VCC=5V, VOUT=3.3V, f=1MHz, ΔIL=0.3×0.8A=0.24A, for example,(BD9109FVM)
(5-3.3)×3.3
L=
=4.675μ → 4.7[μH]
0.24×5×1M
* Select the inductor of low resistance component (such as DCR and ACR) to minimize dissipation in the inductor for
better efficiency.
2. Selection of output capacitor (CO)
VCC
Output capacitor should be selected with the consideration on the stability
region and the equivalent series resistance required to smooth ripple voltage.
Output ripple voltage is determined by the equation (4)：
VOUT
L
ESR
Co
ΔVOUT=ΔIL×ESR [V]・・・(4)
(ΔIL: Output ripple current, ESR: Equivalent series resistance of output capacitor)
*Rating of the capacitor should be determined allowing sufficient margin
against output voltage. Less ESR allows reduction in output ripple voltage.
Fig.97 Output capacitor
As the output rise time must be designed to fall within the soft-start time, the capacitance of output capacitor should be
determined with consideration on the requirements of equation (5):
Tss: Soft-start time
TSS×(Ilimit-IOUT)
Co≦
・・・(5)
Ilimit: Over current detection level, 2A(Typ)
VOUT
In case of BD9109FVM, for instance, and if VOUT=3.3V, IOUT=0.8A, and TSS=1ms,
1m×(2-0.8)
Co≦
≒364 [μF]
3.3
Inappropriate capacitance may cause problem in startup. A 10 μF to 100 μF ceramic capacitor is recommended.
3. Selection of input capacitor (Cin)
Input capacitor to select must be a low ESR capacitor of the capacitance
sufficient to cope with high ripple current to prevent high transient voltage. The
VCC
Cin
ripple current IRMS is given by the equation (6):
√VOUT(VCC-VOUT)
IRMS=IOUT×
[A]・・・(6)
VOUT
VCC
L
Co
< Worst case > IRMS(max.)
IOUT
When VCC is twice the Vout,
2
IRMS=
If VCC=5V, VOUT=3.3V, and IOUTmax.=0.8A, (BD9109FVM)
Fig.98 Input capacitor
√3.3(5-3.3)
IRMS=0.8×
=0.38[ARMS]
5
A low ESR 10μF/10V ceramic capacitor is recommended to reduce ESR dissipation of input capacitor for better efficiency.
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BD9107FVM
BD9109FVM
BD9110NV
Datasheet
BD9120HFN
4. Determination of RITH, CITH that works as a phase compensator
As the Current Mode Control is designed to limit a inductor current, a pole (phase lag) appears in the low frequency area
due to a CR filter consisting of a output capacitor and a load resistance, while a zero (phase lead) appears in the high
frequency area due to the output capacitor and its ESR. So, the phases are easily compensated by adding a zero to the
power amplifier output with C and R as described below to cancel a pole at the power amplifier.
fp(Min.)
A
Gain
[dB]
1
2π×RO×CO
1
fz(ESR)=
2π×ESR×CO
fp=
fp(Max.)
0
fz(ESR)
IOUTMin.
IOUTMax.
Pole at power amplifier
When the output current decreases, the load resistance Ro
increases and the pole frequency lowers.
0
Phase
[deg]
-90
fp(Min.)=
1
2π×ROMax.×CO
[Hz]←with lighter load
fp(Max.)=
1
2π×ROMin.×CO
[Hz]←with heavier load
Fig.99 Open loop gain characteristics
A
fz(Amp.)
Zero at power amplifier
Increasing capacitance of the output capacitor lowers the
pole frequency while the zero frequency does not change.
(This is because when the capacitance is doubled, the
capacitor ESR reduces to half.)
Gain
[dB]
0
0
Phase
[deg]
-90
fz(Amp.)=
1
2π×RITH.×CITH
Fig.100 Error amp phase compensation characteristics
VCC
Cin
EN
VOUT
L
VCC,PVCC
SW
VOUT
ITH
VOUT
ESR
GND,PGND
RO
CO
RITH
CITH
Fig.101 Typical application
Stable feedback loop may be achieved by canceling the pole fp (Min.) produced by the output capacitor and the load
resistance with CR zero correction by the error amplifier.
fz(Amp.)= fp(Min.)
1
2π×RITH×CITH
=
1
2π×ROMax.×CO
5. Determination of output voltage
The output voltage VOUT is determined by the equation (7):
VOUT=(R2/R1+1)×VADJ・・・(7) VADJ: Voltage at ADJ terminal (0.8V Typ.)
With R1 and R2 adjusted, the output voltage may be determined as required.
Adjustable output voltage range： 1.0V to 1.5V/ BD9107FVM, BD9120HFN
1.0V to 2.5V/BD106FVM, BD9110NV
Use 1 kΩ to 100 kΩ resistor for R1. If a resistor of the resistance higher than
100 kΩ is used, check the assembled set carefully for ripple voltage etc.
L
Output
SW
ADJ
Co
R2
R1
Fig.102 Determination of output voltage
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BD9106FVM
BD9107FVM
BD9109FVM
BD9110NV
Datasheet
BD9120HFN
●Cautions on PC Board layout
BD9106FVM, BD9107FVM, BD9109FVM, BD9120HFN
1
VOUT/ADJ
2
ITH
VCC
8
PVCC
7
VCC
RITH
CIN
EN
3
EN
4
GND
SW
6
PGND
5
①
L
VOUT
CITH
CO
GND
②
③
Fig.103 Layout diagram
BD9110NV
Cautions on PC Board layout
VCC
R2
1
2
R1
3
RITH
③
CITH
EN 8
ADJ
VCC
PVCC
ITH
SW
7
GND
PGND
①
L
6
5
4
EN
VOUT
CIN
②
Co
GND
Fig.104 Layout diagram
① For the sections drawn with heavy line, use thick conductor pattern as short as possible.
② Lay out the input ceramic capacitor CIN closer to the pins PVCC and PGND, and the output capacitor Co closer to
the pin PGND.
③ Lay out CITH and RITH between the pins ITH and GND as neat as possible with least necessary wiring.
※ The package of HSON8 (BD9120HFN) and SON008V5050 (BD9110NV) has thermal FIN on the reverse of the package.
The package thermal performance may be enhanced by bonding the FIN to GND plane which take a large area of PCB.
●Recommended components Lists on above application
Table1. [BD9106FVM]
Symbol
Part
Value
Manufacturer
Series
Sumida
CMD6D11B
TDK
VLF5014AT-4R7M1R1
Coil
4.7μH
CIN
Ceramic capacitor
10μF
Kyocera
CM316X5R106K10A
CO
Ceramic capacitor
10μF
Kyocera
CM316X5R106K10A
CITH
Ceramic capacitor
750pF
murata
GRM18series
L
RITH
Resistance
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MCR10 1802
VOUT=1.2V
22kΩ
ROHM
MCR10 2202
VOUT=1.5V
22kΩ
ROHM
MCR10 2202
VOUT=1.8V
27kΩ
ROHM
MCR10 2702
VOUT=2.5V
36kΩ
ROHM
MCR10 3602
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BD9106FVM
BD9107FVM
Table2. [BD9107FVM]
Symbol
Part
BD9109FVM
Value
CMD6D11B
10μF
Kyocera
CM316X5R106K10A
10μF
Kyocera
CM316X5R106K10A
1000pF
murata
GRM18series
Ceramic capacitor
CO
Ceramic capacitor
CITH
Ceramic capacitor
Table3. [BD9109VM]
Symbol
Part
VOUT=1.0V
4.3kΩ
ROHM
MCR10 4301
VOUT=1.2V
6.8kΩ
ROHM
MCR10 6801
VOUT=1.5V
9.1kΩ
ROHM
MCR10 9101
VOUT=1.8V
12kΩ
ROHM
MCR10 1202
Manufacturer
Series
Value
Sumida
CMD6D11B
TDK
VLF5014AT-4R7M1R1
10μF
Kyocera
CM316X5R106K10A
10μF
Kyocera
CM316X5R106K10A
330pF
murata
GRM18series
30kΩ
ROHM
MCR10 3002
Coil
4.7μH
CIN
Ceramic capacitor
CO
Ceramic capacitor
CITH
Ceramic capacitor
RITH
Resistance
L
Table4. [BD9110NV]
Symbol
Series
VLF5014AT-4R7M1R1
CIN
Resistance
Manufacturer
TDK
4.7μH
RITH
Datasheet
BD9120HFN
Sumida
Coil
L
BD9110NV
Part
Value
Manufacturer
Series
L
Coil
2.2μH
TDK
LTF5022T-2R2N3R2
CIN
Ceramic capacitor
10μF
Kyocera
CM316X5R106K10A
CO
Ceramic capacitor
22μF
Kyocera
CM316B226K06A
CITH
Ceramic capacitor
1000pF
murata
GRM18series
ROHM
MCR10 1202
VOUT=1.0V
VOUT=1.2V
RITH
Resistance
VOUT=1.5V
12kΩ
VOUT=1.8V
VOUT=2.5V
Table5. [BD9120HFN]
Symbol
Part
Value
Manufacturer
Series
Sumida
CMD6D11B
TDK
VLF5014AT-4R7M1R1
L
Coil
4.7μH
CIN
Ceramic capacitor
10μF
Kyocera
CM316X5R106K10A
CO
Ceramic capacitor
10μF
Kyocera
CM316X5R106K10A
CITH
Ceramic capacitor
680pF
murata
GRM18series
RITH
Resistance
VOUT=1.0V
8.2kΩ
ROHM
MCR10 8201
VOUT=1.2V
8.2kΩ
ROHM
MCR10 8201
VOUT=1.5V
4.7kΩ
ROHM
MCR10 4701
*The parts list presented above is an example of recommended parts. Although the parts are sound, actual circuit characteristics should be checked on
your application carefully before use. Be sure to allow sufficient margins to accommodate variations between external devices and this IC when employing
the depicted circuit with other circuit constants modified. Both static and transient characteristics should be considered in establishing these margins. When
switching noise is substantial and may impact the system, a low pass filter should be inserted between the VCC and PVCC pins, and a schottky barrier diode
established between the SW and PGND pins.
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BD9106FVM
BD9107FVM
BD9109FVM
BD9110NV
Datasheet
BD9120HFN
●I/O Equivalence Circuit
【BD9106FVM, BD9107FVM, BD9109FVM】
・EN pin
PVCC
・SW pin
VCC
10kΩ
PVCC
PVCC
SW
EN
・VOUT pin (BD9109FVM)
・ADJ pin (BD9106FVM, BD9107FVM)
VCC
VCC
10kΩ
10kΩ
VOUT
ADJ
・ITH pin
VCC
VCC
ITH
【BD9110NV, BD9120HFN】
・EN pin
EN
・SW pin
PVCC
PVCC
PVCC
10kΩ
SW
・ITH pin (BD9120HFN)
・ITH pin (BD9110NV)
VCC
VCC
ITH
ITH
10kΩ
ADJ
Fig.105 I/O equivalence circuit
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BD9106FVM
BD9107FVM
BD9109FVM
BD9110NV
BD9120HFN
Datasheet
●Operational Notes
1. Absolute Maximum Ratings
While utmost care is taken to quality control of this product, any application that may exceed some of the absolute
maximum ratings including the voltage applied and the operating temperature range may result in breakage. If broken,
short-mode or open-mode may not be identified. So if it is expected to encounter with special mode that may exceed
the absolute maximum ratings, it is requested to take necessary safety measures physically including insertion of fuses.
2. Electrical potential at GND
GND must be designed to have the lowest electrical potential In any operating conditions.
3. Short-circuiting between terminals, and mismounting
When mounting to pc board, care must be taken to avoid mistake in its orientation and alignment. Failure to do so may
result in IC breakdown. Short-circuiting due to foreign matters entered between output terminals, or between output and
power supply or GND may also cause breakdown.
4.Operation in Strong electromagnetic field}
Be noted that using the IC in the strong electromagnetic radiation can cause operation failures.
5. Thermal shutdown protection circuit
Thermal shutdown protection circuit is the circuit designed to isolate the IC from thermal runaway, and not intended to
protect and guarantee the IC. So, the IC the thermal shutdown protection circuit of which is once activated should not
be used thereafter for any operation originally intended.
6. Inspection with the IC set to a pc board
If a capacitor must be connected to the pin of lower impedance during inspection with the IC set to a pc board, the
capacitor must be discharged after each process to avoid stress to the IC. For electrostatic protection, provide proper
grounding to assembling processes with special care taken in handling and storage. When connecting to jigs in the
inspection process, be sure to turn OFF the power supply before it is connected and removed.
7. Input to IC terminals
+
This is a monolithic IC with P isolation between P-substrate and each element as illustrated below. This P-layer and
the N-layer of each element form a P-N junction, and various parasitic element are formed.
If a resistor is joined to a transistor terminal as shown in Fig 106:
○P-N junction works as a parasitic diode if the following relationship is satisfied; GND>Terminal A (at resistor side), or
GND>Terminal B (at transistor side); and
○if GND>Terminal B (at NPN transistor side),
a parasitic NPN transistor is activated by N-layer of other element adjacent to the above-mentioned parasitic diode.
The structure of the IC inevitably forms parasitic elements, the activation of which may cause interference among circuits,
and/or malfunctions contributing to breakdown. It is therefore requested to take care not to use the device in such
manner that the voltage lower than GND (at P-substrate) may be applied to the input terminal, which may result in
activation of parasitic elements.
Fig.106 Simplified structure of monorisic IC
8. Ground wiring pattern
If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND
pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that
resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the
small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well.
Status of this document
The Japanese version of this document is formal specification. A customer may use this translation version only for a reference
to help reading the formal version.
If there are any differences in translation version of this document formal version takes priority.
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BD9106FVM
BD9107FVM
BD9109FVM
BD9110NV
BD9120HFN
Datasheet
●Physical Dimensions Tape and Reel information
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BD9106FVM
BD9107FVM
BD9109FVM
BD9110NV
BD9120HFN
Datasheet
●Marking Diagrams
BD9106FVM
MSOP8(TOP VIEW)
BD9107FVM
MSOP8(TOP VIEW)
Part Number Marking
Part Number Marking
D 9 1
0
6
D 9 1
LOT Number
0
7
1PIN MARK
1PIN MARK
BD9109FVM
MSOP8(TOP VIEW)
BD9110NV
SON008V5060 (TOP VIEW)
Part Number Marking
Part Number Marking
D 9 1
0
9
LOT Number
B D 9 11 0
LOT Number
LOT Number
1PIN MARK
1PIN MARK
BD9120HFN
HSON8 (TOP VIEW)
Part Number Marking
D 9 1
LOT Number
2 0
1PIN MARK
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TSZ22111･15･001
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02.MAR.2012 Rev.001
BD9106FVM
BD9107FVM
BD9109FVM
BD9110NV
BD9120HFN
Datasheet
●Revision History
Date
Revision
17.Jan.2012
001
Changes
New Release
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Datasheet
Notice
●Precaution for circuit design
1) The products are designed and produced for application in ordinary electronic equipment (AV equipment, OA
equipment, telecommunication equipment, home appliances, amusement equipment, etc.). If the products are to be
used in devices requiring extremely high reliability (medical equipment, transport equipment, aircraft/spacecraft,
nuclear power controllers, fuel controllers, car equipment including car accessories, safety devices, etc.) and whose
malfunction or operational error may endanger human life and sufficient fail-safe measures, please consult with the
ROHM sales staff in advance. If product malfunctions may result in serious damage, including that to human life,
sufficient fail-safe measures must be taken, including the following:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits in the case of single-circuit failure
2)
The products are designed for use in a standard environment and not in any special environments. Application of the
products in a special environment can deteriorate product performance. Accordingly, verification and confirmation of
product performance, prior to use, is recommended if used under the following conditions:
[a] Use in various types of liquid, including water, oils, chemicals, and organic solvents
[b] Use outdoors where the products are exposed to direct sunlight, or in dusty places
[c] Use in places where the products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2,
and NO2
[d] Use in places where the products are exposed to static electricity or electromagnetic waves
[e] Use in proximity to heat-producing components, plastic cords, or other flammable items
[f] Use involving sealing or coating the products with resin or other coating materials
[g] Use involving unclean solder or use of water or water-soluble cleaning agents for cleaning after soldering
[h] Use of the products in places subject to dew condensation
3)
The products are not radiation resistant.
4)
Verification and confirmation of performance characteristics of products, after on-board mounting, is advised.
5)
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse) is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
6)
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta).
When used in sealed area, confirm the actual ambient temperature.
7)
Confirm that operation temperature is within the specified range described in product specification.
8)
Failure induced under deviant condition from what defined in the product specification cannot be guaranteed.
●Precaution for Mounting / Circuit board design
1) When a highly active halogenous (chlorine, bromine, etc.) flux is used, the remainder of flux may negatively affect
product performance and reliability.
2)
In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the
Company in advance.
Regarding Precaution for Mounting / Circuit board design, please specially refer to ROHM Mounting specification
●Precautions Regarding Application Examples and External Circuits
1) If change is made to the constant of an external circuit, allow a sufficient margin due to variations of the characteristics
of the products and external components, including transient characteristics, as well as static characteristics.
2)
The application examples, their constants, and other types of information contained herein are applicable only when
the products are used in accordance with standard methods. Therefore, if mass production is intended, sufficient
consideration to external conditions must be made.
Notice - Rev.001
Datasheet
●Precaution for Electrostatic
This product is Electrostatic sensitive product, which may be damaged due to Electrostatic discharge. Please take proper
caution during manufacturing and storing so that voltage exceeding Product maximum rating won't be applied to products.
Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron, isolation from
charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
●Precaution for Storage / Transportation
1) Product performance and soldered connections may deteriorate if the products are stored in the following places:
[a] Where the products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] Where the temperature or humidity exceeds those recommended by the Company
[c] Storage in direct sunshine or condensation
[d] Storage in high Electrostatic
2)
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using products of which storage time is
exceeding recommended storage time period .
3)
Store / transport cartons in the correct direction, which is indicated on a carton as a symbol. Otherwise bent leads may
occur due to excessive stress applied when dropping of a carton.
4)
Use products within the specified time after opening a dry bag.
●Precaution for product label
QR code printed on ROHM product label is only for internal use, and please do not use at customer site. It might contain a
internal part number that is inconsistent with an product part number.
●Precaution for disposition
When disposing products please dispose them properly with a industry waste company.
●Precaution for Foreign exchange and Foreign trade act
Since concerned goods might be fallen under controlled goods prescribed by Foreign exchange and Foreign trade act,
please consult with ROHM in case of export.
●Prohibitions Regarding Industrial Property
1) Information and data on products, including application examples, contained in these specifications are simply for
reference; the Company does not guarantee any industrial property rights, intellectual property rights, or any other
rights of a third party regarding this information or data. Accordingly, the Company does not bear any responsibility for:
[a] infringement of the intellectual property rights of a third party
[b] any problems incurred by the use of the products listed herein.
2)
The Company prohibits the purchaser of its products to exercise or use the intellectual property rights, industrial
property rights, or any other rights that either belong to or are controlled by the Company, other than the right to use,
sell, or dispose of the products.
Notice - Rev.001