NCP502, NCP502A 80 mA CMOS Low Iq, Low− Dropout Voltage Regulator The NCP502/A series of fixed output linear regulators are designed for handheld communication equipment and portable battery powered applications which require low quiescent. The NCP502/A series features an ultra−low quiescent current of 40 A. Each device contains a voltage reference unit, an error amplifier, a PMOS power transistor, resistors for setting output voltage, current limit, and temperature limit protection circuits. The NCP502/A has been designed to be used with low cost ceramic capacitors. The device is housed in the micro−miniature SC70−5 and TSOP−5 surface mount packages. Standard voltage versions are 1.5 V, 1.8 V, 2.5 V, 2.7 V, 2.8 V, 2.9 V, 3.0 V, 3.1 V, 3.3 V, 3.4 V, 3.5 V, 3.6 V, 3.7 V and 5.0 V. Other voltages are available in 100 mV steps. http://onsemi.com MARKING DIAGRAM 4 12 Features • • • • • • • • Pb−Free Packages are Available Low Quiescent Current of 40 A Typical Excellent Line and Load Regulation Low Output Voltage Option Output Voltage Accuracy of 2.0% Industrial Temperature Range of −40°C to 85°C NCP502: 1.3 V Enable Threshold High, 0.3 V Enable Threshold Low NCP502A: 1.0 V Enable Threshold High, 0.4 V Enable Threshold Low 5 1 5 SC70−5 SQ SUFFIX CASE 419A 5 3 xxx MG G 1 TSOP−5 (SOT23−5, SC59−5) SN SUFFIX CASE 483 5 xxx AYWG G 1 xxx = Specific Device Code A = Assembly Location Y = Year W = Work Week M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) Typical Applications • • • • Cellular Phones Battery Powered Consumer Products Hand−Held Instruments Camcorders and Cameras PIN CONNECTIONS Vin 1 GND 2 Enable 3 5 Vout 4 N/C (Top View) Battery or Unregulated Voltage Vout C1 + 1 5 + 2 ON 3 C2 ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. 4 OFF This device contains 86 active transistors Figure 1. Typical Application Diagram © Semiconductor Components Industries, LLC, 2007 February, 2007 − Rev. 12 1 Publication Order Number: NCP502/D NCP502, NCP502A ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ PIN FUNCTION DESCRIPTION Pin No. Pin Name 1 Vin Description 2 GND 3 Enable 4 N/C No internal connection. 5 Vout Regulated output voltage. Positive power supply input voltage. Power supply ground. This input is used to place the device into low−power standby. When this input is pulled low, the device is disabled. If this function is not used, Enable should be connected to Vin. MAXIMUM RATINGS ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ Rating Symbol Value Unit Vin 12 V Enable Voltage Enable −0.3 to Vin +0.3 V Output Voltage Vout −0.3 to Vin +0.3 V Power Dissipation and Thermal Characteristics Power Dissipation Thermal Resistance, Junction−to−Ambient PD RJA Internally Limited 400 W °C/W Operating Junction Temperature TJ +125 °C Operating Ambient Temperature TA −40 to +85 °C Storage Temperature Tstg −55 to +150 °C Input Voltage Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. This device series contains ESD protection and exceeds the following tests: Human Body Model 2000 V per MIL−STD−883, Method 3015. Machine Model Method 200 V. 2. Latchup capability (85°C) "100 mA DC with trigger voltage. http://onsemi.com 2 NCP502, NCP502A ELECTRICAL CHARACTERISTICS (Vin = Vout(nom.) + 2.0 V, Venable = Vin, Cin = 1.0 F, Cout = 1.0 F, TJ = 25°C, unless otherwise noted.) Characteristic Symbol Output Voltage (TA = 25°C, Iout = 10 mA) Vin = Vout (nom.) +1.0 V 1.5 V 1.8 V 2.5 V 2.7 V 2.8 V 2.9 V 3.0 V 3.1 V 3.3 V 3.4 V 3.5 V 3.6 V 3.7 V 5.0 V Vout Output Voltage (TA = −40°C to 85°C, Iout = 10 mA) Vin = Vout (nom.) 1.5 V 1.8 V 2.5 V 2.7 V 2.8 V 2.9 V 3.0 V 3.1 V 3.3 V 3.4 V 3.5 V 3.6 V 3.7 V 5.0 V Vout Min Typ Max 1.455 1.746 2.425 2.646 2.744 2.842 2.94 3.038 3.234 3.332 3.43 3.528 3.626 4.900 1.5 1.8 2.5 2.7 2.8 2.9 3.0 3.1 3.3 3.4 3.5 3.6 3.7 5.0 1.545 1.854 2.575 2.754 2.856 2.958 3.06 3.162 3.366 3.468 3.57 3.672 3.774 5.100 1.455 1.746 2.425 2.619 2.716 2.813 2.910 3.007 3.201 3.298 3.43 3.528 3.626 4.900 1.5 1.8 2.5 2.7 2.8 2.9 3.0 3.1 3.3 3.4 3.5 3.6 3.7 5.0 1.545 1.854 2.575 2.781 2.884 2.987 3.09 3.193 3.399 3.502 3.57 3.672 3.774 5.100 Unit V V Line Regulation (Vin = Vout + 1.0 V to 12 V, Iout = 10 mA) Regline − 0.4 3.0 mV/V Load Regulation (Iout = 1.0 mA to 80 mA) Regload − 0.2 0.8 mV/mA Output Current (Vout = (Vout at Iout = 80 mA) −3%) Io(nom.) 80 180 − mA Dropout Voltage (TA = −40°C to 85°C, Iout = 80 mA, Measured at Vout −3.0%) 1.5 V−1.7 V 1.8 V−2.4 V 2.5 V−2.6 V 2.7 V−2.9 V 3.0 V−4.0 V 4.1 V−5.0 V Vin−Vout Quiescent Current (Enable Input = 0 V) (Enable Input = Vin, Iout = 1.0 mA to Io(nom.)) mV − − − − − − 1500 1300 1000 850 850 600 1900 1700 1400 1300 1200 900 − − 0.1 40 1.0 90 A IQ Output Short Circuit Current (Vout = 0 V) Iout(max) 90 200 500 Ripple Rejection (f = 1.0 kHz, 15 mA) RR − 55 − dB Output Voltage Noise (f = 100 Hz to 100 kHz) Vn − 180 − Vrms 1.3 − − − − 0.3 1.0 − − − − 0.4 − 100 − Enable Input Threshold Voltage (NCP502) (Voltage Increasing, Output Turns On, Logic High) (Voltage Decreasing, Output Turns Off, Logic Low) Vth(en) Enable Input Threshold Voltage (NCP502A) (Voltage Increasing, Output Turns On, Logic High) (Voltage Decreasing, Output Turns Off, Logic Low) Vth(en) Output Voltage Temperature Coefficient TC V V 3. Maximum package power dissipation limits must be observed. T *TA PD + J(max) RJA 4. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. http://onsemi.com 3 mA ppm/°C NCP502, NCP502A 45 VOUT = 3.0 V 40 IQ, QUIESCENT CURRENT (A) IQ, QUIESCENT CURRENT (A) 45 35 30 25 20 15 10 5 40 37.5 35 32.5 30 −60 0 1 IOUT, OUTPUT CURRENT (mA) 3 4 5 6 7 −40 −20 0 20 40 60 80 100 T, TEMPERATURE (°C) Figure 2. Quiescent Current versus Input Voltage Figure 3. Quiescent Current versus Temperature 6 VIN = 4.0 V to 5.0 V 5 4 60 ENABLE VOLTAGE (V) VIN, INPUT VOLTAGE (V) 10 VIN = 4.0 V VENABLE = 0 to 4.0 V 5 0 COUT = 1.0 F IOUT = 30 mA VOUT, OUTPUT VOLTAGE (V) 40 20 0 −20 −40 0 10 20 30 40 50 60 70 80 90 3.0 2.0 IOUT = 30 mA COUT = 1.0 F 1.0 0 0 100 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 t, TIME (s) t, TIME (ms) Figure 4. Line Transient Response Figure 5. Enable Response 60 0.9 1.0 70 30 0 100 OUTPUT VOLTAGE DEVIATION (mV) 2 RIPPLE REJECTION (dB) OUTPUT VOLTAGE DEVIATION (mV) VIN, INPUT VOLTAGE (V) 0 VIN = 5.0 V VOUT = 3.0 V 42.5 COUT = 1.0 F VOUT = 3.0 V VIN = 4.0 V 50 0 −50 −100 0 50 100 150 200 250 300 350 400 450 60 50 40 30 20 0.01 VIN = 4.5 V + 0.5 VP−P VOUT = 3.0 V IOUT = 30 mA COUT = 1.0 F 0.1 1.0 10 t, TIME (s) FREQUENCY (kHz) Figure 6. Load Transient Response Figure 7. Ripple Rejection/Frequency http://onsemi.com 4 100 NCP502, NCP502A 2.995 3.5 VOUT, OUTPUT VOLTAGE (V) 2.985 VIN = 4.0 V 2.98 2.975 2.97 2.965 3 2.5 2 1.5 1 0.5 0 −40 −20 20 0 40 60 100 80 0 1 2 3 4 5 T, TEMPERATURE (°C) VIN, INPUT VOLTAGE (V) Figure 8. Output Voltage versus Temperature Figure 9. Output Voltage versus Input Voltage 1200 VIN − VOUT, DROPOUT VOLTAGE (mV) VOUT, OUTPUT VOLTAGE (V) 2.99 2.96 −60 CIN = 1.0 F COUT = 1.0 F VENABLE = VIN VIN = 12 V IOUT = 10 mA 1000 80 mA LOAD 800 600 40 mA LOAD 400 200 10 mA LOAD 0 −50 −25 0 25 50 75 100 125 T, TEMPERATURE (°C) Figure 10. Dropout Voltage versus Temperature http://onsemi.com 5 6 NCP502, NCP502A DEFINITIONS Load Regulation Line Regulation The change in output voltage for a change in output current at a constant temperature. The change in output voltage for a change in input voltage. The measurement is made under conditions of low dissipation or by using pulse technique such that the average chip temperature is not significantly affected. Dropout Voltage The input/output differential at which the regulator output no longer maintains regulation against further reductions in input voltage. Measured when the output drops 3.0% below its nominal. The junction temperature, load current, and minimum input supply requirements affect the dropout level. Line Transient Response Typical over and undershoot response when input voltage is excited with a given slope. Thermal Protection Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. When activated at typically 160°C, the regulator turns off. This feature is provided to prevent failures from accidental overheating. Maximum Power Dissipation The maximum total dissipation for which the regulator will operate within its specifications. Quiescent Current The quiescent current is the current which flows through the ground when the LDO operates without a load on its output: internal IC operation, bias, etc. When the LDO becomes loaded, this term is called the Ground current. It is actually the difference between the input current (measured through the LDO input pin) and the output current. Maximum Package Power Dissipation The maximum power package dissipation is the power dissipation level at which the junction temperature reaches its maximum operating value, i.e. 125°C. Depending on the ambient power dissipation and thus the maximum available output current. http://onsemi.com 6 NCP502, NCP502A APPLICATIONS INFORMATION chance to pick up noise or cause the regulator to malfunction. Set external components, especially the output capacitor, as close as possible to the circuit, and make leads as short as possible. A typical application circuit for the NCP502/A series is shown in Figure 1, front page. Input Decoupling (C1) A 1.0 F capacitor either ceramic or tantalum is recommended and should be connected close to the NCP502/A package. Higher values and lower ESR will improve the overall line transient response. If large line or load transients are not expected, then it is possible to operate the regulator without the use of a capacitor. TDK capacitor: C2012X5R1C105K, or C1608X5R1A105K Thermal As power across the NCP502/A increases, it might become necessary to provide some thermal relief. The maximum power dissipation supported by the device is dependent upon board design and layout. Mounting pad configuration on the PCB, the board material and also the ambient temperature effect the rate of temperature rise for the part. This is stating that when the NCP502/A has good thermal conductivity through the PCB, the junction temperature will be relatively low with high power dissipation applications. The maximum dissipation the package can handle is given by: Output Decoupling (C2) The NCP502/A is a stable regulator and does not require any specific Equivalent Series Resistance (ESR) or a minimum output current. Capacitors exhibiting ESRs ranging from a few m up to 5.0 can thus safely be used. The minimum decoupling value is 1.0 F and can be augmented to fulfill stringent load transient requirements. The regulator accepts ceramic chip capacitors as well as tantalum devices. Larger values improve noise rejection and load regulation transient response. TDK capacitor: C2012X5R1C105K, C1608X5R1A105K, or C3216X7R1C105K T *TA PD + J(max) RJA If junction temperature is not allowed above the maximum 125°C, then the NCP502/A can dissipate up to 250 mW @ 25°C. The power dissipated by the NCP502/A can be calculated from the following equation: Enable Operation The enable pin will turn on the regulator when pulled high and turn off the regulator when pulled low. These limits of threshold are covered in the electrical specification section of this data sheet. If the enable is not used then the pin should be connected to Vin. Ptot + [Vin * Ignd (Iout)] ) [Vin * Vout] * Iout or P ) Vout * Iout VinMAX + tot Ignd ) Iout Hints If an 80 mA output current is needed then the ground current from the data sheet is 40A. For an NCP502/A (3.0 V), the maximum input voltage will then be 6.12 V. Please be sure the Vin and GND lines are sufficiently wide. When the impedance of these lines is high, there is a http://onsemi.com 7 NCP502, NCP502A ORDERING INFORMATION Nominal Output Voltage Marking Package Shipping † NCP502SQ15T1 1.5 LCC SC70−5 3000 / Tape & Reel NCP502SQ15T1G 1.5 LCC SC70−5 (Pb−Free) 3000 / Tape & Reel NCP502SQ18T1 1.8 LCD SC70−5 3000 / Tape & Reel NCP502SQ18T1G 1.8 LCD SC70−5 (Pb−Free) 3000 / Tape & Reel NCP502SQ25T1 2.5 LCE SC70−5 3000 / Tape & Reel NCP502SQ25T1G 2.5 LCE SC70−5 (Pb−Free) 3000 / Tape & Reel NCP502SQ27T1 2.7 LCF SC70−5 3000 / Tape & Reel NCP502SQ27T1G 2.7 LCF SC70−5 (Pb−Free) 3000 / Tape & Reel NCP502SQ28T1 2.8 LCG SC70−5 3000 / Tape & Reel NCP502SQ28T1G 2.8 LCG SC70−5 (Pb−Free) 3000 / Tape & Reel NCP502SQ29T1G 2.9 LJI SC70−5 (Pb−Free) 3000 / Tape & Reel NCP502SQ30T1 3.0 LCH SC70−5 3000 / Tape & Reel NCP502SQ30T1G 3.0 LCH SC70−5 (Pb−Free) 3000 / Tape & Reel NCP502SQ31T1G 3.1 LJJ SC70−5 (Pb−Free) 3000 / Tape & Reel NCP502SQ33T1 3.3 LCI SC70−5 3000 / Tape & Reel NCP502SQ33T1G 3.3 LCI SC70−5 (Pb−Free) 3000 / Tape & Reel NCP502SQ34T1G 3.4 LJK SC70−5 (Pb−Free) 3000 / Tape & Reel NCP502SQ35T1 3.5 LGO SC70−5 3000 / Tape & Reel NCP502SQ35T1G 3.5 LGO SC70−5 (Pb−Free) 3000 / Tape & Reel NCP502SQ36T1G 3.6 LIU SC70−5 (Pb−Free) 3000 / Tape & Reel NCP502SQ37T1G 3.7 LJQ SC70−5 (Pb−Free) 3000 / Tape & Reel NCP502SQ50T1 5.0 LCJ SC70−5 3000 / Tape & Reel NCP502SQ50T1G 5.0 LCJ SC70−5 (Pb−Free) 3000 / Tape & Reel NCP502ASQ15T1G 1.5 LGP SC70−5 (Pb−Free) 3000 / Tape & Reel NCP502ASQ18T1G 1.8 LGQ SC70−5 (Pb−Free) 3000 / Tape & Reel NCP502ASQ25T1G 2.5 LGR SC70−5 (Pb−Free) 3000 / Tape & Reel NCP502ASQ27T1G 2.7 LGS SC70−5 (Pb−Free) 3000 / Tape & Reel NCP502ASQ28T1G 2.8 LGT SC70−5 (Pb−Free) 3000 / Tape & Reel Device http://onsemi.com 8 NCP502, NCP502A ORDERING INFORMATION Nominal Output Voltage Marking Package Shipping † NCP502ASQ30T1G 3.0 LGU SC70−5 (Pb−Free) 3000 / Tape & Reel NCP502ASQ33T1G 3.3 LGV SC70−5 (Pb−Free) 3000 / Tape & Reel NCP502ASQ35T1G 3.5 LGW SC70−5 (Pb−Free) 3000 / Tape & Reel NCP502ASQ50T1G 5.0 LGX SC70−5 (Pb−Free) 3000 / Tape & Reel NCP502SN28T1G 2.8 LKD TSOP−5 (Pb−Free) 3000 / Tape & Reel NCP502SN29T1G 2.9 LJN TSOP−5 (Pb−Free) 3000 / Tape & Reel NCP502SN30T1G 3.0 LKE TSOP−5 (Pb−Free) 3000 / Tape & Reel NCP502SN31T1G 3.1 LJO TSOP−5 (Pb−Free) 3000 / Tape & Reel NCP502SN33T1G 3.3 LKF TSOP−5 (Pb−Free) 3000 / Tape & Reel NCP502SN34T1G 3.4 LJP TSOP−5 (Pb−Free) 3000 / Tape & Reel NCP502SN37T1G 3.7 LJT TSOP−5 (Pb−Free) 3000 / Tape & Reel NCP502SN50T1G 5.0 LKG TSOP−5 (Pb−Free) 3000 / Tape & Reel Device Additional voltages in 100 mV steps are available upon request by contacting your ON Semiconductor representative. †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 9 NCP502, NCP502A PACKAGE DIMENSIONS SC70−5, SC−88A, SOT−353 SQ SUFFIX CASE 419A−02 ISSUE J A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419A−01 OBSOLETE. NEW STANDARD 419A−02. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. G 5 4 −B− S 1 2 DIM A B C D G H J K N S 3 0.2 (0.008) D 5 PL M B M N INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC −−− 0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 J C K H SOLDERING FOOTPRINT* 0.50 0.0197 0.65 0.025 0.65 0.025 0.40 0.0157 1.9 0.0748 SCALE 20:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 10 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC −−− 0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20 NCP502, NCP502A TSOP−5 CASE 483−02 ISSUE F NOTE 5 2X 0.10 T 2X 0.20 T NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. 5. OPTIONAL CONSTRUCTION: AN ADDITIONAL TRIMMED LEAD IS ALLOWED IN THIS LOCATION. TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2 FROM BODY. D 5X 0.20 C A B 5 1 4 2 3 M B S K L DETAIL Z G A DIM A B C D G H J K L M S DETAIL Z J C 0.05 SEATING PLANE H T MILLIMETERS MIN MAX 3.00 BSC 1.50 BSC 0.90 1.10 0.25 0.50 0.95 BSC 0.01 0.10 0.10 0.26 0.20 0.60 1.25 1.55 0_ 10 _ 2.50 3.00 SOLDERING FOOTPRINT* 0.95 0.037 1.9 0.074 2.4 0.094 1.0 0.039 0.7 0.028 SCALE 10:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 http://onsemi.com 11 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NCP502/D