MC1408−8 8−bit Multiplying D/A Converter The MC1408−8 is an 8−bit monolithic digital−to−analog converter which provides high−speed performance with low cost. It is designed for use where the output current is a linear product of an 8−bit digital word and an analog reference voltage. http://onsemi.com Features • • • • • • • MARKING DIAGRAMS Fast Settling Time: 70 ns (typ) Relative Accuracy ±0.19% (max error) Non−inverting Digital Inputs are TTL and CMOS Compatible High−speed Multiplying Rate 4.0 mA/ms (Input Slew) Output Voltage Swing +0.5 V to −5.0 V Standard Supply Voltages +5.0 V and −5.0 V to −15 V Pb−Free Packages are Available* Applications • • • • • • • • • • • • • • • • 16 1 1 16 1 Tracking A−to−D Converters 2 1/2−Digit Panel Meters and DVMs Waveform Synthesis Sample−and−Hold Peak Detector Programmable Gain and Attenuation CRT Character Generation Audio Digitizing and Decoding Programmable Power Supplies Analog−Digital Multiplication Digital−Digital Multiplication Analog−Digital Division Digital Addition and Subtraction Speech Compression and Expansion Stepping Motor Drive Modems Servo Motor and Pen Drivers MC1408−8DG AWLYWW SOIC−16 D SUFFIX CASE 751B MC1408−8N AWLYYWWG PDIP−16 N SUFFIX CASE 648 1 A WL YY, Y WW G = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package PIN CONNECTIONS N Package NC 1 16 COMPEN GND 2 15 VREF(−) VEE 3 14 VREF(+) IO 4 13 VCC MSB A1 5 12 A8 LSB A2 6 11 A7 A3 A4 7 10 A6 8 9 A5 D Package* 16 A8 LSB 2 15 A7 VREF(−) 3 14 A6 COMPEN 4 13 A5 NC 5 12 A4 GND 6 11 A3 VEE 7 10 A2 IO 9 A1 MSB VCC 1 VREF(+) 8 (Top View) *SO and non−standard pinouts. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2006 May, 2006 − Rev. 2 1 ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. Publication Order Number: MC1408−8/D MC1408−8 MSB A1 A2 5 6 A3 A4 7 8 A5 A6 9 LSB A8 A7 10 11 12 IO 4 CURRENT SWITCHES BIAS CURRENT R-2R LADDER VREF (+) 14 REFERENCE CURRENT AMPLIFIER 15 (−) VREF 2 GND 13 VCC 16 COMPEN VEE 3 NPN CURRENT SOURCE PAIR Figure 1. Block Diagram PIN FUNCTION DESCRIPTION Pin N Package / D Package Symbol 1/5 NC 2/6 GND Ground 3/7 VEE Negative Power Supply 4/8 Io Output Current 5/9 A1 Output 1, Most Significant Bit (MSB) 6/10 A2 Output 2 7/11 A3 Output 3 8/12 A4 Output 4 Description No Connect 9/13 A5 Output 5 10/14 A6 Output 6 11/15 A7 Output 7 12/16 A8 Output 8, Least Significant Bit (LSB) 13/1 VCC 14/2 VREF(+) Positive Reference Voltage 15/3 VREF(−) Negative Reference Voltage 16/4 COMPEN Compensator Capacitor Pin Positive Power Supply http://onsemi.com 2 MC1408−8 MAXIMUM RATINGS Symbol Value Unit Positive Power Supply Voltage Rating VCC +5.5 V Negative Power Supply Voltage VEE −16.5 V V5 − V12 0 to VCC V Applied Output Voltage VO −5.2 to +18 V Reference Current I14 5.0 mA V14, V15 VEE to VCC Digital Input Voltage Reference Amplifier Inputs Maximum Power Dissipation, Tamb = 25°C (still−air) (Note 1) N Package D Package PD mW 1450 1080 °C/W Thermal Resistance, Junction−to−Ambient N Package D Package RqJA Operating Temperature Range Tamb 0 to +75 °C Operating Junction Temperature TJ 150 °C Storage Temperature Range Tstg −65 to +150 °C Lead Soldering Temperature (10 sec) Tsld +230 °C 75 105 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Derate above 25°C, at the following rates: N package at 13.3 mW/°C; D package at 9.5 mW/°C. IO OUTPUT CURRENT (mA) TYPICAL PERFORMANCE CHARACTERISTICS 0 1.0 2.0 (00000000)INPUT DIGITAL WORD(11111111) Figure 2. D−to−A Transfer Characteristics http://onsemi.com 3 MC1408−8 DC ELECTRICAL CHARACTERISTICS (Pin 3 must be 3.0 V more negative than the potential to which R15 is returned. VCC +5.0 VDC, VEE = −15 VDC, VREF/R14 = 2.0 mA unless otherwise specified. Tamb = 0°C to 75°C, unless otherwise noted.) Characteristic Test Conditions Symbol Min Typ Relative Accuracy Error relative to full−scale IO, Figure 5 Er Settling Time (Note 2) To within 1/2 LSB, includes tPLH; Tamb = +25°C, Figure 6 tS 70 tPLH tPHL 35 TCIO −20 Propagation Delay Time Low−to−High High−to−Low Digital Input Logic Level (MSB) High Low Figure 7 Digital Input Current (MSB) High Low Figure 7 VIH = 5.0 V VIL = 0.8 V Reference Input Bias Current Output Current Range Off−State Output Voltage Compliance Unit ±0.19 % ns ns Tamb = +25°C, Figure 6 Output Full−scale Current Drift Output Current Max 100 ppm/°C VDC VIH VIL 2.0 0.8 mA IIH IIL 0 −0.4 0.04 −0.8 Pin 15, Figure 7 I15 −1.0 −5.0 Figure 7 VEE = −5.0 V VEE = −7.0 V to −15 V IOR Figure 7 VREF = 2.000 V, R14 = 1000 W All bits low IO Reference Current Slew Rate Figure 8 Output Current Power Supply Sensitivity IREF = 1.0 mA Power Supply Current Positive Negative All bits low, Figure 7 0 0 2.0 2.0 2.1 4.2 1.9 1.99 0 2.1 4.0 IO(min) Er ≤ 0.19%.0 at TA = +25°C, Figure 7 VEE = −5.0 V VEE below −10 V mA mA VO mA mA VDC −0.6 +10 −5.5, +10 −0.55, +0.5 −5.0, +0.5 SRIREF 8.0 PSRR(−) 0.5 2.7 ICC IEE +2.5 −6.5 +22 −13 +5.0 −15 +5.5 −16.5 34 110 170 305 mA/ms mA/V mA Power Supply Voltage Range Positive Negative Tamb = +25°C, Figure 7 Power Dissipation All bits low, Figure 7 VEE = −5.0 VDC VEE = −15.0 VDC VCCR VEER VDC +4.5 −4.5 PD 2. All bits switched. http://onsemi.com 4 mW MC1408−8 Circuit Description The MC1408−8 consists of a reference current amplifier, an R−2R ladder, and 8 high−speed current switches. For many applications, only a reference resistor and reference voltage need be added. The switches are non−inverting in operation; therefore, a high state on the input turns on the specified output current component. The switch uses current steering for high speed, and a termination amplifier consisting of an active load gain stage with unity gain feedback. The termination amplifier holds the parasitic capacitance of the ladder at a constant voltage during switching, and provides a low impedance termination of equal voltage for all legs of the ladder. The R−2R ladder divides the reference amplifier current into binary−related components, which are fed to the remainder current which is equal to the least significant bit. This current is shunted to ground, and the maximum output current is 255/256 of the reference amplifier current, or 1.992 mA for a 2.0 mA reference amplifier current if the NPN current source pair is perfectly matched. corresponding to the minimum input level. R15 may be eliminated and Pin 15 grounded, with only a small sacrifice in accuracy and temperature drift. The compensation capacitor value must be increased with increasing values of R14 to maintain proper phase margin. For R14 values of 1.0, 2.5, and 5.0 kW, minimum capacitor values are 15, 37, and 75 pF. The capacitor may be tied to either VEE or ground, but using VEE increases negative supply rejection. (Fluctuations in the negative supply have more effect on accuracy than do any changes in the positive supply.) A negative reference voltage may be used if R14 is grounded and the reference voltage is applied to R15, as shown in Figure 4. A high input impedance is the main advantage of this method. The negative reference voltage must be at least 3.0 V above the VEE supply. Bipolar input signals may be handled by connecting R14 to a positive reference voltage equal to the peak positive input level at Pin 15. Capacitive bypass to ground is recommended when a DC reference voltage is used. The 5.0 V logic supply is not recommended as a reference voltage, but if a well regulated 5.0 V supply which drives logic is to be used as the reference, R14 should be formed of two series resistors and the junction of the two resistors bypassed with 0.1 mF to ground. For reference voltages greater than 5.0 V, a clamp diode is recommended between Pin 14 and ground. If Pin 14 is driven by a high impedance such as a transistor current source, none of the above compensation methods apply and the amplifier must be heavily compensated, decreasing the overall bandwidth. Functional Description Reference Amplifier Drive and Compensation The reference amplifier input current must always flow into Pin 14. regardless of the setup method or reference supply voltage polarity. Connections for a positive reference voltage are shown in Figure 3. The reference voltage source supplies the full reference current. For bipolar reference signals, as in the multiplying mode, R15 can be tied to a negative voltage VCC A1 A2 A3 A4 A5 A6 A7 A8 VCC R14 = R15 13 5 6 14 7 15 8 1 9 MC1408 2 10 4 11 16 A1 R14 (+)VREF A2 A3 R15 A4 A5 RL A6 IO A7 12 A8 C 3 R14 = R15 13 5 6 14 7 15 8 1 9 MC1408 2 10 4 11 16 R14 (−)VREF R15 RL IO 12 C 3 SEE TEXT FOR VALUES OF C. VEE SEE TEXT FOR VALUES OF C. VEE Figure 3. Positive VREF Figure 4. Negative VREF http://onsemi.com 5 MC1408−8 Output Voltage Range current drift. Relative accuracy is the measure of each output current level as a fraction of the full−scale current after zero−scale current has been nulled out. The relative accuracy of the MC1408−8 is essentially constant over the operating temperature range because of the excellent temperature tracking of the monolithic resistor ladder. The reference current may drift with temperature, causing a change in the absolute accuracy of output current; however, the MC1408−8 has a very low full−scale current drift over the operating temperature range. The MC1408−8 series is guaranteed accurate to within ±1/2 LSB at +25 °C at a full−scale output current of 1.99 mA. The relative accuracy test circuit is shown in Figure 5. The 12−bit converter is calibrated to a full−scale output current of 1.99219 mA; then the MC1408−8’s full−scale current is trimmed to the same value with R14 so that a zero value appears at the error amplifier output. The counter is activated and the error band may be displayed on the oscilloscope, detected by comparators, or stored in a peak detector. Two 8−bit D−to−A converters may not be used to construct a 16−bit accurate D−to−A converter. 16−bit accuracy implies a total of ±1/2 part in 65,536, or ±0.00076%, which is much more accurate than the ±0.19% specification of the MC1408−8. The voltage at Pin 4 must always be at least 4.5 V more positive than the voltage of the negative supply (Pin 3) when the reference current is 2.0 mA or less, and at least 8 V more positive than the negative supply when the reference current is between 2.0 mA and 4.0 mA. This is necessary to avoid saturation of the output transistors, which would cause serious degradation of accuracy. ON Semiconductor’s MC1408−8 does not need a range control because the design extends the compliance range down to 4.5 V (or 8.0 V−see above) above the negative supply voltage without significant degradation of accuracy. ON Semiconductor’s MC1408−8 can be used in sockets designed for other manufacturers’ MC1408 without circuit modification. Output Current Range Any time the full−scale current exceeds 2.0 mA, the negative supply must be at least 8.0 V more negative than the output voltage. This is due to the increased internal voltage drops between the negative supply and the outputs with higher reference currents. Accuracy Absolute accuracy is the measure of each output current level with respect to its intended value, and is dependent upon relative accuracy, full−scale accuracy and full−scale MSB A1 A2 12-BIT A3 D-TO-A A4 CONVERTER (±0.02% A5 A6 ERROR MAX) A7 A8A9A10A11 A12 0 TO +10V OUTPUT 5kW LSB 50kW VREF = 2V 100W 8-BIT COUNTER 0.1mF 950W R14 VCC 13 MSB14 5 6 7 8 MC1408 9 10 11 12 LSB 15 16 3 2 1 C 1kW VEE Figure 5. Relative Accuracy http://onsemi.com 6 − + NE530 4 ERROR (1V = 1%) MC1408−8 applies when RL < 500 W and CO < 25 pF. The slowest single switch is the least significant bit, which typically turns on and settles in 65 ns. In applications where the D−to−A converter functions in a positive going ramp mode, the worst−case condition does not occur and settling times less than 70 ns may be realized. Extra care must be taken in board layout since this usually is the dominant factor in satisfactory test results when measuring settling time. Short leads, 100 mF supply bypassing for low frequencies, minimum scope lead length, good ground planes, and avoidance of ground loops are all mandatory. Monotonicity A monotonic converter is one which always provides an analog output greater than or equal to the preceding value for a corresponding increment in the digital input code. The MC1408−8 is monotonic for all values of reference current above 0.5 mA. The recommended range for operation is a DC reference current between 0.5 mA and 4.0 mA. Settling Time The worst case switching condition occurs when all bits are switched on, which corresponds to a low−to−high transition for all input bits. This time is typically 70 ns for settling to within 1/2LSB for 8−bit accuracy. This time VCC 0.1mF eIN 13 5 6 7 8 9 10 11 12 eIN 14 15 1 MC1408 2 4 16 51W 1.0k W 15pF 3 0.1mF 1.0kW +2VDC R14 2.4V 1.4V 0.4V tPHL = tPLH = 10ns 1.0V SETTLING TIME 0.1mF 0 FOR SETTLING TIME MEASUREMENT eO (ALL BITS SWITCHED LOW TO HIGH) TRANSIENT 0 RESPONSE CO ≤ 25pF −100 mV RL USE RL to GND FOR TURN OFF MEASUREMENT RL = 500W tS = 70ns TYPICAL TO ±1/2LSB tPLH RL = 50W PIN 4 TO GND tPHL VEE Figure 6. Transient Response and Settling Time VCC ICC 13 DIGITAL INPUTS A1 5 A2 6 A3 7 A4 8 A5 9 A6 10 A7 11 A8 12 MC1408 (+) II VI 3 IEE TYPICAL VALUES R14 = R15 = 1k VREF = +2.0V C = 15pF VI AND II APPLY TO INPUTS A1 THROUGH A8 I14 R14 THE RESISTOR TIED TO PIN 15 IS TO TEMPERATURE 14 VREF(+) COMPENSATE THE BIAS CURRENT AND MAY NOT BE I15 NECESSARY FOR ALL APPLICATIONS 15 R15 1 A A A A A1 A A A 2 IO + K ) 2 ) 3 ) 4 ) 5 ) 6 ) 7 ) 8 2 4 8 16 32 64 128 256 4 VO V OUTPUT where K + REF 16 IO R 14 RL and AN = “1” IF AN IS AT HIGH LEVEL NJ AN = “0” IF AN IS AT LOW LEVEL VEE (SEE TEXT FOR VALUES OF C) Figure 7. Notation Definitions http://onsemi.com 7 Nj MC1408−8 VCC 13 5 14 6 7 15 1 8 9 MC1408 2 10 4 11 16 12 3 1kW VREF 1kW 15pF SCOPE RL = 50W dI I dV + dt R L dt 10% 90% 0 2.0mA SLEWING TIME VEE Figure 8. Reference Current Slew Rate Measurement ORDERING INFORMATION Device Temperature Range Package MC1408−8D SOIC−16 MC1408−8DG SOIC−16 (Pb−Free) MC1408−8DR2 MC1408−8DR2G Shipping† 48 Units/Rail SOIC−16 0°C to +70°C SOIC−16 (Pb−Free) MC1408−8N PDIP−16 MC1408−8NG PDIP−16 (Pb−Free) 2500 Tape and Reel 25 Units/Rail †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 8 MC1408−8 PACKAGE DIMENSIONS PDIP−16 CASE 648−08 ISSUE T NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. −A− 16 9 1 8 B F C L DIM A B C D F G H J K L M S S SEATING PLANE −T− K H G D M J 16 PL 0.25 (0.010) T A M M INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01 SOIC−16 CASE 751B−05 ISSUE J NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. −A− 16 9 1 8 −B− P 8 PL 0.25 (0.010) M B S G R K F X 45 _ C −T− SEATING PLANE J M D 16 PL 0.25 (0.010) M T B S A DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019 S ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 http://onsemi.com 9 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative MC1408−8/D