SUTEX HV2701 Low charge injection 16-channel high voltage analog switch with bleed resistor Datasheet

HV2701
Initial Release
Low Charge Injection 16-Channel
High Voltage Analog Switch with Bleed Resistors
Features
General Description
The Supertex HV2701 is a low charge injection 16-channel high
voltage analog switch integrated circuit (IC) with bleed resistors. The
device can be used in applications requiring high voltage switching
controlled by low voltage control signals, such as medical ultrasound
imaging and piezoelectric transducer drivers. The bleed resistors
eliminate voltage built up on capacitive loads such as piezoelectric
transducers.
HVCMOS technology for high performance
Integrated bleed resistors on the outputs
16 Channels of high voltage analog switch
3.3V input logic level compatible
20MHz data shift clock frequency
Very low quiescent power dissipation-10µA
Low parasitic capacitance
DC to 10MHz analog signal frequency
-60dB typical off-isolation at 5MHz
CMOS logic circuitry for low power
Excellent noise immunity
Cascadable serial data register with latches
Flexible operating supply voltages
Input data is shifted into a 16-bit shift register that can then be retained
in a 16-bit latch. To reduce any possible clock feed through noise, the
latch enable bar should be left high until all bits are clocked in. Data
are clocked in during the rising edge of the clock. Using HVCMOS
technology, this device combines high voltage bilateral DMOS
switches and low power CMOS logic to provide efficient control of
high voltage analog signals.
Applications
The device is suitable for various combinations of high voltage
supplies, e.g., VPP/VNN: +40V/-160V, +100V/-100V, and +160V/-40V.
Medical ultrasound imaging
NDT metal flaw detection
Piezoelectric transducer drivers
Optical MEMS modules
HV2701 Block Diagram
LEVEL
SHIFTERS
LATCHES
DIN
CLK
16 BIT
SHIFT
REGISTER
DOUT
VDD
OUTPUT
SWITCHES
D
LE
CL
SW0
D
LE
CL
SW1
D
LE
CL
SW2
D
LE
CL
SW14
D
LE
CL
SW15
RGND
GND
LE CL
VNN VPP
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HV2701
Ordering Information
Package Options
DEVICE
48-Lead TQFP (1.4mm)
HV2701
HV2701FG-G
-G indicates package is RoHS compliant (‘Green’)
Absolute Maximum Ratings
VDD Logic supply
-0.5V to +7V
VPP-VNN differential supply
VPP Positive supply
220V
-0.5V to VNN+200V
VNN Negative supply
+0.5V to -200V
-0.5V to VDD +0.3V
Logic input voltage
VNN to VPP
Analog signal range
Peak analog signal current/channel
Storage temperature
3.0A
-65°C to 150°C
Power dissipation
1W
*Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation under these conditions is not implied. Continuous operation of the device at the
absolute rating level may affect device reliability. All voltages are referenced to device ground.
Operation Conditions
Symbol
Parameter
Value
VDD
Logic power supply voltage
3.0V to 5.5V
VPP
Positive high voltage supply
40V to VNN +200V
VNN
Negative high voltage supply
VIH
High level input voltage
0.9VDD to VDD
VIL
Low level input voltage
0V to 0.1VDD
VSIG
Analog signal voltage peak-to-peak
TA
-40V to –160V
VNN+10V to VPP-10V
Operating free air temperature
0°C to 70°C
Notes:
1 Power up/down sequence is arbitrary except GND must be powered-up first and powered-down last.
2 VSIG must be within VNN and VPP or floating during power up/down transition.
3 Rise and fall times of power supplies VDD, VPP, and VNN should not be less than 1.0msec.
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HV2701
DC Electrical Characteristics
(over recommended operating conditions unless otherwise noted)
0°C
Sym
Small Signal Switch
On-Resistance
∆RONS
Small Signal Switch
On-Resistance Matching
RONL
Large Signal Switch
On-Resistance
RINT
Value of output Bleed
Resistor
ISOL
Switch Off Leakage per
Switch*
VOS
Typ
Max
26
38
48
22
22
27
27
32
30
18
23
18
20
24
25
27
30
22
16
25
27
20
5.0
20
20
15
INN
ISIG = 5mA, VPP = +100V,
VNN = -100V
Ω
VSIG=VPP-10V, ISIG=1A
300
300
mV
100
500
500
mV
10
50
µA
All switches off
-10
-50
µA
All switches off
10
50
µA
All switches on, ISW = 5mA
-10
-50
µA
All switches on, ISW = 5mA
3.0
2.0
A
VSIG duty cycle < 0.1%
DC Offset Switch on*
500
2.0
50
Average VNN
supply current
%
VSIG = VPP-10V and VNN+10V
100
Average VPP
supply current
kHz
No Load
Duty cycle = 50%
VPP = +40V
VNN = -160V
7.0
8.0
4.0
5.5
5.5
4.0
5.0
5.5
VPP = +160V
VNN = -40V
6.5
7.0
8.0
VPP = +40V
VNN = -160V
4.0
5.0
5.5
4.0
5.0
5.5
4.0
4.0
4.0
mA
fCLK = 5MHz, VDD = 5.0V
10
10
10
µA
All logic inputs are static
mA
mA
VPP = +100V
VNN = -100V
VPP = +160V
VNN=-40V
IDDQ
ISOR
Data out source current
0.45
0.45
0.70
0.40
mA
VOUT = VDD-0.7V
ISINK
Data out sink current
0.45
0.45
0.70
0.40
mA
VOUT = 0.7V
CIN
Logic input capacitance
10
10
10
All output
switches are
turning On and
Off at 50KHz
with no load.
VPP = +100V
VNN = -100V
Average VDD supply
current
Quiescent VDD supply
current
IDD
VPP = +160V
VNN = -40V
µA
6.5
IPP
VPP = +100V
VNN = -100V
15
300
Output switching
frequency
VPP = +40V
VNN = -160V
Output Switch to RGND
IRINT = 0.5mA
DC Offset Switch off*
3.0
Ω
ISIG = 5mA
ISIG = 200mA
ISIG = 5mA
ISIG = 200mA
ISIG = 5mA
ISIG = 200mA
KΩ
10
fSW
20
Conditions
Max
30
1.0
Switch output peak current
Min
25
25
5.0
ISW
IPPQ
Min
50
INNQ
INNQ
Max
35
Quiescent VPP supply
current
Quiescent VNN supply
current
Quiescent VPP supply
current
Quiescent VNN supply
current
IPPQ
+70°C
Units
Min
RONS
+25°C
Parameter
pF
* See Test Circuits on page 5
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HV2701
AC Electrical Characteristics
(over recommended operating conditions, VDD= 5.0V, tR= tF ≤ 5ns, 50% duty cycle, CLOAD= 20pF unless otherwise noted)
0°C
Sym
Parameter
tSD
Set Up Time Before LE
Rises
tWLE
Time Width of LE
Clock Delay Time to Data
Out
50
tDO
tWCL
Time Width of CL
55
tSU
Set Up Time Data to Clock
tH
Hold Time Data from
Clock
fCLK
Clock Frequency
tR,tF
Min
+25°C
Max
25
Min
Typ
+70°C
Max
25
56
Min
Max
25
56
Units
ns
56
ns
12
12
100
50
12
78
100
50
40
15
30
40
55
21
15
100
40
55
21
ns
21
7
2
7
2
VDD = 3.0V
VDD= 5.0V
ns
7
VDD = 3.0V
VDD = 5.0V
ns
15
Conditions
VDD= 3.0V
VDD= 5.0V
2
ns
VDD= 3.0 or 5.0V
8
8
8
20
20
20
MHz
Clock Rise and Fall Times
50
50
50
ns
TON
Turn ON Time*
5.0
5.0
5.0
µs
VSIG = VPP-10V, RLOAD = 10KΩ
TOFF
Turn OFF Time*
5.0
5.0
5.0
µs
VSIG = VPP-10V, RLOAD = 10KΩ
20
20
20
20
20
20
20
20
20
dv/dt
Maximum VSIG Slew Rate
-30
-30
-33
VDD= 3.0V
VPP = +40V, VNN = -160V
v/ns
Off Isolation*
KCR
Switch Crosstalk*
IID
Output Switch Isolation
Diode Current
CSG(OFF)
Off Capacitance SW to
GND
5.0
17
5.0
12
17
CSG(ON)
On Capacitance SW to
GND
25
50
25
38
50
f = 5.0MHz, 1KΩ//15pF load
dB
-58
-58
-60
-60
-58
-70
f = 5.0MHz, 50Ω load
-60
300
dB
f = 5.0MHz, 50Ω load
300
mA
300ns pulse width,
2.0% duty cycle
5.0
17
pF
0V, f = 1.0MHz
25
50
pF
0V, f = 1.0MHz
300
+VSPK
VPP = +40V, VNN = -160V,
RLOAD = 50ohm
150
-VSPK
+VSPK
Output Voltage Spike*
150
mV
-VSPK
+VSPK
VPP= +40V, VNN= -160V,
VSIG= 0V
820
Charge Injection*
VPP = +100V, VNN = -100V,
RLOAD = 50ohm
VPP = +160V, VNN = -40V,
RLOAD = 50ohm
150
-VSPK
QC
VPP = +100V, VNN = -100V
VPP = +160V, VNN = -40V
-30
KO
VDD= 5.0V
pC
600
VPP= +100V, VNN= -100V,
VSIG= 0V
VPP= +160V, VNN= -40V,
VSIG= 0V
350
* See Test Circuits on page 5
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HV2701
HV2701 Test Circuits
VPP-10V
VPP-10V
Open
PP
RGND
PP
RGND
PP
DD
RGND
PP
DD
PP
DC Offset Switch
ON/OFF
Switch Off Leakage
per Switch
PP
DD
TURN (TON/TOFF)
ON/OFF TIME
RGND
RGND
RGND
PP
PP
PP
DD
PP
PP
DD
OFF Isolation
Output Switch Isolation
Diode Current
PP
DD
Switch Crosstalk
RGND
RGND
PP
PP
PP
DD
Q = 1000pF x ΔVOUT
Charge Injection
PP
DD
Output Voltage Spike
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HV2701
Logic Function Table
LATCH
ENABLE CLOCK
INPUT DATA
Notes:
1.
2.
3.
4.
5.
6.
OUTPUT SWITCH
Th 16 switches operate independently.
Serial data is clocked in on the L to H transition of the CLK.
All 16 switches go to a state retaining their latched condition at the rising edge of LE. When LE is low the shift registers data flow through the latch.
DOUT is high when data in the register 15 is high.
Shift registers clocking has no effect on the switch states if LE is high.
The CL clear input overrides all other inputs.
Logic Timing Waveforms
DN–1
DN
DATA
IN
5 0%
LE
50%
DN+1
50%
50%
t WLE
t SD
50%
CLOCK
t SU
50%
th
t DO
DATA
O UT
50%
t ON
t OFF
V
OUT
(TYP )
OFF
90%
1 0%
ON
CLR
5 0%
5 0%
t WCL
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HV2701
Pin Configuration and Package Outline - 48-Lead TQFP (1.4mm) (FG)
Pin Name
TQFP-48
SW4B
3
SW4A
4
SW3B
5
SW3A
6
SW2B
7
SW2A
8
SW1B
9
SW1A
10
SW0B
11
SW0A
12
VNN
13
VPP
15
GND
17
VDD
18
DIN
19
CLK
20
LE
21
CLR
22
DOUT
23
RGND
24
SW15B
25
SW15A
26
SW14B
27
SW14A
28
SW13B
29
SW13A
30
SW12B
31
SW12A
32
SW11B
33
SW11A
34
SW10B
37
SW10A
38
SW9B
39
SW9A
40
SW8B
41
SW8A
42
SW7B
43
SW7A
44
SW6B
45
SW6A
46
SW5B
47
SW5A
48
NC
1,2,14,16,35,36
0.354 ± 0.01
(8.992 ± 0.254)
0.008 ± 0.003
(0.2032 ± 0.0762)
0.275 ± 0.004
(6.985 ± 0.102)
0.354 ± 0.01
(8.992 ± 0.254)
Pin 1
Pin 12
0.020
BSC
(0.508)
0.275 ± 0.004
(6.985 ± 0.102)
0.055 ± 0.004
(1.397 ± 0.102)
0.039
(0.991)
Measurement Legend =
NC = No Internal Connection.
Doc.# DSFP - HV2701
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0° − 7°
0.059 ± 0.004
(1.498 ± 0.102)
0.024 ± 0.008
(0.610 ± 0.203)
Dimensions in Inches
Dimensions in Millimeters
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