TI1 OPAX189 Precision, 36-v, 14-mhz, mux-friendly low-noise, rail-to-rail output, zero-drift operational amplifier Datasheet

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OPA189, OPA2189, OPA4189
SBOS830 – JUNE 2017
1 Features
3 Description
•
The OPAx189 (OPA189, OPA2189, and OPA4189)
series of high-precision operational amplifiers are
ultra-low noise, fast-settling, zero-drift devices that
provide rail-to-rail output operation and feature a
unique MUX-friendly architecture. These features and
excellent ac performance, combined with only 0.4 µV
of offset and 0.0035 µV/°C of drift over temperature,
makes the OPAx189 well-suited for precision
instrumentation, signal measurement, and active
filtering applications. Moreover, the MUX-friendly
input architecture prevents inrush current when
applying large differential voltages which improves
settling performance in multi-channel systems, all
while providing robust ESD protection during
shipment, handling, and assembly. All versions are
specified from –40°C to +125°C.
Ultra-High Precision:
– Ultra-Low Offset Voltage: 0.4 μV
– Zero-Drift: 0.0035 μV/°C
Excellent DC Precision:
– CMRR: 168 dB
– Open-Loop Gain: 170 dB
Low Noise:
– VN at 1 kHz: 5.8 nV/√Hz
– 0.1-Hz to 10-Hz Noise: 110 nVPP
Excellent Dynamic Performance:
– Gain Bandwidth: 14 MHz
– Slew Rate: 20 V/µs
– Fast Settling: 10-V, 0.01% in 1.5 µs
Robust Design:
– MUX-Friendly Inputs
– RFI/EMI Filtered Inputs
Wide Supply Range: 4.5 V to 36 V
Quiescent Current: 1.7 mA (Maximum)
Rail-to-Rail Output
Input Includes Negative Rail
1
•
•
•
•
•
•
•
•
Device Information(1)
PART NUMBER
OPA189
OPA2189
OPA4189
2 Applications
•
•
•
•
•
PACKAGE
BODY SIZE (NOM)
SOIC (8)
4.90 mm × 3.90 mm
SOT-23 (5)
2.90 mm × 1.60 mm
VSSOP (8)
3.00 mm × 3.00 mm
SOIC (8)
4.90 mm × 3.90 mm
VSSOP (8)
3.00 mm × 3.00 mm
SOIC (14)
8.65 mm × 3.90 mm
TSSOP (14)
5.00 mm × 4.40 mm
(1) For all available packages, see the package option addendum
at the end of the data sheet.
Precision Multi-Chanel Systems
Bridge Amplifier
Strain Gauges
Temperature Measurement
Resistance Temperature Detectors
OPAx189 Preserves R-C Settling Performance in a
Switched or Multiplexed Application
OPAx189 MUX-Friendly Input Settles Quickly and
Maintains High Input Impedance When Switched
Analog Inputs
OPAx189 MUX-friendly Inputs
Prevents Loading of Source
OPAx189
Bridge Sensor
Thermocouple
+
Robust MUX-Friendly Inputs
without Anti-Parallel Diodes
Voltage
OPAx189
4:2
HV
MUX
+
OPAx189
Competitor HV Amp
Current Sensing
LED
Photo
Detector
Optical Sensor
Classical High-Voltage Op Amp
Anti-Parallel Diodes Loads Source
High-Voltage Multiplexed Input
High-Voltage Level Translation
Input
Time
Copyright © 2017, Texas Instruments Incorporated C003
Copyright © 2017, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. ADVANCE INFORMATION for pre-production products; subject to
change without notice.
ADVANCE INFORMATION
OPAx189, Precision, 36-V, 14-MHz, MUX-Friendly
Low-Noise, Rail-to-Rail Output, Zero-Drift Operational Amplifiers
OPA189, OPA2189, OPA4189
SBOS830 – JUNE 2017
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
8
8.6 Device Functional Modes........................................ 19
1
1
1
2
3
4
7
9
9.1 Application Information............................................ 20
9.2 Typical Applications ................................................ 20
10 System Examples................................................ 27
10.1 24-Bit, Delta-Sigma, Differential Load Cell or Strain
Gauge Sensor Signal Conditioning.......................... 27
11 Power Supply Recommendations ..................... 28
12 Layout................................................................... 29
Absolute Maximum Ratings ...................................... 7
ESD Ratings.............................................................. 7
Recommended Operating Conditions....................... 7
Thermal Information: OPA189 .................................. 8
Thermal Information: OPA2189 ................................ 8
Thermal Information: OPA4189 ................................ 8
Electrical Characteristics........................................... 9
Typical Characteristics ............................................ 11
12.1 Layout Guidelines ................................................. 29
12.2 Layout Example .................................................... 29
13 Device and Documentation Support ................. 30
ADVANCE INFORMATION
13.1
13.2
13.3
13.4
13.5
13.6
13.7
13.8
Detailed Description ............................................ 12
8.1
8.2
8.3
8.4
8.5
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Noise Performance .................................................
Basic Noise Calculations ........................................
Application and Implementation ........................ 20
12
12
13
18
18
Device Support......................................................
Documentation Support ........................................
Related Links ........................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
30
30
30
31
31
31
31
31
14 Mechanical, Packaging, and Orderable
Information ........................................................... 31
4 Revision History
2
DATE
REVISION
NOTES
June 2017
*
Initial release.
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5 Device Comparison Table
FEATURES
PRODUCT
OPA188
5-µV, 0.05-µV/°C, 7-nV/√Hz, 10-MHz, True Rail-to-Rail Input/Output, 5.5-V, Zero-Drift CMOS
OPA388
10-µV, 0.05-µV/°C, 25-µA, Rail-to-Rail Input/Output, 5.5-V, Zero-Drift CMOS
OPA333
25-µV, 0.8-µV/°C, 140-µA, 2.5-MHz, Rail-to-Rail Input/Output, 36-V, e-Trim CMOS
OPA191
120-µV, 10-MHz, 5.1-nV/√Hz, 36-V JFET Input Industrial Op Amp
OPA140
2.2-nV/√Hz, 150-µV, 18-MHz, 36-V Bipolar Op Amp in SOT-23 package
OPA209
ADVANCE INFORMATION
25-µV, 0.085-µV/°C, 8.8-nV/√Hz, Rail-to-Rail Output, 36-V, Zero-Drift CMOS
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6 Pin Configuration and Functions
OPA189 D and DGK Packages
8-Pin SOIC, 8-Pin VSSOP
Top View
±IN
2
+IN
3
V±
4
8
NC
±
7
V+
+
6
OUT
5
NC
OUT
1
V±
2
+IN
3
5
V+
4
±IN
±
1
+
NC
OPA189 DBV Package
5-Pin SOT-23
Top View
Not to scale
Not to scale
NC - No internal connection.
Pin Functions: OPA189
ADVANCE INFORMATION
PIN
OPA189
NAME
I/O
DESCRIPTION
D (SOIC)
DGK (VSSOP)
DBV (SOT-23)
–IN
2
4
I
Inverting input
+IN
3
3
I
Noninverting input
NC
1, 5, 8
—
—
No internal connection (can be left floating)
OUT
6
1
O
Output
V–
4
2
—
Negative (lowest) power supply
V+
7
5
—
Positive (highest) power supply
4
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OPA2189 D and DGK Packages
8-Pin SOIC, 8-Pin VSSOP
Top View
OUT A
1
8
V+
±IN A
2
7
OUT B
+IN A
3
6
±IN B
V±
4
5
+IN B
Not to scale
Pin Functions: OPA2189
I/O
DESCRIPTION
NO.
–IN A
2
I
Inverting input channel A
+IN A
3
I
Noninverting input channel A
–IN B
6
I
Inverting input channel B
+IN B
5
I
Noninverting input channel B
OUT A
1
O
Output channel A
OUT B
7
O
Output channel B
V–
4
—
Negative supply
V+
8
—
Positive supply
ADVANCE INFORMATION
PIN
NAME
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OPA4189 D and PW Packages
14-Pin SOIC, 14-Pin TSSOP
Top View
OUT A
1
14
OUT D
±IN A
2
13
±IN D
+IN A
3
12
+IN D
V+
4
11
V±
+IN B
5
10
+IN C
±IN B
6
9
±IN C
OUT B
7
8
OUT C
Not to scale
ADVANCE INFORMATION
NC - No internal connection.
Pin Functions: OPA4189
PIN
I/O
DESCRIPTION
NAME
NO.
–IN A
2
I
Inverting input channel A
+IN A
3
I
Noninverting input channel A
–IN B
6
I
Inverting input channel B
+IN B
5
I
Noninverting input channel B
–IN C
9
I
Inverting input channel C
+IN C
10
I
Noninverting input channel C
–IN D
13
I
Inverting input channel D
+IN D
12
I
Noninverting input channel D
OUT A
1
O
Output channel A
OUT B
7
O
Output channel B
OUT C
8
O
Output channel C
OUT D
14
O
Output channel D
V–
11
—
Negative supply
V+
4
—
Positive supply
NC
—
—
No internal connection (can be left floating)
6
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
Signal input pins
VS = (V+) – (V–)
Dual-supply
Common-mode
Voltage
±20
(V–) – 0.5
(V+) – (V–) + 0.2
Current
±10
Operating, TA
(2)
Continuous
Continuous
–55
150
Junction, TJ
mA
150
Storage, Tstg
(1)
V
(V+) + 0.5
Differential
Output short circuit (2)
Temperature
UNIT
40
–65
°C
150
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Short-circuit to ground, one amplifier per package.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±4000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
Supply voltage, VS = (V+) – (V–)
Single-supply
Dual-supply
Specified temperature
NOM
MAX
4.5
36
±2.25
±18
–40
125
UNIT
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V
°C
7
ADVANCE INFORMATION
Supply voltage
MAX
Single-supply
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SBOS830 – JUNE 2017
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7.4 Thermal Information: OPA189
OPA189
THERMAL METRIC (1)
D (SOIC)
DGK (VSSOP)
DBV (SOT)
8 PINS
8 PINS
5 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
136
143
205
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
74
47
200
°C/W
RθJB
Junction-to-board thermal resistance
62
64
113
°C/W
ΨJT
Junction-to-top characterization parameter
19.7
5.3
38.2
°C/W
ΨJB
Junction-to-board characterization parameter
54.8
62.8
104.9
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
N/A
N/A
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
7.5 Thermal Information: OPA2189
OPA2189
THERMAL METRIC
(1)
D (SOIC)
DGK (VSSOP)
8 PINS
8 PINS
UNIT
ADVANCE INFORMATION
RθJA
Junction-to-ambient thermal resistance
136
143
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
74
47
°C/W
RθJB
Junction-to-board thermal resistance
62
64
°C/W
ΨJT
Junction-to-top characterization parameter
19.7
5.3
°C/W
ΨJB
Junction-to-board characterization parameter
54.8
62.8
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
N/A
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
7.6 Thermal Information: OPA4189
OPA4189
THERMAL METRIC
(1)
D (SOIC)
PW (TSSOP)
14 PINS
14 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
86
93
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
46
28
°C/W
RθJB
Junction-to-board thermal resistance
41
34
°C/W
ΨJT
Junction-to-top characterization parameter
11.3
1.9
°C/W
ΨJB
Junction-to-board characterization parameter
40.7
33.1
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
N/A
°C/W
(1)
8
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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SBOS830 – JUNE 2017
7.7 Electrical Characteristics
at TA = 25°C, VCM = VOUT = VS / 2, and RLOAD = 10 kΩ connected to VS / 2 (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
±0.4
±2.5
UNIT
OFFSET VOLTAGE
VOS
Input offset voltage
dVOS/dT
Input offset voltage drift
TA = –40°C to 125°C
±0.0035
±0.02
µV/°C
PSRR
Power-supply rejection
ratio
TA = –40°C to 125°C
±0.005
±0.05
µV/V
±70
±300
TA = –40°C to 125°C
µV
±4.5
INPUT BIAS CURRENT
IB
Input bias current
TA = –20°C to 85°C
RIN = 100 kΩ
IOS
Input offset current
±400
TA = –40°C to 125°C
±600
±140
pA
±600
TA = –20°C to 85°C
±800
TA = –40°C to 125°C
±1200
NOISE
Input voltage noise
eN
Input voltage noise density
IN
Input current noise density
17
f = 0.1 Hz to 10 Hz
nVRMS
0.11
f = 10 Hz
5.8
f = 100 Hz
5.8
f = 1 kHz
5.8
f = 10 kHz
5.8
f = 1 kHz
165
ADVANCE INFORMATION
EN
µVPP
nV/√Hz
fA/rtHz
INPUT VOLTAGE
VCM
Common-mode voltage
range
(V–) – 0.1
(V–) – 0.1 V ≤ VCM ≤ (V+) – 2.5 V
CMRR
Common-mode rejection
ratio
(V–) – 0.1 V ≤ VCM ≤ (V+) – 2.5 V
TA = –40°C to 125°C
(V+) – 2.5
VS = ±2.25 V
120
140
VS = ±18 V
146
168
VS = ±18 V
144
156
VS = ±2.25 V
116
130
V
dB
INPUT IMPEDANCE
zid
Differential input
impedance
zic
Common-mode input
impedance
100 || 2
MΩ || pF
60 || 4
TΩ || pF
OPEN-LOOP GAIN
AOL
Open-loop voltage gain
VS = ±18 V, (V–) + 0.3 V < VO < (V+) – 0.3 V, RLOAD = 10 kΩ
150
170
VS = ±18 V, (V–) + 0.3 V < VO < (V+) – 0.3 V, RLOAD = 10 kΩ
TA = –40°C to 125°C
130
160
VS = ±18 V, (V–) + 0.6 V < VO < (V+) – 0.6 V, RLOAD = 2 kΩ
150
170
VS = ±18 V, (V–) + 0.6 V < VO < (V+) – 0.6 V, RLOAD = 2 kΩ
TA = –40°C to 125°C
130
160
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Electrical Characteristics (continued)
at TA = 25°C, VCM = VOUT = VS / 2, and RLOAD = 10 kΩ connected to VS / 2 (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
FREQUENCY RESPONSE
GBW
Gain-bandwith Product
AV = 1000
UGB
Unity-gain Bandwith
AV = 1
SR
Slew rate
G = 1, 10-V step
THD+N
Total harmonic distortion +
noise
G = 1, f = 1 kHz, VO = 3.5 VRMS
tS
Settling time
tOR
Overload recovery time
14
MHz
9
20
V/µs
0.0001%
To 0.1%
VS = ±18 V, G = 1,
10-V step
0.5
To 0.01%
VS = ±18 V, G = 1,
10-V step
1.5
µs
VIN × G = VS
400
ns
OUTPUT
No load
Positive rail
ADVANCE INFORMATION
VO
Voltage output swing from
rail
5
15
RLOAD = 10 kΩ
20
110
RLOAD = 2 kΩ
80
500
No load
Negative rail
5
15
RLOAD = 10 kΩ
20
110
RLOAD = 2 kΩ
80
500
20
110
TA = –40°C to 125°C, both rails, RLOAD = 10 kΩ
ISC
Short-circuit current
CLOAD
Capacitive load drive
ZO
Open-loop output
impedance
f = 1 MHz, IO = 0 A
mV
±65
mA
100
Ω
POWER SUPPLY
VS = ±2.25 V (VS = 4.5 V)
IQ
Quiescent current per
amplifier
VS = ±18 V (VS = 36 V)
IO = 0 A
1.3
1.7
TA = –40°C to 125°C
IO = 0 A
1.3
1.8
IO = 0 A
1.3
1.7
TA = –40°C to 125°C
IO = 0 A
1.3
1.8
mA
TEMPERATURE
TA
Specified range
VS
Specified supply voltage
range
10
–40
125
°C
4.5 (±2.25)
36 (±18)
V
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7.8 Typical Characteristics
Table 1. Typical Characteristic Graphs
DESCRIPTION
FIGURE
Offset Voltage Production Distribution
Figure 1
Offset Voltage Drift Distribution
Figure 2
at VS = ±18 V, VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2, and CL = 100 pF (unless otherwise noted)
45
14
40
12
35
Amplifiers (%)
Amplifiers (%)
10
8
6
4
30
25
20
15
C001
µ = 46.67 nV
σ = 374.5 nV
VOS (maximum) = ±2.5 µV
N = 2554
Figure 1. Offset Voltage Production Distribution
Input Offset Voltage Drift (µV/ƒC)
0.02
0.015
0.01
0.005
0
-0.005
-0.01
-0.015
Input Offset Voltage (µV)
0
-0.02
3
2.5
2
1.5
1
0.5
0
-0.5
-1
-1.5
-2
-2.5
5
-3
0
ADVANCE INFORMATION
10
2
C002
µ = 3.79 nV/°C
σ = 2.11 nV/°C
N = 96
dVOS / dT (maximum) = ±0.02 µV/°C
Figure 2. Offset Voltage Drift Distribution
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8 Detailed Description
8.1 Overview
The OPAx189 operational amplifier combines precision offset and drift with excellent overall performance,
making the device well-suited for many precision applications. The precision offset drift of only 0.0035 µV/°C
provides stability over the entire temperature range. In addition, this device offers excellent linear performance
with high CMRR, PSRR, and AOL. As with all amplifiers, applications with noisy or high-impedance power
supplies require decoupling capacitors close to the device pins. In most cases, 0.1-µF capacitors are adequate.
See Layout Guidelines for details and layout example.
The OPAx189 is part of a family of zero-drift, MUX-friendly, rail-to-rail output operational amplifiers. These
devices operate from 4.5 V to 36 V, are unity-gain stable, and are suitable for a wide range of general-purpose
and precision applications. The zero-drift architecture provides ultra-low input offset voltage and near-zero input
offset voltage drift over temperature and time. This choice of architecture also offers outstanding ac performance,
such as ultra-low broadband noise, zero flicker noise, and outstanding distortion performance when operating
below the chopper frequency.
8.2 Functional Block Diagram
ADVANCE INFORMATION
Figure 3 shows a representation of the proprietary OPAx189 architecture.
Slew Boost
Circuitry
CLK
CLK
CCOMP
+IN
36-V Differential
Front End
OUT
±IN
GM1
GM2
GM3
CCOMP
Ripple Reduction
Technology
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Figure 3. Functional Block Diagram
12
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8.3 Feature Description
The OPA189, OPA2189, and OPA4189 series of op amps can be used with single or dual supplies from an
operating range of VS = 4.5 V (±2.25 V) up to VS = 36 V (±18 V). These devices do not require symmetrical
supplies; they only require a minimum supply voltage of 4.5 V (±2.25 V). For VS less than ±2.5 V, the
common-mode input range does not include midsupply. Supply voltages higher than 40 V can permanently
damage the device; see the Absolute Maximum Ratings table for details. Key parameters are given over the
specified temperature range, TA = –40°C to +125°C, in Electrical Characteristics. Key parameters that vary over
the supply voltage, temperature range, or frequency are shown in Typical Characteristics.
The OPAx189 is unity-gain stable and free from unexpected output phase reversal. This device uses a
proprietary, periodic autocalibration technique to provide low input offset voltage and very low input offset voltage
drift over time and temperature. For lowest offset voltage and precision performance, optimize circuit layout and
mechanical conditions. Avoid temperature gradients that create thermoelectric (Seebeck) effects in the
thermocouple junctions formed from connecting dissimilar conductors. Cancel these thermally-generated
potentials by ensuring they are equal on both input pins. Other layout and design considerations include:
• Use low thermoelectric-coefficient conditions (avoid dissimilar metals).
• Thermally isolate components from power supplies or other heat sources.
Follow these guidelines to reduce the likelihood of junctions being at different temperatures, which may cause
thermoelectric voltages of 0.1 µV/°C or higher, depending on the materials used. See Layout Guidelines for
details and layout example.
8.3.1 Operating Characteristics
The OPAx189 is specified for operation from 4.5 V to 36 V (±2.25 V to ±18 V). Many specifications apply from
–40°C to +125°C. Parameters that can exhibit significant variance with regard to operating voltage or
temperature are presented in the Typical Characteristics section.
8.3.2 Phase-Reversal Protection
The OPAx189 has an internal phase-reversal protection. Many op amps exhibit a phase reversal when the input
is driven beyond the linear common-mode range. This condition is most often encountered in noninverting
circuits when the input is driven beyond the specified common-mode voltage range, causing the output to
reverse into the opposite rail. The OPAx189 input prevents phase reversal with excessive common-mode
voltage. Instead, the output limits into the appropriate rail. This performance is shown in Figure 4.
Output Voltage (5 V/div)
VIN
VOUT
Time (45 ms/div)
C017
Figure 4. No Phase Reversal
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ADVANCE INFORMATION
• Shield operational amplifier and input circuitry from air currents, such as cooling fans.
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Feature Description (continued)
8.3.3 Input Bias Current Clock Feedthrough
Zero-drift amplifiers such as the OPAx189 use switching on the inputs to correct for the intrinsic offset and drift of
the amplifier. Charge injection from the integrated switches on the inputs can introduce short transients in the
input bias current of the amplifier. The extremely short duration of these pulses prevents the pulses from
amplifying, however the pulses may be coupled to the output of the amplifier through the feedback network. The
most effective method to prevent transients in the input bias current from producing additional noise at the
amplifier output is to use a low-pass filter such as an RC network.
8.3.4 EMI Rejection
ADVANCE INFORMATION
The OPAx189 uses integrated electromagnetic interference (EMI) filtering to reduce the effects of EMI
interference from sources such as wireless communications and densely-populated boards with a mix of analog
signal chain and digital components. EMI immunity can be improved with circuit design techniques; the OPAx189
benefits from these design improvements. Texas Instruments has developed the ability to accurately measure
and quantify the immunity of an operational amplifier over a broad frequency spectrum extending from 10 MHz to
6 GHz. Figure 5 shows the results of this testing on the OPAx189. Table 2 lists the EMIRR IN+ values for the
OPAx189 at particular frequencies commonly encountered in real-world applications. Applications listed in
Table 2 may be centered on or operated near the particular frequency shown. Detailed information can also be
found in EMI Rejection Ratio of Operational Amplifiers (SBOA128), available for download from www.ti.com.
The electromagnetic interference (EMI) rejection ratio, or EMIRR, describes the EMI immunity of operational
amplifiers. An adverse effect that is common to many op amps is a change in the offset voltage as a result of RF
signal rectification. An op amp that is more efficient at rejecting this change in offset as a result of EMI has a
higher EMIRR and is quantified by a decibel value. Measuring EMIRR can be performed in many ways, but this
section provides the EMIRR IN+, which specifically describes the EMIRR performance when the RF signal is
applied to the noninverting input pin of the op amp. In general, only the noninverting input is tested for EMIRR for
the following three reasons:
• Op amp input pins are known to be the most sensitive to EMI, and typically rectify RF signals better than the
supply or output pins.
• The noninverting and inverting op amp inputs have symmetrical physical layouts and exhibit nearly matching
EMIRR performance
• EMIRR is more simple to measure on noninverting pins than on other pins because the noninverting input
terminal can be isolated on a PCB. This isolation allows the RF signal to be applied directly to the
noninverting input terminal with no complex interactions from other components or connecting PCB traces.
High-frequency signals conducted or radiated to any pin of the operational amplifier may result in adverse
effects, as the amplifier would not have sufficient loop gain to correct for signals with spectral content outside the
bandwidth. Conducted or radiated EMI on inputs, power supply, or output may result in unexpected DC offsets,
transient voltages, or other unknown behavior. Take care to properly shield and isolate sensitive analog nodes
from noisy radio signals and digital clocks and interfaces.
The EMIRR IN+ of the OPAx189 is plotted versus frequency as shown in Figure 5. If available, any dual and
quad op amp device versions have nearly similar EMIRR IN+ performance. The OPAx189 unity-gain bandwidth
is 14 MHz. EMIRR performance below this frequency denotes interfering signals that fall within the op amp
bandwidth.
14
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Feature Description (continued)
120
EMIRR IN+ (dB)
100
80
60
40
20
0
10M
100M
1G
10G
Frequency (Hz)
C005
Table 2. OPAx189 EMIRR IN+ for Frequencies of Interest
FREQUENCY
APPLICATION AND ALLOCATION
EMIRR IN+
400 MHz
Mobile radio, mobile satellite, space operation, weather, radar, ultra-high frequency
(UHF) applications
48.4 dB
900 MHz
Global system for mobile communications (GSM) applications, radio
communication, navigation, GPS (to 1.6 GHz), GSM, aeronautical mobile, UHF
applications
52.8 dB
1.8 GHz
GSM applications, mobile personal communications, broadband, satellite, L-band
(1 GHz to 2 GHz)
69.1 dB
2.4 GHz
802.11b, 802.11g, 802.11n, Bluetooth®, mobile personal communications,
industrial, scientific and medical (ISM) radio band, amateur radio and satellite, Sband (2 GHz to 4 GHz)
88.9 dB
3.6 GHz
Radiolocation, aero communication and navigation, satellite, mobile, S-band
82.5 dB
802.11a, 802.11n, aero communication and navigation, mobile communication,
space and satellite operation, C-band (4 GHz to 8 GHz)
95.5 dB
5 GHz
8.3.5 EMIRR +IN Test Configuration
Figure 6 shows the circuit configuration for testing the EMIRR IN+. An RF source is connected to the op amp
noninverting input terminal using a transmission line. The op amp is configured in a unity-gain buffer topology
with the output connected to a low-pass filter (LPF) and a digital multimeter (DMM). A large impedance mismatch
at the op amp input causes a voltage reflection; however, this effect is characterized and accounted for when
determining the EMIRR IN+. The multimeter samples and measures the resulting DC offset voltage. The LPF
isolates the multimeter from residual RF signals that may interfere with multimeter accuracy.
Ambient temperature: 25Û&
+VS
±
50
Low-Pass Filter
+
RF source
DC Bias: 0 V
Modulation: None (CW)
Frequency Sweep: 201 pt. Log
-VS
Not shown: 0.1 µF and 10 µF
supply decoupling
Sample /
Averaging
Digital Multimeter
Figure 6. EMIRR +IN Test Configuration
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Figure 5. EMIRR Testing
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8.3.6 Electrical Overstress
Designers often ask questions about the capability of an operational amplifier to withstand electrical overstress.
These questions tend to focus on the device inputs, but may involve the supply voltage pins or even the output
pin. Each of these different pin functions have electrical stress limits determined by the voltage breakdown
characteristics of the particular semiconductor fabrication process and specific circuits connected to the pin.
Additionally, internal electrostatic discharge (ESD) protection is built into these circuits to protect from accidental
ESD events both before and during product assembly.
Having a good understanding of this basic ESD circuitry and the relevance to an electrical overstress event is
helpful. See Figure 7 for an illustration of the ESD circuits contained in the OPAx189 (indicated by the dashed
line area). The ESD protection circuitry involves several current-steering diodes connected from the input and
output pins and routed back to the internal power-supply lines, where the diodes meet at an absorption device
internal to the operational amplifier. This protection circuitry is intended to remain inactive during normal circuit
operation.
An ESD event produces a short-duration, high-voltage pulse that is transformed into a short-duration, highcurrent pulse while discharging through a semiconductor device. The ESD protection circuits are designed to
provide a current path around the operational amplifier core to prevent damage. The energy absorbed by the
protection circuitry is then dissipated as heat.
ADVANCE INFORMATION
When an ESD voltage develops across two or more amplifier device pins, current flows through one or more
steering diodes. Depending on the path that the current takes, the absorption device may activate. The
absorption device has a trigger or threshold voltage that is above the normal operating voltage of the OPAx189
but below the device breakdown voltage level. When this threshold is exceeded, the absorption device quickly
activates and clamps the voltage across the supply rails to a safe level.
When the operational amplifier connects into a circuit (as shown in Figure 7), the ESD protection components are
intended to remain inactive and do not become involved in the application circuit operation. However,
circumstances may arise where an applied voltage exceeds the operating voltage range of a given pin. Should
this condition occur, there is a risk that some internal ESD protection circuits may be biased on, and conduct
current. Any such current flow occurs through steering-diode paths and rarely involves the absorption device.
Figure 7 shows a specific example where the input voltage( VIN) exceeds the positive supply voltage (+VS) by
500 mV or more. Much of what happens in the circuit depends on the supply characteristics. If +VS can sink the
current, one of the upper input steering diodes conducts and directs current to +VS. Excessively high current
levels can flow with increasingly higher VIN. As a result, the data sheet specifications recommend that
applications limit the input current to 10 mA.
If the supply is not capable of sinking the current, VIN may begin sourcing current to the operational amplifier, and
then take over as the source of positive supply voltage. The danger in this case is that the voltage can rise to
levels that exceed the operational amplifier absolute maximum ratings.
Another common question involves what happens to the amplifier if an input signal is applied to the input while
the power supplies +VS or –VS are at 0 V. Again, this question depends on the supply characteristic while at 0 V,
or at a level below the input signal amplitude. If the supplies appear as high impedance, then the operational
amplifier supply current may be supplied by the input source through the current-steering diodes. This state is not
a normal bias condition; the amplifier most likely does not operate normally. If the supplies are low impedance,
then the current through the steering diodes can become quite high. The current level depends on the ability of
the input source to deliver current, and any resistance in the input path.
If there is any uncertainty about the ability of the supply to absorb this current, external zener diodes must be
added to the supply pins, as shown in Figure 7. The zener voltage must be selected such that the diode does not
turn on during normal operation. However, the zener voltage must be low enough so that the zener diode
conducts if the supply pin begins to rise above the safe operating supply voltage level.
16
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(2)
TVS
RF
+VS
+V
RI
ESD CurrentSteering Diodes
-In
(3)
RS
+In
Op Amp
Core
Edge-Triggered ESD
Absorption Circuit
ID
RL
(1)
-V
-VS
(2)
TVS
(1)
VIN = +VS + 500 mV.
(2)
TVS: +VS(max) > VTVSBR (min) > +VS.
(3)
Suggested value is approximately 5 kΩ.
Figure 7. Equivalent Internal ESD Circuitry Relative to a Typical Circuit Application
8.3.7 MUX-Friendly Inputs
The OPAx189 features a proprietary input stage design that allows an input differential voltage to be applied
while maintaining high input impedance. Typically, high-voltage CMOS or bipolar-junction input amplifiers feature
anti-parallel diodes that protect input transistors from large VGS voltages that may exceed the semiconductor
process maximum and permanently damage the device. Large VGS voltages can be forced when applying a large
input step, switching between channels, or attempting to use the amplifier as a comparator.
OPAx189 solves these problems with a switched-input technique which prevents large input bias currents when
large differential voltages are applied. This solves many issues seen in switched or multiplexed applications,
where large disruptions to RC filtering networks are caused by fast switching between large potentials. OPAx189
offers outstanding settling performance due to these design innovations and built-in slew rate boost and wide
bandwidth. The OPAx189 can also be used as a comparator. Differential and common-mode Absolute Maximum
Ratings still apply relative to the power supplies.
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ADVANCE INFORMATION
VIN
Out
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8.4 Noise Performance
Figure 8 shows the total circuit noise for varying source impedances with the operational amplifier in a unity-gain
configuration (with no feedback resistor network and therefore no additional noise contributions). The OPAx189
and OPA211 are shown with total circuit noise calculated. The op amp itself contributes both a voltage noise
component and a current noise component. The voltage noise is commonly modeled as a time-varying
component of the offset voltage. The current noise is modeled as the time-varying component of the input bias
current and reacts with the source resistance to create a voltage component of noise. Therefore, the lowest noise
op amp for a given application depends on the source impedance. For low source impedance, current noise is
negligible, and voltage noise generally dominates. The OPA189, OPA2189, and OPA4189 family has both low
voltage noise and low current noise because of the CMOS input of the op amp. As a result, the current noise
contribution of the OPAx189 series is negligible for any practical source impedance, which makes this device the
better choice for applications with high source impedance.
For more details on calculating noise, see Basic Noise Calculations.
Voltage Noise Spectral Density, EO (V/Hz1/2)
ADVANCE INFORMATION
The equation in Figure 8 shows the calculation of the total circuit noise, with these parameters:
• en = voltage noise
• In = current noise
• RS = source impedance
• k = Boltzmann's constant = 1.38 × 10–23 J/K
• T = temperature in degrees Kelvin (K)
10µ
OPA211
1µ
100n
OPAx189
10n
1n
RS = 3.6 kŸ
Resistor Noise
0.1n
1
10
100
1k
10k
100k
1M
10M
Source Resistance, RS (Ÿ)
Copyright © 2017, Texas Instruments Incorporated
C003
RS = 3.6 kΩ is indicated in Figure 8.
This is the source impedance above which OPAx189 is a lower noise option than the OPA211.
Figure 8. Noise Performance of the OPAx189 and OPA211 in Unity-Gain Buffer Configuration
8.5 Basic Noise Calculations
Low-noise circuit design requires careful analysis of all noise sources. External noise sources can dominate in
many cases; consider the effect of source resistance on overall op amp noise performance. Total noise of the
circuit is the root-sum-square combination of all noise components.
The resistive portion of the source impedance produces thermal noise proportional to the square root of the
resistance. This function is plotted in Figure 8. The source impedance is usually fixed; consequently, select the
op amp and the feedback resistors to minimize the respective contributions to the total noise.
Figure 9 illustrates both noninverting (A) and inverting (B) op amp circuit configurations with gain. In circuit
configurations with gain, the feedback network resistors also contribute noise. In general, the current noise of the
op amp reacts with the feedback resistors to create additional noise components. However, the extremely low
current noise of the OPAx189 means that the current noise contribution can be neglected.
The feedback resistor values can generally be chosen to make these noise sources negligible. Low impedance
feedback resistors load the output of the amplifier. The equations for total noise are shown for both
configurations.
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Basic Noise Calculations (continued)
(A) Noise in Noninverting Gain Configuration
R2
GND
±
EO
+
RS
+
±
VS
Source
GND
'1 = l1 +
:2;
A5 = ¥4 „ G$ „ 6(-) „ 45
d
:3;
A41 æ42 = ¨4 „ G$ „ 6(-) „ d
8
41 „ 42
h d
h
41 + 42
¾*V
Thermal noise of R1 || R2
:4;
G$ = 1.38065 „ 10F23
Boltzmann Constant
:5;
,
h
-
6(-) = 237.15 + 6(°%)
(B) Noise in Inverting Gain Configuration
R1
RS
R2
h
>-?
Thermal noise of RS
Temperature in kelvins
:45 + 41 ; „ 42
42
2
p „ ¨:A0 ;2 + kA41 +45 æ42 o + FE0 „ H
IG
45 + 41
45 + 41 + 42
:6;
'1 = l1 +
+
:7;
:45 + 41 ; „ 42
8
I d
A41 +45 æ42 = ¨4 „ G$ „ 6(-) „ H
h
45 + 41 + 42
¾*V Thermal noise of (R1 + RS) || R2
GND
:8;
G$ = 1.38065 „ 10F23
:9;
6(-) = 237.15 + 6(°%)
±
+
±
d
8
¾*V
> 84/5 ?
Noise at the output is given as EO, where
EO
VS
42
41 „ 42 2
2
p „ ¨:A5 ;2 + :A0 ;2 + kA41 æ42 o + :E0 „ 45 ;2 + lE0 „ d
hp
41
41 + 42
:1;
Source
GND
ADVANCE INFORMATION
R1
Noise at the output is given as EO, where
d
,
h
-
2
> 84/5 ?
Boltzmann Constant
>-?
Temperature in kelvins
Copyright © 2017, Texas Instruments Incorporated
(1)
eN is the voltage noise of the amplifier. For the OPAx189 series of operational amplifiers, eN = 5.8 nV / √Hz at 1 kHz.
(2)
iN is the current noise of the amplifier. For the OPAx189 series of operational amplifiers, iN = 165 fA / √Hz at 1 kHz.
(3)
For additional resources on noise calculations visit TI's Precision Labs Series.
Figure 9. Noise Calculation in Gain Configurations
8.6 Device Functional Modes
The OPAx189 has a single functional mode, and is operational when the power-supply voltage is greater than
4.5 V (±2.25 V). The maximum power supply voltage for the OPAx189 is 36 V (±18 V).
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The OPAx189 operational amplifier combines precision offset and drift with excellent overall performance,
making the series ideal for many precision applications. The precision offset drift of only 0.0035 µV/°C provides
stability over the entire temperature range. In addition, the device pairs excellent CMRR, PSRR, and AOL dc
performance with outstanding low-noise operation. As with all amplifiers, applications with noisy or highimpedance power supplies require decoupling capacitors close to the device pins. In most cases, 0.1-µF
capacitors are adequate.
The following application examples highlight only a few of the circuits where the OPAx189 can be used.
ADVANCE INFORMATION
9.2 Typical Applications
9.2.1 High-Side Voltage-to-Current (V-I) Converter
The circuit shown in Figure 10 is a high-side voltage-to-current (V-I) converter. The converter translates an input
voltage of 0 V to 2 V into an output current of 0 mA to 100 mA. Figure 11 shows the measured transfer function
for this circuit. The low offset voltage and offset drift of the OPAx189 facilitates excellent dc accuracy for the
circuit.
V+
RS2
470
RS3
4.7
IRS2
IRS3
R4
10 k
VRS2
VRS3
C7
2200 pF
R5
330
Q2
+
R3
200
+
Q1
C6
1000 pF
VIN
+
R2
10
±
VRS1
RS1
2k
IRS1
VLOAD
RLOAD
ILOAD
Copyright © 2016, Texas Instruments Incorporated
Figure 10. High-Side Voltage-to-Current (V-I) Converter
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Typical Applications (continued)
9.2.1.1 Design Requirements
The design requirements are:
• Supply voltage: 5 V dc
• Input: 0 V to 2 V dc
• Output: 0 mA to 100 mA dc
9.2.1.2 Detailed Design Procedure
For a successful design, pay close attention to the dc characteristics of the operational amplifier chosen for the
application. To meet the performance goals, this application benefits from an operational amplifier with low offset
voltage, low temperature drift, and rail-to-rail output. The OPAx189 CMOS operational amplifier is a highprecision, ultra-low offset, ultra-low drift amplifier, optimized for low-voltage, single-supply operation, with an
output swing to within 15 mV of the positive rail. The OPAx189 family uses chopping techniques to provide low
initial offset voltage and near-zero drift over time and temperature. Low offset voltage and low drift reduce the
offset error in the system, making this family appropriate for precise dc control. The rail-to-rail output stage of the
OPAx189 makes sure that the output swing of the operational amplifier is able to fully control the gate of the
MOSFET devices within the supply rails.
A detailed error analysis, design procedure, and additional measured results are given in reference design
TIPD102, which is a step-by-step process to design a High-Side Voltage-to-Current (V-I) Converter.
For step-by-step design procedure, circuit schematics, bill of materials, PCB files, simulation results, and test
results, refer to TI Precision Design TIPD102, High-Side Voltage-to-Current (V-I) Converter (SLAU502).
9.2.1.3 Application Curves
Figure 11 shows the measured transfer function for the high-side voltage-to-current converter shown in
Figure 10 .
0.1
Load
Output Current (A)
0.075
0.05
0.025
0
0
0.5
1
Input Voltage (V)
1.5
2
D001
Figure 11. Measured Transfer Function for High-Side V-I Converter
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The V-I transfer function of the circuit is based on the relationship between the input voltage, VIN, and the three
current sensing resistors: RS1, RS2, and RS3. The relationship between VIN and RS1 determines the current that
flows through the first stage of the design. The current gain from the first stage to the second stage is based on
the relationship between RS2 and RS3.
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9.2.2 25-kHz Low-pass Filter
R4
2.94 k
C5
1 nF
R1
590
R3
499
Input
C2
39 nF
±
Output
+
OPAx189
Copyright © 2017, Texas Instruments Incorporated
Figure 12. 25-kHz Low-pass Filter
9.2.2.1 Design Requirements
Low-pass filters are commonly employed in signal processing applications to reduce noise and prevent aliasing.
The OPAx189 devices are ideally suited to construct high-speed, high-precision active filters. Figure 12 shows a
second-order, low-pass filter commonly encountered in signal processing applications.
ADVANCE INFORMATION
Use the following parameters for this design example:
• Gain = 5 V/V (inverting gain)
• Low-pass cutoff frequency = 25 kHz
• Second-order Chebyshev filter response with 3-dB gain peaking in the passband
9.2.2.2 Detailed Design Procedure
The infinite-gain multiple-feedback circuit for a low-pass network function is shown in Figure 12. Use Equation 1
to calculate the voltage transfer function.
1 R1R3C2C5
Output
s
2
Input
s
s C2 1 R1 1 R3 1 R4 1 R3R4C2C5
(1)
This circuit produces a signal inversion. For this circuit, the gain at DC and the low-pass cutoff frequency are
calculated by Equation 2:
R4
Gain
R1
fC
1
2S
1 R3R 4 C2C5
(2)
®
Software tools are readily available to simplify filter design. WEBENCH Filter Designer is a simple, powerful,
and easy-to-use active filter design program. The WEBENCH® Filter Designer lets the user create optimized
filter designs using a selection of TI operational amplifiers and passive components from TI's vendor partners.
Available as a web based tool from the WEBENCH Design Center, WEBENCH Filter Designer allows board-level
designers to create, optimize, and simulate complete multistage active filter solutions within minutes.
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9.2.2.3 Application Curve
20
Gain (db)
0
-20
-40
-60
100
1k
10k
Frequency (Hz)
100k
1M
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Figure 13. OPAx189 Second-Order, 25-kHz, Chebyshev, Low-Pass Filter
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9.2.3 Discrete INA + Attenuation for ADC With 3.3-V Supply
NOTE
The TINA-TI files shown in the following sections require that either the TINA software
(from DesignSoft™) or TINA-TI software be installed. Download the free TINA-TI software
from the TINA-TI folder.
Figure 14 shows an example of how the OPAx189 is used as a high-voltage, high-impedance front-end for a
precision, discrete instrumentation amplifier with attenuation. The INA159 provides the attenuation that allows
this circuit to simply interface with 3.3-V or 5-V analog-to-digital converters (ADCs). Click the following link
download the TINA-TI file: Discrete INA.
15 V
VOUTP
OPAx189
5V
VDIFF / 2
- 15 V
RP
10 NŸ
Ref 1
ADVANCE INFORMATION
VCM
10V
Ref 2
RG
500 Ÿ
+
VOUT(1)
INA159
Sense
15 V
±VDIFF / 2
OPAx189
RN
10 NŸ
VOUTN
15 V
Copyright © 2017, Texas Instruments Incorporated
(1)
VOUT = VDIFF × (41 / 5) + (Ref 1) / 2.
Figure 14. Discrete INA + Attenuation for ADC With 3.3-V Supply
9.2.4 Bridge Amplifier
Figure 15 shows the basic configuration for a bridge amplifier. Click the following link to download the TINA-TI
file: Bridge Amplifier Circuit.
VEX
R1
R
R
R
R
+5V
VOUT
VREF
Copyright © 2017, Texas Instruments Incorporated
Figure 15. Bridge Amplifier
9.2.5 Low-Side Current Monitor
Figure 16 shows the OPAx189 configured in a low-side current-sensing application. The load current (ILOAD)
creates a voltage drop across the shunt resistor (RSHUNT). This voltage is amplified by the OPAx189, with a gain
of 201. The load current is set from 0 A to 500 mA, which corresponds to an output voltage range from 0 V to 10
V. The output range can be adjusted by changing the shunt resistor or gain of the configuration. Click the
following link to download the TINA-TI file: Current-Sensing Circuit.
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OPA189, OPA2189, OPA4189
www.ti.com
SBOS830 – JUNE 2017
VSYSTEM
Load
15 V
+
VOUT = ILOAD * RSHUNT(1 + RF / RIN)
OPAx189
RSHUNT
100 m
VOUT / ILOAD= 1 V / 49.75 mA
±
RIN
RF
100
20 k
CF
Copyright © 2017, Texas Instruments Incorporated
150
pF
Figure 16. Low-Side Current Monitor
9.2.6 Programmable Power Supply
Figure 17 shows the OPAx189 configured as a precision programmable power supply using the 16-bit, voltage
output DAC8581 and the OPA548 high-current amplifier. This application amplifies the digital-to-analog converter
(DAC) voltage by a value of five, and handles a large variety of capacitive and current loads. The OPAx189 in
the front-end provides precision and low drift across a wide range of inputs and conditions. Click the following
link to download the TINA-TI file: Programmable Power-Supply Circuit.
C1
500 nF
R1
10 k
R4
40 k
R2
1k
GND
C2
500 nF
+30V
+15V
±
OPAx189
+
DAC8581
±
R3
10 k
OPA548
+
VOUT
Output = ± 25V
±30V
±15V
Input = ± 5V
Copyright © 2017, Texas Instruments Incorporated
Figure 17. Programmable Power Supply
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ADVANCE INFORMATION
ILOAD
VOUT
OPA189, OPA2189, OPA4189
SBOS830 – JUNE 2017
www.ti.com
9.2.7 RTD Amplifier With Linearization
See Analog Linearization Of Resistance Temperature Detectors (SLYT442) for an in-depth analysis of Figure 18.
Click the following link to download the TINA-TI file: RTD Amplifier with Linearization.
15 V
(5 V)
Out
REF5050
In
1 µF
1 µF
R2
49.1 kŸ
R3
60.4 kŸ
R1
4.99 kŸ
OPAx189
V OUT
0°C = 0 V
200°C = 5 V
R5
(1)
105.8 kŸ
RTD
Pt100
ADVANCE INFORMATION
R4
1 kŸ
Copyright © 2017, Texas Instruments Incorporated
(1)
R5 provides positive-varying excitation to linearize output.
Figure 18. RTD Amplifier With Linearization
26
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Product Folder Links: OPA189 OPA2189 OPA4189
OPA189, OPA2189, OPA4189
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SBOS830 – JUNE 2017
10 System Examples
10.1 24-Bit, Delta-Sigma, Differential Load Cell or Strain Gauge Sensor Signal Conditioning
OPAx189 is used in a 24-bit, differential load cell or strain gauge sensor signal conditioning system alongside the
ADS1225. A pair of OPAx189 amplifiers are configured in a two-amp instrumentation amplifier (IA) configuration
and are band-limited to reduce noise and allow heavy capacitive drive. The load cell is powered by an excitation
voltage (denoted VEX) of 5-V and provides a differential voltage proportional to force applied. The differential
voltage can be quite small and both outputs are biased to VEX / 2.
G=1+
C4
0.1 nF
2 ® RF
RG
C5
0.1 µF
C6
0.1 nF
GND
GND
+
GND
GND
OPAx189
VREFN
±
RTRACE
VREFP
C1
10 µF
RF
10 k
+OUT
+SENSE
DVDD
R1
1k
-SENSE
+5V
AINP1
GND
DVDD
SCLK
DRDY / DOUT
RG
50
C2
1 µF
CF
1 µF
+
+3V
START
CF
1 µF
±
+5V
RTRACE
+15V
VEX
AVDD
ADS1225
R2
1k
Load Cell
MSP430xxx
or other host
AINN1
±OUT
MODE
+3V
BUFEN
RF
10 k
GND
TEMPEN
C3
10 µF
+15V
±
GND
GND
GND
OPAx189
+
GND
Copyright © 2017, Texas Instruments Incorporated
Figure 19. 24-Bit, Differential Load Cell or Strain Gauge Sensor Signal Conditioning Schematic
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ADVANCE INFORMATION
OPAx189 is employed here due to the excellent input offset voltage (0.4-µV) and input offset voltage drift
(0.0035-µV/°C), the low broadband noise (5.8-nV/√Hz) and zero-flicker noise, and excellent linearity and high
input impedance. The two-amp IA configuration removes the dc bias and amplifies the differential signal of
interest and drives the 24-bit, delta-sigma ADS1225 analog-to-digital converter (ADC) for acquisition and
conversion. The ADS1225 features a 100-SPS data rate, single-cycle settling, and simple conversion control with
the dedicated START pin.
OPA189, OPA2189, OPA4189
SBOS830 – JUNE 2017
www.ti.com
11 Power Supply Recommendations
The OPAx189 is specified for operation from 4.5 V to 36 V (±2.25 V to ±18 V); many specifications apply from
–40°C to +125°C. The Typical Characteristics presents parameters that can exhibit significant variance with
regard to operating voltage or temperature.
CAUTION
Supply voltages larger than 40 V can permanently damage the device (see the
Absolute Maximum Ratings).
Place 0.1-μF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or
high-impedance power supplies. For more detailed information on bypass capacitor placement, see the Layout
section.
ADVANCE INFORMATION
28
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OPA189, OPA2189, OPA4189
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SBOS830 – JUNE 2017
12 Layout
For best operational performance of the device, use good PCB layout practices, including:
• Noise can propagate into analog circuitry through the power pins of the circuit as a whole and the op amp
itself. Bypass capacitors reduce the coupled noise by providing low-impedance power sources local to the
analog circuitry.
– Connect low-ESR, 0.1-µF ceramic bypass capacitors between each supply pin and ground, placed as
close as possible to the device. A single bypass capacitor from V+ to ground is applicable for singlesupply applications.
• Separate grounding for analog and digital portions of circuitry is one of the simplest and most effective
methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground
planes. A ground plane helps distribute heat and reduces EMI noise pickup. Make sure to physically
separate digital and analog grounds paying attention to the flow of the ground current. For more detailed
information, see The PCB is a component of op amp design'.
• To reduce parasitic coupling, run the input traces as far away as possible from the supply or output
traces. If these traces cannot be kept separate, crossing the sensitive trace perpendicular is much better
as opposed to in parallel with the noisy trace.
• Place the external components as close as possible to the device. As illustrated in Figure 20, keeping RF
and RG close to the inverting input minimizes parasitic capacitance.
• Keep the length of input traces as short as possible. Always remember that the input traces are the most
sensitive part of the circuit.
• Consider a driven, low-impedance guard ring around the critical traces. A guard ring can significantly
reduce leakage currents from nearby traces that are at different potentials.
• For best performance, TI recommends cleaning the PCB following board assembly.
• Any precision integrated circuit may experience performance shifts due to moisture ingress into the
plastic package. Following any aqueous PCB cleaning process, TI recommends baking the PCB
assembly to remove moisture introduced into the device packaging during the cleaning process. A low
temperature, post cleaning bake at 85°C for 30 minutes is sufficient for most circumstances.
12.2 Layout Example
GND
+V
R3
Use ground pours for
shielding the input
signal pairs
Place bypass
capacitors as close to
device as possible
(avoid use of vias)
C3
C4
C3
R3
IN±
1
NC
NC
C4
8
IN±
IN+
1
NC
NC
8
2
±IN
V+
7
3
+IN
OUT
6
4
V±
NC
5
+V
R1
R1
2
±IN
±
V+
7
3
+IN
+
OUT
6
R2
4
V±
NC
5
OUT
OUT
R2
-V
C1
IN+
R4
GND
R4
C2
Place components
close to device and to
each other to reduce
parasitic errors
C1
-V
Use a lowESR,ceramic bypass
capacitor
C2
Copyright © 2017, Texas Instruments Incorporated
Figure 20. Operational Amplifier Board Layout for Difference Amplifier Configuration
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ADVANCE INFORMATION
12.1 Layout Guidelines
OPA189, OPA2189, OPA4189
SBOS830 – JUNE 2017
www.ti.com
13 Device and Documentation Support
13.1 Device Support
13.1.1 Development Support
13.1.1.1 TINA-TI™ (Free Software Download)
TINA-TI™ is a simple, powerful, and easy-to-use circuit simulation program based on a SPICE engine. TINATI™ is a free, fully-functional version of the TINA™ software, preloaded with a library of macromodels in addition
to a range of both passive and active models. TINA-TI™ provides all the conventional dc, transient, and
frequency domain analysis of SPICE, as well as additional design capabilities.
Available as a free download from the Analog eLab Design Center, TINA-TI™ offers extensive post-processing
capability that allows users to format results in a variety of ways. Virtual instruments offer the ability to select
input waveforms and probe circuit nodes, voltages, and waveforms, creating a dynamic quick-start tool.
NOTE
These files require that either the TINA software (from DesignSoft™) or TINA-TI™
software be installed. Download the free TINA-TI™ software from the TINA-TI™ folder.
ADVANCE INFORMATION
13.1.1.2 TI Precision Designs
TI Precision Designs are available online at http://www.ti.com/ww/en/analog/precision-designs/. TI Precision
Designs are analog solutions created by TI’s precision analog applications experts and offer the theory of
operation, component selection, simulation, complete PCB schematic and layout, bill of materials, and measured
performance of many useful circuits.
13.2 Documentation Support
13.2.1 Related Documentation
For related documentation see the following:
• Zero-drift Amplifiers: Features and Benefits (SBOA182)
• The PCB is a component of op amp design (SLYT166)
• Operational amplifier gain stability, Part 3: AC gain-error analysis (SLTY383)
• Operational amplifier gain stability, Part 2: DC gain-error analysis (SLYT374)
• Using infinite-gain, MFB filter topology in fully differential active filters (SLYT343)
• Op Amp Performance Analysis (SBOA054)
• Single-Supply Operation of Operational Amplifiers (SBOA059)
• Tuning in Amplifiers (SBOA067)
• Shelf-Life Evaluation of Lead-Free Component Finishes (SZZA046)
• Feedback Plots Define Op Amp AC Performance (SBOA015)
• EMI Rejection Ratio of Operational Amplifiers (SBOA128)
13.3 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 3. Related Links
30
PARTS
PRODUCT FOLDER
ORDER NOW
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
OPA189
Click here
Click here
Click here
Click here
Click here
OPA2189
Click here
Click here
Click here
Click here
Click here
OPA4189
Click here
Click here
Click here
Click here
Click here
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OPA189, OPA2189, OPA4189
www.ti.com
SBOS830 – JUNE 2017
13.4 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
13.5 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
TINA-TI, E2E are trademarks of Texas Instruments.
WEBENCH is a registered trademark of Texas Instruments.
Bluetooth is a registered trademark of Bluetooth SIG, Inc.
DesignSoft, TINA are trademarks of DesignSoft, Inc.
All other trademarks are the property of their respective owners.
13.7 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
13.8 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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ADVANCE INFORMATION
13.6 Trademarks
PACKAGE OPTION ADDENDUM
www.ti.com
11-Aug-2017
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
OPA189ID
PREVIEW
SOIC
D
8
75
TBD
Call TI
Call TI
-40 to 125
OPA189IDR
PREVIEW
SOIC
D
8
2500
TBD
Call TI
Call TI
-40 to 125
OPA2189ID
PREVIEW
SOIC
D
8
75
TBD
Call TI
Call TI
-40 to 125
OPA2189IDGKR
PREVIEW
VSSOP
DGK
8
2500
TBD
Call TI
Call TI
-40 to 125
OPA2189IDGKT
PREVIEW
VSSOP
DGK
8
250
TBD
Call TI
Call TI
-40 to 125
OPA2189IDR
PREVIEW
SOIC
D
8
2500
TBD
Call TI
Call TI
-40 to 125
POPA189ID
ACTIVE
SOIC
D
8
75
TBD
Call TI
Call TI
-40 to 125
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
11-Aug-2017
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
IMPORTANT NOTICE
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TI’s published terms of sale for semiconductor products (http://www.ti.com/sc/docs/stdterms.htm) apply to the sale of packaged integrated
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Designers agree that it has the necessary expertise to select the product with the appropriate qualification designation for their applications
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Designer will fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of Designer’s noncompliance with the terms and provisions of this Notice.
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