Fairchild MM74C164 8-bit parallel-out serial shift register Datasheet

Revised January 2004
MM74C164
8-Bit Parallel-Out Serial Shift Register
General Description
Features
The MM74C164 shift registers are a monolithic complementary MOS (CMOS) integrated circuit constructed with
N- and P-channel enhancement transistors. These 8-bit
shift registers have gated serial inputs and clear. Each register bit is a D-type master/slave flip-flop. A high-level input
enables the other input which will then determine the state
of the flip-flop.
■ Supply voltage range:
Data is serially shifted in and out of the 8-bit register during
the positive going transition of clock pulse. Clear is independent of the clock and accomplished by a low level at the
clear input. All inputs are protected against electrostatic
effects.
3V to 15V
■ Tenth power TTL compatible:
drive 2 LPTTL loads
■ High noise immunity: 0.45 VCC (typ.)
■ Low power:
50 nW (typ.)
■ Medium speed operation: 0.8 MHz (typ.) with 10V
supply
Applications
• Data terminals
• Instrumentation
• Medical electronics
• Alarm systems
• Industrial electronics
• Remote metering
• Computers
Ordering Code:
Order Number
Package Number
Package Description
MM74C164M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
MM74C164N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Connection Diagram
Truth Table
Serial Inputs A and B
Inputs
Output
tn+1
tn
A
B
QA
1
1
1
0
1
0
1
0
0
0
0
0
Top View
© 2004 Fairchild Semiconductor Corporation
DS005896
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MM74C164 8-Bit Parallel-Out Serial Shift Register
October 1987
MM74C164
Block Diagram
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2
MM74C164
Absolute Maximum Ratings(Note 1)
Voltage at Any Pin
−0.3V to VCC + 0.3V
Operating Temperature Range
−55°C to +125°C
Storage Temperature Range
−65°C to +150°C
18V
Absolute Maximum VCC
Power Dissipation (PD)
Dual-In-Line
700 mW
Small Outline
500 mW
Operating VCC Range
Note 1: “Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed. Except for “Operating Temperature Range” they are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” provides
conditions for actual device operation.
3V to 15V
Lead Temperature
260°C
(soldering, 10 seconds)
DC Electrical Characteristics
Min/Max limits apply across temperature range unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CMOS TO CMOS
VIN(1)
VIN(0)
VOUT(1)
VOUT(0)
Logical “1” Input Voltage
Logical “0” Input Voltage
Logical “1” Output Voltage
Logical “0” Output Voltage
VCC = 5V
3.5
VCC = 10V
8.0
V
VCC = 5V
1.5
VCC = 10V
2.0
VCC = 5V, IO = −10 µA
4.5
VCC = 10V, IO = −10 µA
9.0
V
VCC = 5V, IO = +10 µA
0.5
VCC = 10V, IO = +10 µA
1.0
IIN(1)
Logical “1” Input Current
VCC = 15V, VIN = 15V
IIN(0)
Logical “0” Input Current
VCC = 15V, VIN = 0V
ICC
Supply Current
VCC = 15V
0.005
−1.0
V
1.0
−0.005
0.05
V
µA
µA
300
µA
0.8
V
CMOS TO LPTTL INTERFACE
VIN(1)
Logical “1” Input Voltage
VCC = 4.75V
VIN(0)
Logical “0” Input Voltage
VCC = 4.75V
VCC − 1.5
VOUT(1)
Logical “1” Output Voltage
VCC = 4.75V, IO = −360 µA
VOUT(0)
Logical “0” Output Voltage
VCC = 4.75V, IO = 360 µA
V
2.4
V
0.4
V
OUTPUT DRIVE (See Family Characteristics Data Sheet) (Short Circuit Current)
ISOURCE
Output Source Current
VCC = 5V, VIN(0) = 0V
ISOURCE
Output Source Current
VCC = 10V, VIN(0) = 0V
ISINK
Output Sink Current
VCC = 5V, VIN(1) = 5V
ISINK
Output Sink Current
VCC = 10V, VIN(1) = 10V
TA = 25°C, VOUT = 0V
TA = 25°C, VOUT = 0V
TA = 25°C, VOUT = V CC
TA = 25°C, VOUT = V CC
3
−1.75
mA
−8.0
mA
1.75
mA
8.0
mA
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MM74C164
AC Electrical Characteristics
(Note 2)
TA = 25°C, CL = 50 pF, unless otherwise noted
Symbol
tpd1
tpd0
Typ
Max
Propagation Delay Time to a Logical “0” or a
Parameter
VCC = 5V
230
310
Logical “1” from Clock to Q
VCC = 10V
90
120
tH
fMAX
tW
tr, tf
Min
Propagation Delay Time to a Logical “0” from VCC = 5V
Clear to Q
tS
Conditions
VCC = 10V
280
380
110
150
Time Prior to Clock Pulse that Data
VCC = 5V
200
110
Must be Present
VCC = 10V
80
30
Time After Clock Pulse that
VCC = 5V
0
0
Data Must be Held
VCC = 10V
0
0
Maximum Clock Frequency
VCC = 5V
2.0
3
VCC = 10V
5.5
8
Minimum Clear Pulse Width
Maximum Clock Rise and Fall Time
MHz
150
250
55
90
15
5
CIN
Input Capacitance
Any Input (Note 3)
CPD
Power Dissipation Capacitance
(Note 4)
ns
ns
VCC = 5V
VCC = 5V
ns
ns
VCC = 10V
VCC = 10V
Units
ns
µs
5
pF
140
pF
Note 2: AC Parameters are guaranteed by DC correlated testing.
Note 3: Capacitance is guaranteed by periodic testing.
Note 4: CPD determines the no load AC power consumption of any CMOS device. For complete explanation see Family Characteristics application note
AN-90.
Typical Applications
74C Compatibility
Guaranteed Noise Margin
as a Function of VCC
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MM74C164
Logic Waveform
AC Test Circuit
Switching Time Waveforms
CMOS to CMOS
TTL to CMOS
tr = tf = 20 ns
5
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MM74C164
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M14A
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6
MM74C164 8-Bit Parallel-Out Serial Shift Register
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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