HAF2015RJ Silicon N Channel MOS FET Series Power Switching REJ03G1141-0300 Rev.3.00 Aug 27, 2007 Description This FET has the over temperature shut-down capability sensing to the junction temperature. This FET has the built-in over temperature shut-down circuit in the gate area. And this circuit operation to shut-down the gate voltage in case of high junction temperature like applying over power consumption, over current etc. Features • • • • • Logic level operation (5 to 6 V Gate drive) High endurance capability against to the short circuit Built-in the over temperature shut-down circuit Temperature hysteresis type. High density mounting. Outline RENESAS Package code: PRSP0008DD-A (Package name: SOP-8 <FP-8DA> ) 87 RENESAS Package code: PRSP0008DD-D (Package name: SOP-8 <FP-8DAV> ) 65 87 12 34 12 7 34 D D 8 5 2 4 Gate resistor Tmperature sensing circuit 1, 3 2, 4 5, 6, 7, 8 D D G 65 Self return circuit Gate resistor G Gate shutdown circuit Tmperature sensing circuit Self return circuit Gate shutdown circuit 1 MOS1 S REJ03G1141-0300 Rev.3.00 Aug 27, 2007 Page 1 of 9 3 MOS2 S 6 Source Gate Drain HAF2015RJ Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Symbol VDSS VGSS VGSS ID Drain current Drain peak current Body-drain diode reverse drain current Avalanche current Avalanche energy Channel dissipation Channel dissipation Channel temperature Storage temperature Notes: 1. 2. 3. 4. Value 60 16 –2.5 2 4 2 0.54 25 2 1.5 150 –55 to +150 ID (pulse) Note 1 IDR IAP Note 4 EAR Note 4 Pch Note 2 Pch Note 3 Tch Tstg Unit V V V A A A A mJ W W °C °C PW ≤ 10 µs, duty cycle ≤ 1% 1 Drive operation: When using the glass epoxy board (FR4 40 × 40 × 1.6 mm), PW ≤ 10 s 2 Drive operation: When using the glass epoxy board (FR4 40 × 40 × 1.6 mm), PW ≤ 10 s Tch = 25°C, Rg > 50 Ω Typical Operation Characteristics Item Input voltage Input current (Gate non shut down) Input current (Gate shut down) Shut down temperature Hysteresis temperature Gate operation voltage Symbol VIH VIL IIH1 IIH2 IIL IIH (sd) 1 IIH (sd) 2 Tsd Thr VOP REJ03G1141-0300 Rev.3.00 Aug 27, 2007 Page 2 of 9 Min 3.5 — — — — — — — — 3.5 Typ — — — — — 0.53 0.2 175 120 — Max — 1.2 100 50 1 — — — — 12 Unit V V µA µA µA mA mA °C °C V Test Conditions Vi = 5 V, VDS = 0 Vi = 3.5 V, VDS = 0 Vi = 1.2 V, VDS = 0 Vi = 8 V, VDS = 0 Vi = 3.5 V, VDS = 0 Channel temperature Channel temperature HAF2015RJ Electrical Characteristics (Ta = 25°C) Item Symbol ID1 ID2 V (BR) DSS V (BR) GSS V (BR) GSS IGSS1 IGSS2 IGSS3 IGSS4 IGS (op) 1 IGS (op) 2 IDSS1 IDSS2 Min 0.7 — 60 16 –2.5 — — — — — — — — Typ — — — — — — — — — 0.53 0.2 — — Max — 10 — — — 100 50 1 –100 — — 10 10 Unit A mA V V V µA µA µA µA mA mA µA µA VGS (off) RDS (on) RDS (on) |yfs| Coss 1.4 — — 0.5 — — 130 110 2.5 139 2.5 200 160 — — V mΩ mΩ S pF Turn-on delay time Rise time Turn-off delay time Fall time Body-drain diode forward voltage Body-drain diode reverse recovery time td (on) tr td (off) tf VDF trr — — — — — — 4.2 20 1 1 0.82 55 — — — — — — µs µs µs µs V ns Over load shut down operation time Note6 tos1 — 15 — ms Drain current Drain to source breakdown voltage Gate to source breakdown voltage Gate to source leak current Input current (shut down) Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Output capacitance Notes: 5. Pulse test 6. Including the junction temperature rise of the over loaded condition. REJ03G1141-0300 Rev.3.00 Aug 27, 2007 Page 3 of 9 Test Conditions VGS = 3.5 V, VDS = 2 V VGS = 1.2 V, VDS = 2 V ID = 10 mA, VGS = 0 IG = 500 µA, VDS = 0 IG = –100 µA, VDS = 0 VGS = 5 V, VDS = 0 VGS = 3.5 V, VDS = 0 VGS = 1.2 V, VDS = 0 VGS = –2.4 V, VDS = 0 VGS = 8 V, VDS = 0 VGS = 3.5 V, VDS = 0 VDS = 60 V, VGS = 0 VDS = 48 V, VGS = 0 Ta = 125°C ID = 1 mA, VDS = 10 V ID = 1 A, VGS = 5 V Note 5 ID = 1 A, VGS = 10 V Note 5 ID = 1 A, VDS = 10 V Note 5 VDS = 10 V, VGS = 0 f = 1 MHz ID = 1 A VGS = 5 V RL = 30 Ω IF = 2 A, VGS = 0 IF = 2 A, VGS = 0 diF/dt = 50 A/µs VGS = 5 V, VDD = 16 V HAF2015RJ Main Characteristics Power vs. Temperature Derating Maximum Safe Operation Area 50 Test Condition: When using the glass epoxy board (FR4 40 × 40 × 1.6 mm), PW < 10 s 2.0 2 Dr ive 1D riv 1.0 eO pe Op e rat ra tio n ID (A) 3.0 Thermal shut down 20 Operation area 10 Drain Current Channel Dissipation Pch (W) 4.0 2 ion 0 0 50 100 150 200 10 0 µs 5 1 DC Op PW m s = 1 Operation in 10 er at ms 0.5 this area is ion (P limited by RDS (on) W Note ≤ 0.2 10 7 Ta = 25°C s) 0.1 1 shot pulse 0.05 1 Drive Operation 0.03 0.3 0.5 1 2 5 10 20 50 100 Drain to Source Voltage VDS (V) Ambient Temperature Ta (°C) Note 7: When using the glass epoxy board (FR4 40 × 40 × 1.6 mm) Typical Output Characteristics 5 2.5 Pulse Test 10 V 8V 6V 5V 4 ID (A) ID (A) Typical Transfer Characteristics Tc = –25°C 25°C 75°C 1.5 Drain Current 3 Drain Current 2.0 4V 2 VGS = 3.5 V 1 1.0 0.5 VDS = 10 V Pulse Test 0 0 0 2 4 6 Drain to Source Voltage 8 10 0 0.20 0.15 ID = 1 A 0.10 0.5 A 0.05 0.2 A 0 0 2 4 6 8 10 Gate to Source Voltage VGS (V) REJ03G1141-0300 Rev.3.00 Aug 27, 2007 Page 4 of 9 3 4 5 VGS (V) Static Drain to Source on State Resistance vs. Drain Current Drain to Source on State Resistance RDS (on) (mΩ) Drain to Source Saturation Voltage VDS (on) (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage Pulse Test 2 Gate to Source Voltage VDS (V) 0.25 1 500 200 VGS = 5 V 100 10 V 50 20 Pulse Test 10 0.1 0.2 0.5 1 2 Drain Current 5 ID (A) 10 20 Static Drain to Source on State Resistance vs. Temperature 0.25 Pulse Test 0.5 A 0.2 A ID = 1 A 0.20 VGS = 5 V 0.15 ID = 1 A 0.2 A 0.10 0.5 A 10 V 0.05 0 –40 0 40 80 Case Temperature 120 160 Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance |yfs| (S) Static Drain to Source on State Resistance RDS (on) (mΩ) HAF2015RJ 10 VDS = 10 V Pulse Test 5 Tc = –25°C 25°C 2 1 75°C 0.5 0.2 0.1 0.05 0.1 Tc (°C) 1 2 5 Switching Characteristics 100 500 VGS = 5 V, VDD = 30 V 50 PW = 300 µs, duty ≤ 1 % Switching Time t (µs) Reverse Recovery Time trr (ns) 0.5 Drain Current ID (A) Body-Drain Diode Reverse Recovery Time 200 100 50 20 di / dt = 50 A / µs VGS = 0, Ta = 25°C 10 0.01 0.02 0.05 0.1 0.2 0.5 Reverse Drain Current 1 2 tr 20 10 td(on) 5 2 1 0.5 0.01 0.02 0.05 0.1 0.2 5 tf td(off) IDR (A) 0.5 1 Drain Current 2 5 ID (A) Typical Capacitance vs. Drain to Source Voltage Reverse Drain Current vs. Source to Drain Voltage 5 1000 Pulse Test VGS = 5 V 4 Capacitance C (pF) Reverse Drain Current IDR (A) 0.2 3 0V 2 1 300 100 30 VGS = 0 f = 1 MHz 0 10 0 0.4 0.8 1.2 1.6 2.0 Source to Drain Voltage VSD (V) REJ03G1141-0300 Rev.3.00 Aug 27, 2007 Page 5 of 9 0 10 20 30 40 50 Drain to Source Voltage VDS (V) HAF2015RJ Shutdown Case Temperature vs. Gate to Source Voltage Shutdown Case Temperature Tc (°C) Gate to Source Voltage VGS (V) Gate to Source Voltage vs. Shutdown Time of Load-Short Test 12 10 8 VDD = 16 V 6 4 2 0 0.0001 0.001 0.01 0.1 1 200 180 160 140 120 ID = 0.2 A 100 0 Shutdown Time of Load-Short Test PW (S) 2 4 6 8 Gate to Source Voltage Normalized Transient Thermal Impedance γ s (t) Normalized Transient Thermal Impedance vs. Pulse Width (1 Drive Operation) 10 1 D=1 0.5 0.1 0.2 0.1 θch – f (t) = γ s (t) • θch – f θch – f = 125°C/W, Ta = 25°C When using the glass epoxy board (FR4 40 × 40 × 1.6 mm) 0.05 0.01 0.02 0.01 0.001 1s ho 0.0001 10 µ tp D= PDM e uls PW T PW T 100 µ 1m 10 m 100 m 1 10 100 1000 10000 Pulse Width PW (S) Normalized Transient Thermal Impedance γ s (t) Normalized Transient Thermal Impedance vs. Pulse Width (2 Drive Operation) 10 1 D=1 0.5 0.1 0.2 0.1 θch – f (t) = γ s (t) • θch – f θch – f = 166°C/W, Ta = 25°C When using the glass epoxy board (FR4 40 × 40 × 1.6 mm) 0.05 0.01 0.02 0.01 0.001 0.0001 10 µ 1s ho t ls pu 100 µ D= PDM e PW T PW T 1m 10 m 100 m 1 Pulse Width PW (S) REJ03G1141-0300 Rev.3.00 Aug 27, 2007 Page 6 of 9 10 100 1000 10 VGS (V) 10000 HAF2015RJ Switching Time Test Circuit Waveform 90% Vout Monitor Vin Monitor D.U.T. Vin 10% RL Vout Vin 5V 50 Ω VDD = 30 V 10% 90% td(on) REJ03G1141-0300 Rev.3.00 Aug 27, 2007 Page 7 of 9 10% tr 90% td(off) tf HAF2015RJ Package Dimensions JEITA Package Code P-SOP8-3.95 × 4.9-1.27 RENESAS Code PRSP0008DD-A Previous Code FP-8DA MASS[Typ.] 0.085g F Package Name SOP-8 *1 D bp b1 1 Z c1 c *2 E Index mark HE 5 8 4 Terminal cross section *3 bp NOTE) 1. DIMENSIONS "*1(Nom)" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. x M e Reference Symbol A A1 L1 L Detail F y JEITA Package Code P-SOP8-3.95 × 4.9-1.27 RENESAS Code PRSP0008DD-D Previous Code FP-8DAV HE e x y Z L L1 Min Nom Max 4.90 5.3 3.95 0.10 0.14 0.25 1.75 0.34 0.42 0.50 0.40 0.19 0.22 0.25 0.20 0° 8° 5.80 6.10 6.20 1.27 0.25 0.1 0.75 0.40 0.60 1.27 1.08 MASS[Typ.] 0.085g F Package Name SOP-8 D E A2 A1 A bp b1 c c1 Dimension in Millimeters *1 D bp 1 c *2 E Index mark HE 5 8 4 Z Terminal cross section (Ni/Pd/Au plating) * 3 bp x M NOTE) 1. DIMENSIONS "*1(Nom)" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. e Reference Symbol A1 A L1 L y Detail F REJ03G1141-0300 Rev.3.00 Aug 27, 2007 Page 8 of 9 D E A2 A1 A bp b1 c c1 HE e x y Z L L1 Dimension in Millimeters Min Nom Max 4.90 5.3 3.95 0.10 0.14 0.25 1.75 0.34 0.40 0.46 0.15 0.20 0.25 0° 8° 5.80 6.10 6.20 1.27 0.25 0.1 0.75 0.40 0.60 1.27 1.08 HAF2015RJ Ordering Information Part No. HAF2015RJ-EL Quantity 2500 pcs/Reel REJ03G1141-0300 Rev.3.00 Aug 27, 2007 Page 9 of 9 Shipping Container Embossed tape Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Notes: 1. This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use. 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