TI1 LM3668 1a, high efficiency dual mode single inductor buck-boost dc/dc converter Datasheet

LM3668
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SNVS449L – JUNE 2007 – REVISED MARCH 2011
LM3668 1A, High Efficiency Dual Mode Single Inductor Buck-Boost DC/DC Converter
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FEATURES
APPLICATIONS
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45µA Typical Quiescent Current
For 2.8V/3.3V and 3.0/3.4V Versions:
– 1A Maximum Load Current for
VIN = 2.8V to 5.5V
– 800mA Maximum Load Current for
VIN = 2.7V
– 600mA Maximum Load Current for
VIN = 2.5V
For 4.5/5V
– 1A Maximum Load Current for
VIN = 3.9V to 5.5V
– 800mA Maximum Load Current for
VIN = 3.4V to 3.8V
– 700mA Maximum Load Current for
VIN = 3.0V to 3.3V
– 600mA Maximum Load Current for
VIN = 2.7V to 2.9V
2.2MHz PWM Fixed Switching Frequency (typ.)
Automatic PFM-PWM Mode or Forced PWM
Mode
Wide Input Voltage Range: 2.5V to 5.5V
Internal Synchronous Rectification for High
Efficiency
Internal Soft Start: 600µs Maximum Startup
Time After VIN Settled
0.01µA Typical Shutdown Current
Current Overload and Thermal Shutdown
Protection
Frequency Sync Pin: 1.6MHz to 2.7MHz
Handset Peripherals
MP3 Players
Pre-Regulation for Linear Regulators
PDAs
Portable Hard Disk Drives
WiMax Modems
DESCRIPTION
The LM3668 is a synchronous buck-boost DC-DC
converter optimized for powering low voltage circuits
from a Li-Ion battery and input voltage rails between
2.5V and 5.5V. It has the capability to support up to
1A output current over the output voltage range. The
LM3668 regulates the output voltage over the
complete input voltage range by automatically
switching between buck or boost modes depending
on the input voltage.
The LM3668 has 2 N-channel MOSFETS and 2 Pchannel MOSFETS arranged in a topology that
provides continuous operation through the buck and
boost operating modes. There is a MODE pin that
allows the user to choose between an intelligent
automatic PFM-PWM mode operation and forced
PWM operation. During PWM mode, a fixedfrequency 2.2MHz (typ.) is used. PWM mode drives
load up to 1A. Hysteretic PFM mode extends the
battery life through reduction of the quiescent current
to 45µA (typ.) at light loads during system standby.
Internal synchronous rectification provides high
efficiency. In shutdown mode (Enable pin pulled low)
the device turns off and reduces battery consumption
to 0.01µA (typ.).
The LM3668 is available in a 12-pin WSON package.
A high switching frequency of 2.2MHz (typ.) allows
the use of tiny surface-mount components including a
2.2µH inductor, a 10µF input capacitor, and a 22µF
output capacitor.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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LM3668
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Typical Applications
100
VIN = 2.5V - 5.5V
90
VDD
PVIN
LM3668
SW2
80
VOUT
SW1
2.2 PH
2.8V/3.3V
FB
C2
22 PF
SYNC/MODE
EN
NC SGND
EFFICIENCY (%)
C1
10 PF
L = 2.8V
H = 3.3V
VSEL
PGND
VIN = 2.5V
70
60
VIN = 2.7V
VIN = 3.3V
50
VIN = 3.6V
40
30 VIN = 5.5V
20
10
0
0
1
10
100
1000
LOAD (mA)
Figure 1. Typical Application Circuit
Figure 2. Efficiency at 3.3V Output
Functional Block Diagram
Sw1
Sw2
P2
P1
PVIN
VOUT
Switch
buffer
N2
N1
Switch
buffer
NC
VDD
Control Logic
PFM_hi
PFM
Generator
PFM_low
SYNC/
MODE
PWM
Comparator
Buffer
2 MHz
Oscillator
EN
FB
VSEL
Error
Amp
+
-
Ramp
Generator
VREF
Soft
Start
PGND
SGND
Figure 3. Functional Block Diagram
2
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Connection Diagrams
VOUT
1
12
FB
SW2
2
11
VSEL
PGND
3
10
DAP
FB
12
1
VOUT
VSEL
11
2
SW2
MODE/
SYNC
MODE/
SYNC
10
3
PGND
SGND
9
4
SW1
NC*
8
5
PVIN
VDD
7
6
EN
SW1
4
9
SGND
PVIN
5
8
NC*
EN
6
7
VDD
Figure 4. Top View
See Package Number DQB (WSON)
DAP
Figure 5. Bottom View
Pin Descriptions
Pin #
Pin Name
Description
1
VOUT
2
SW2
3
PGND
4
SW1
Switching Node connection to the internal PFET switch (P1) and NFET synchronous rectifier (N1).
5
PVIN
Supply to the power switch, connect to the input capacitor.
6
EN
7
VDD
Connect to output capacitor.
Switching Node connection to the internal PFET switch (P2) and NFET synchronous rectifier (N2).
Power Ground.
Enable Input. Set this digital input high for normal operation. For shutdown, set low.
Signal Supply input. If board layout is not optimum an optional 1µF ceramic capacitor is suggested as
close to this pin as possible.
8
NC
9
SGND
10
MODE/SYNC
Mode = LOW, Automatic Mode. Mode= HI, Forced PWM Mode SYNC = external clock synchronization
from 1.6MHz to 2.7MHz (When SYNC function is used, device is forced in PWM mode).
11
VSEL
Voltage selection pin; ( ie: 2.8V/3.3V option) Logic input low (or GND) = 2.8V and logic high = 3.3V (or
VIN) to set output Voltage.
12
FB
DAP
DAP
No connect. Connect this pin to SGND on PCB layout.
Analog and Control Ground.
Feedback Analog Input. Connect to the output at the output filter.
Die Attach Pad, connect the DAP to SGND on PCB layout to enhance thermal performance. It should
not be used as a primary ground connection.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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Absolute Maximum Ratings (1) (2) (3)
PVIN, VDD Pin, SW1, SW2 & VOUT: Voltage to SGND & PGND
FB, EN, MODE, and SYNC pins
PGND to SGND
-0.2V to 0.2V
Continuous Power Dissipation (4)
Internally Limited
Maximum Junction Temperature (TJ-MAX)
+125°C
−65°C to +150°C
Storage Temperature Range
Maximum Lead Temperature (Soldering, 10 sec)
(1)
(2)
(3)
(4)
−0.2V to +6.0V
(PGND & SGND-0.2V) to (PVIN + 0.2)
+260°C
Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under
which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed
performance limits and associated test conditions, see the Electrical Characteristics tables.
The Human body model is a 100pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200pF
capacitor discharged directly into each pin. MIL-STD-883 3015.7
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP =
125ºC), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the
part/package in the application (θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX).
Operating Ratings
Input Voltage Range
2.5V to 5.5V
Recommended Load Current
0mA to 1A
−40°C to +125°C
Junction Temperature (TJ) Range
Ambient Temperature (TA) Range (1)
(1)
−40°C to +85°C
In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP =
125ºC), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the
part/package in the application (θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX).
Thermal Properties
Junction-to-Ambient Thermal Resistance (θJA)
34°C/W
WSON Package (1)
(1)
4
Junction-to-ambient thermal resistance (θJA) is taken from a thermal modeling result, performed under the conditions and guidelines set
forth in the JEDEC standard JESD51-7. The test board is a 4-layer FR-4 board measuring 101.6mm x 76.2mm x 1.6mm. Thickness of
the copper layers are 2oz/1oz/1oz/2oz. The middle layer of the board is 60mm x 60mm. Ambient temperature in simulation is 22°C, still
air. Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power
dissipation exists, special care must be paid to thermal dissipation issues in board design.
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Electrical Characteristics (1) (2)
Limits in standard typeface are for TJ = +25°C. Limits in boldface type apply over the full operating ambient temperature
range (−40°C ≤ = TA ≤ +85°C). Unless otherwise noted, specifications apply to the LM3668. VIN = 3.6V = EN, VOUT = 3.3V.
For VOUT = 4.5/5.0V, VIN = 4V.
Symbol
Parameter
Conditions
Min
VFB
Feedback Voltage
See (2)
-3
ILIM
Switch Peak Current Limit
Open loop (3)
1.6
ISHDN
Shutdown Supply Current
EN =0V
IQ_PFM
DC Bias Current in PFM
No load, device is not switching
(FB forced higher than
programmed output voltage)
Typ
Max
Units
3
%
1.85
2.05
A
0.01
1
µA
45
60
µA
IQ_PWM
DC Bias Current in PWM
PWM Mode, No Switching
600
750
µA
RDSON(P)
Pin-Pin Resistance for PFET
Switches P1 and P2
130
180
mΩ
RDSON(N)
Pin-Pin Resistance for NFET
Switches N1 and N2
100
150
mΩ
FOSC
Internal Oscillator Frequency
PWM Mode
1.9
2.2
2.5
MHz
FSYNC
Sync Frequency Range
VIN = 3.6V
1.6
2.7
MHz
VIH
Logic High Input for EN,
MODE/SYNC pins
VIL
Logic Low Input for EN,
MODES/SYNC pins
IEN, MODE, SYNC
EN, MODES/SYNC pins Input
Current
(1)
(2)
(3)
1.1
V
0.3
0.4
V
1
µA
All voltage with respect to SGND.
Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the
most likely norm.
Electrical Characteristics table reflects open loop data (FB = 0V and current drawn from SW pin ramped up until cycle by cycle current
limits is activated). Closed loop current limit is the peak inductor current measured in the application circuit by increasing output current
until output voltage drops by 10%.
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Typical Performance Characteristics
Typical Application Circuit (Figure 1): VIN = 3.6V, L = 2.2µH, CIN = 10µF, COUT = 22µF (1), TA = 25°C , unless otherwise stated.
Supply Current
vs
Temperature (Not switching)
(VOUT = 3.4V)
Switching Frequency
vs.
Temperature
(VOUT = 3.4V)
900
2.4
VIN = 2.5V
IQ_5.5V
800
2.3
IQ_PWM (éA)
FREQUENCY (MHz)
IQ_3.6V
700
600
500
400
IQ_2.5V
2.2
VIN = 3.6V
2.1
VIN = 5.5V
2.0
300
200
-40
-20
0
20
40
60
80
1.9
-40
100
-20
0
TEMPERATURE (°C)
40
60
80
100
TEMPERATURE (°C)
Figure 6.
Figure 7.
NFET_RDS (on)
vs.
Temperature
(VOUT = 3.4V)
PFET_RDS (on)
vs.
Temperature
(VOUT = 3.4V)
150
200
NFET = 2.5V
PFET_RDS = 2.5V PFET_RDS = 2.7V
NFET = 2.7V
175
RESISTANCE (mÖ)
125
RESISTANCE (mÖ)
20
100
75
NFET = 5.5V
50
NFET = 3.6V
150
125
100
75
PFET_RDS = 3.6V
50
PFET_RDS = 5.5V
25
0
-40
25
-20
0
20
40
60
80
0
-40
100
-20
0
TEMPERATURE (°C)
20
40
60
80
100
TEMPERATURE (°C)
Figure 8.
Figure 9.
ILIMIT
vs.
Temperature
(VOUT = 3.4V)
Efficiency at VOUT = 2.8V
(Forced PWM Mode)
2.00
100
90
1.95
EFFICIENCY (%)
80
ILIMIT (A)
1.90
VIN = 3.6V
1.85
1.80
VIN = 2.5V
70
60
VIN = 2.7V
50
40
30
VIN = 5.0V
20
1.75
VIN = 5.5V
10
1.70
-40
-20
0
20
40
60
80
0
0
100
TEMPERATURE (°C)
6
1
10
100
1000
LOAD (mA)
Figure 10.
(1)
VIN = 3.6V
Figure 11.
CIN and COUT: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics. COUT_MIN should not
exceed −40% of suggested value. The preferable choice would be a type and make MLCC that issues −30% over the operating
temperature and voltage range.
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Typical Performance Characteristics (continued)
Typical Application Circuit (Figure 1): VIN = 3.6V, L = 2.2µH, CIN = 10µF, COUT = 22µF(1), TA = 25°C , unless otherwise stated.
Efficiency at VOUT = 2.8V
(Auto Mode)
100
100
90
90
80
80
VIN = 2.5V
70
60
50
40
VIN = 2.7V
VIN = 3.6V
VIN = 5.0V
30
20
EFFICIENCY (%)
EFFICIENCY (%)
Efficiency at VOUT = 3.0V
(Forced PWM Mode)
VIN = 5.5V
VIN = 2.5V
60
VIN = 2.7V
50
VIN = 5.5V
40
30
VIN = 5.0V
20
10
0
0
70
10
1
10
100
0
0
1000
VIN = 3.6V
1
10
100
1000
LOAD (mA)
LOAD (mA)
Figure 12.
Figure 13.
Efficiency at VOUT = 3.0V
(Auto Mode)
Efficiency at VOUT = 3.3V
(Forced PWM Mode)
100
90
EFFICIENCY (%)
80
VIN = 2.5V
70
60
VIN = 2.7V
VIN = 3.3V
50
40
30
VIN = 3.6V
20
10
0
0
VIN = 5.5V
1
10
100
1000
LOAD (mA)
Figure 14.
Figure 15.
Efficiency at VOUT = 3.3V
(Auto Mode)
Efficiency at VOUT = 3.4V
(Forced PWM Mode)
100
100
90
90
80
VIN = 2.5V
70
60
EFFICIENCY (%)
EFFICIENCY (%)
80
VIN = 2.7V
VIN = 3.3V
50
40
VIN = 3.6V
30 VIN = 5.5V
60
40
30
20
10
10
1
10
100
0
0
1000
VIN = 2.7V
50
20
0
0
VIN = 2.5V
70
VIN = 5.0V
VIN = 5.5V
VIN = 3.6V
1
10
100
LOAD (mA)
LOAD (mA)
Figure 16.
Figure 17.
1000
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Typical Performance Characteristics (continued)
Typical Application Circuit (Figure 1): VIN = 3.6V, L = 2.2µH, CIN = 10µF, COUT = 22µF(1), TA = 25°C , unless otherwise stated.
Efficiency at VOUT = 3.4V
(Auto Mode)
Efficiency at VOUT = 4.5V
(Forced PWM Mode)
100
100
90
90
80
VIN = 2.5V
70
VIN = 5.0V
60
50
EFFICIENCY (%)
EFFICIENCY (%)
80
VIN = 2.7V
VIN = 3.6V
40
30
VIN = 5.5V
70
60
40
30
20
10
10
1
10
100
0
0
1000
VIN = 2.7V
VIN = 3.6V
50
20
0
0
VIN = 5V
VIN = 5.5V
1
1000
Figure .
Efficiency at VOUT = 4.5V
(Auto Mode)
Efficiency at VOUT = 5.0V
(Forced PWM Mode)
100
90
90
80
80
70
70
60
VIN = 5.5V
VIN = 2.7V
50
VIN = 3.6V
VIN = 5.0V
30
30
10
100
0
0
1000
VIN = 2.7V
40
20
10
VIN = 3.6V
50
10
1
VIN = 5.5V
60
20
0
0
100
Figure 18.
100
40
10
LOAD (mA)
EFFICIENCY (%)
EFFICIENCY (%)
LOAD (mA)
VIN = 5.0V
1
10
100
1000
LOAD (mA)
LOAD (mA)
Figure 19.
Figure 20.
Efficiency at VOUT = 5.0V
(Auto Mode)
Line Transient in Buck Mode
( VOUT = 3.4V, Load = 500mA)
100
4.5V
90
EFFICIENCY (%)
80
VIN
3.7V
70
VIN =5.0V
VIN = 3.6V
60
40
30
VOUT_AC
100 mV/DIV
50
VIN = 5.5V
5V/DIV
SW2
5V/DIV
SW1
VIN = 2.7V
20
10
0
0
1
10
100
100 Ps/DIV
1000
LOAD (mA)
Figure 21.
8
Figure 22.
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Typical Performance Characteristics (continued)
Typical Application Circuit (Figure 1): VIN = 3.6V, L = 2.2µH, CIN = 10µF, COUT = 22µF(1), TA = 25°C , unless otherwise stated.
Line Transient in Boost Mode
( VOUT = 3.4V, Load = 500mA)
Line Transient in Buck-Boost Mode
( VOUT = 3.4V, Load = 500mA)
3.4V
VIN
2.8V
4.0V
3.4V
100 mV/DIV
VOUT_AC
5V/DIV
5V/DIV
VIN
VOUT_AC
100 mV/DIV
SW2
5V/DIV
SW2
SW1
5V/DIV
SW1
100 Ps/DIV
100 Ps/DIV
Figure 23.
Figure 24.
Load Transient in Buck Mode
(Forced PWM Mode)
VIN = 4.2V, VOUT = 3.4V, Load = 0-500mA
Load Transient in Boost Operation
(Forced PWM Mode)
VIN = 2.7V, VOUT = 3.4V, Load = 0-500mA
SW2
5V/DIV
SW2
5V/DIV
5V/DIV
SW1
5V/DIV
SW1
200
mv/DIV
VOUT_AC
200 mV/DIV
VOUT_AC
500
mA/DIV
LOAD
LOAD
500 mA/DIV
100 Ps/DIV
100 Ps/DIV
Figure 25.
Figure 26.
Load Transient in Buck-Boost Operation
(Forced PWM Mode)
VIN = 3.44V, VOUT = 3.4V, Load = 0-500mA
Figure 27.
VIN
Load Transient in Buck Mode
(Forced PWM Mode)
= 4.2V, VOUT = 3.0V, Load = 0-500mA
Figure 28.
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Typical Performance Characteristics (continued)
Typical Application Circuit (Figure 1): VIN = 3.6V, L = 2.2µH, CIN = 10µF, COUT = 22µF(1), TA = 25°C , unless otherwise stated.
VIN
Load Transient in Boost Mode
(Forced PWM Mode)
= 2.7V, VOUT = 3.0V, Load = 0-500mA
Figure 29.
Figure 30.
Load Transient in Buck Mode
(Auto Mode)
VIN = 4.2V, VOUT = 3.3V, Load = 50-150mA
Load Transient in Boost Mode
(Auto Mode)
VIN = 2.7V, VOUT = 3.3V, Load = 50-150mA
Figure 31.
Figure 32.
Load Transient in Buck-Boost Mode
(Auto Mode)
VIN = 3.6V, VOUT = 3.3V, Load = 50-150mA
Figure 33.
10
Load Transient in Buck-Boost Mode
(Forced PWM Mode)
VIN = 3.05V, VOUT = 3.0V, Load = 0-500mA
VIN
Load Transient in Buck Mode
(Forced PWM Mode)
= 5.5V, VOUT = 5.0V, Load = 0-500mA
Figure 34.
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Typical Performance Characteristics (continued)
Typical Application Circuit (Figure 1): VIN = 3.6V, L = 2.2µH, CIN = 10µF, COUT = 22µF(1), TA = 25°C , unless otherwise stated.
VIN
Load Transient in Boost Mode
(Forced PWM Mode)
= 3.5V, VOUT = 5.0V, Load = 0-500mA
Typical Switching Waveform in Boost Mode
(PWM Mode)
VIN = 2.7V, VOUT = 3.0V, Load = 500mA
Figure 35.
Figure 36.
Typical Switching Waveform in Buck Mode
(PWM Mode)
VIN = 3.6V, VOUT = 3.0V, Load = 500mA
Typical Switching Waveformt in Boost Mode
(PFM Mode)
VIN = 2.7V, VOUT = 3.0V, Load = 50mA
2V/DIV
SW2
2V/DIV
SW1
50
mv/DIV
VOUT_AC
500
mA/DIV
LOAD
5 Ps/DIV
Figure 37.
Figure 38.
Typical Switching Waveform in Buck Mode
(PFM Mode)
VIN = 3.6V, VOUT = 3.0V, Load = 50mA
Typical Switching Waveform in Boost Mode
(PWM Mode)
VIN = 3V, VOUT = 3.4V, Load = 500mA
SW2
5V/DIV
5V/DIV
SW1
5V/DIV
SW2
5V/DIV
SW1
50
mv/DIV
VOUT_AC
500
mA/DIV
LOAD
VOUT_AC
50
mv/DIV
500
mA/DIV
LOAD
200 ns/DIV
5 Ps/DIV
Figure 39.
Figure 40.
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Typical Performance Characteristics (continued)
Typical Application Circuit (Figure 1): VIN = 3.6V, L = 2.2µH, CIN = 10µF, COUT = 22µF(1), TA = 25°C , unless otherwise stated.
Typical Switching Waveform in Buck Mode
(PWM Mode)
VIN = 4V, VOUT = 3.4V, Load = 500mA
Typical Switching Waveform in Boost Mode
(PFM Mode)
VIN = 3V, VOUT = 3.4V, Load = 50mA
2V/DIV
SW2
2V/DIV
SW1
50
mv/DIV
VOUT_AC
500
mA/DIV
LOAD
500 Ps/DIV
Figure 41.
Figure 42.
Typical Switching Waveform in Buck Mode
(PFM Mode)
VIN = 4V, VOUT = 3.4V, Load = 50mA
Start up in PWM Mode
(VOUT = 3.4V, Load = 1mA)
5V/DIV
SW2
5V/DIV
SW1
50
mv/DIV
VOUT_AC
500
mA/DIV
LOAD
500 Ps/DIV
Figure 43.
Figure 44.
Start up in PWM Mode (VOUT = 3.4V, Load = 500mA)
Figure 45.
12
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CIRCUIT DESCRIPTION
The LM3668, a high-efficiency Buck or Boost DC-DC converter, delivers a constant voltage from either a single
Li-Ion or three cell NIMH/NiCd battery to portable devices such as mobile phones and PDAs. Using a voltage
mode architecture with synchronous rectification, the LM3668 has the ability to deliver up to 1A depending on the
input voltage, output voltage, ambient temperature and the chosen inductor.
In addition, the device incorporates a seamless transition from buck-to-boost or boost-to-buck mode. The internal
error amplifier continuously monitors the output to determine the transition from buck-to-boost or boost-to-buck
operation. Figure 46 shows the four switches network used for the buck and boost operation. Table 1
summarizes the state of the switches in different modes.
There are three modes of operation depending on the current required: PWM (Pulse Width Modulation), PFM
(Pulse Frequency Modulation), and shutdown. The device operates in PWM mode at load currents of
approximately 80mA or higher to improve efficiency. Lighter load current causes the device to automatically
switch into PFM mode to reduce current consumption and extend battery life. Shutdown mode turns off the
device, offering the lowest current consumption.
VIN
VOUT
P1
P2
SW1
SW2
N1
N2
Figure 46. Simplified Diagram of Switches
Table 1. State of Switches in Different Modes
Mode
Always ON
Always OFF
Switching
Buck
SW P2
SW N2
SW P1 & N1
Boost
SW P1
SW N1
SW N2 & P2
BUCK OPERATION
When the input voltage is greater than the output voltage, the device operates in buck mode where switch P2 is
always ON and P1 & N1 control the output. Figure 47 shows the simplified circuit for buck mode operation.
P1
SW2
SW1
P2
VIN
+
-
N1
Load
Figure 47. Simplified Circuit for Buck Operation
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BOOST OPERATION
When the input voltage is smaller than the output voltage, the device enters boost mode operation where P1 is
always ON, while switches N2 & P2 control the output. Figure 48 shows the simplified circuit for boost mode
operation.
P1
SW1
P2
SW2
VIN
+
-
Load
N2
Figure 48. Simplified Circuit for Boost Operation
PWM OPERATION
In PWM operation, the output voltage is regulated by switching at a constant frequency and then modulating the
energy per cycle to control power to the load. In Normal operation, the internal error amplifier provides an error
signal, Vc, from the feedback voltage and Vref. The error amplifier signal, Vc, is compared with a voltage,
Vcenter, and used to generate the PWM signals for both Buck & Boost modes. Signal Vcenter is a DC signal
which sets the transition point of the buck and boost modes. Below are three regions of operation:
• Region I: If Vc is less than Vcenter, Buck mode.
• Region II: If Vc and Vcenter are equal, both PMOS switches (P1, P2) are on and both NMOS switches (N1,
N2) are off. The power passes directly from input to output via P1 & P2
• Region III: If Vc is greater than Vcenter, Boost mode.
The Buck-Boost operation is avoided, to improve the efficiency across VIN and load range.
Vcenter
Vc
PWM
Generator
+
-
+
P1b_PWM
+
P2b_PWM
VOS
Vramp
Figure 49. PWM Generator Block Diagram
INTERNAL SYNCHRONOUS RECTIFICATION
While in PWM mode, the LM3668 uses an internal MOSFET as a synchronous rectifier to reduce rectifier forward
voltage drop and associated power loss. Synchronous rectification provides a significant improvement in
efficiency whenever the output voltage is relatively low compare to the voltage drop across an ordinary rectifier
diode.
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PFM OPERATION
At very light loads, the converter enters PFM mode and operates with reduced switching frequency and supply
current to maintain high efficiency. The part automatically transitions into PFM mode when either of two following
conditions occur for a duration of 128 or more clock cycles:
A. The inductor current reaches zero.
B. The peak inductor current drops below the IMODE level, (Typically IMODE < 45mA + VIN/80 Ω ).
In PFM operation, the compensation circuit in the error amplifier is turned off. The error amplifier works as a
hysteretic comparator. The PFM comparator senses the output voltage via the feedback pin and controls the
switching of the output FETs such that the output voltage ramps between ~0.8% and ~1.6% of the nominal PWM
output voltage (Figure 50). If the output voltage is below the ‘high’ PFM comparator threshold, the P1 & P2 (Buck
mode) or N2 & P1 (Boost mode) power switches are turned on. It remains on until the output voltage reaches the
‘high’ PFM threshold or the peak current exceeds the IPFM level set for PFM mode. The typical peak current in
PFM mode is: IPFM = 220mA
Once the P1 (Buck mode) or N2 (Boost mode) power switch is turned off, the N1 & P2 (Buck mode) or P1 & P2
(Boost mode) power switches are turned on until the inductor current ramps to zero. When the zero inductor
current condition is detected, the N1(Buck mode) or P2 (Boost mode) power switches are turned off. If the output
voltage is below the ‘high’ PFM comparator threshold, the P1 & P2 (Buck mode) or N2 & P1 (Boost mode)
switches are again turned on and the cycle is repeated until the output reaches the desired level. Once the
output reaches the ‘high’ PFM threshold, the N1 & P2 (Buck mode) or P1 & P2 (Boost mode) switches are turned
on briefly to ramp the inductor current to zero, then both output switches are turned off and the part enters an
extremely low power mode. Quiescent supply current during this ‘sleep’ mode is 45µA (typ), which allows the
part to achieve high efficiency under extremely light load conditions.
High PFM Threshold
~1.016*Vout
PFM Mode at Light Load
Load current
increases
ZAx
is
Inductor
current ramp
down
until
I inductor=0
Current load
increases,
draws Vout
towards
Low2 PFM
Threshold
Low PFM
Threshold,
turn on
Low2 PFM Threshold,
switch back to PWMmode
xis
Z-A
Inductor
Current
Ramp up
High PFM
Voltage
Threshold
reached,
go into
Low power
mode, both
switches are off
Low1 PFM Threshold
~1.008*Vout
Low2 PFM Threshold
Vout
PWM Mode at
Moderate to Heavy
Loads
Figure 50. PFM to PWM Mode Transition
In addition to the auto mode transition, the LM3668 operates in PFM Buck or PFM Boost based on the following
conditions. There is a small delta (~500mV) known as dv1(~200mV) & dv2(~300mV) when VOUT_TARGET is very
close to VIN where the LM3668 can be in either Buck or Boost mode. For example, when VOUT_TARGET = 3.3V and
VIN is between 3.1V & 3.6V, the LM3668 can be in either mode depending on the VIN vs VOUT_TARGET.
• Region I: If VIN < VOUT_TARGET - dv1, the regulator operates in Boost mode.
• Region II: If VOUT_TARGET - dv1 < VIN < VOUT_TARGET+ dv2 ,the regulator operates in either Buck or Boost
mode.
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Region III: If VIN > VOUT_TARGET + dv2, the regulator operates in Buck mode.
Region I
Region II
Boost
Buck
or
Boost
Region III
VOUT (Target)
Buck
VIN
dV1 - VOUT (TARGET)
VOUT (TARGET) + dV2
Figure 51. VOUT vs VIN Transition
In the buck PFM operation, P2 is always turned on and N2 is always turned off , P1 and N1 power switches are
switching. P1 and N1 are turned off to enter " sleep mode" when the output voltage reaches the "high"
comparator threshold. In boost PFM operation, P2 and N2 are switching. P1 is turned on and N1 is turned off
when the output voltage is below the "high" threshold. Unlike in buck mode, all four power switches are turned off
to enter "sleep" mode when the output voltage reaches the "high" threshold in boost mode. In addition, the
internal current sensing of the IPFM is used to determine the precise condition to switch over to buck or boost
mode via the PFM generator.
CURRENT LIMIT PROTECTION
The LM3668 has current limit protection to prevent excessive stress on itself and external components during
overload conditions. The internal current limit comparator will disable the power device at a typical switch peak
current limit of 1.85A(typ.).
UNDERVOLTAGE PROTECTION
The LM3668 has an UVP comparator to turn the power device off in case the input voltage or battery voltage is
too low . The typical UVP threshold is around 2V.
SHORT CIRCUIT PROTECTION
When the output of the LM3668 is shorted to GND, the current limit is reduced to about half of the typical current
limit value until the short is removed.
SHUTDOWN
When the EN pin is pulled low, P1 and P2 are off; N1 and N2 are turned on to pull SW1 and SW2 to ground.
THERMAL SHUTDOWN
The LM3668 has an internal thermal shutdown function to protect the die from excessive temperatures. The
thermal shutdown trip point is typically 150°C; normal operation resumes when the temperature drops below
125°C.
STARTUP
The LM3668 has a soft-start circuit that smooth the output voltage and ramp current during startup. During
startup the bandgap reference is slowly ramped up and switch current limit is reduced to half the typical value.
Soft start is activated only if EN goes from logic low to logic high after VIN reaches 2.5V. The startup time thereby
depends on the output capacitor and load current demanded at startup. It is not recommended to start up the
device at full load while in soft-start.
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APPLICATION INFORMATION
SYNC/MODE PIN
If the SYNC/MODE pin is set high, the device is set to operate at PWM mode only. If SYNC/MODE pin is set low,
the device is set to automatically transition from PFM to PWM or PWM to PFM depending on the load current.
Do not leave this pin floating. The SYNC/MODE pin can also be driven by an external clock to set the desired
switching frequency between 1.6MHz to 2.7MHz.
VSEL PIN
The LM3668 has built in logic for conveniently setting the output voltage, for example if VSEL high, the output is
set to 3.3V; with VSEL low the output is set to 2.8V. It is not recommended to use this function for dynamically
switching between 2.8V and 3.3V or switching at maximum load.
MAXIMUM CURRENT
The LM3668 is designed to operate up to 1A. For input voltages at 2.5V, the maximum operating current is
600mA and 800mA for 2.7V input voltage. In any mode it is recommended to avoid starting up the device at
minimum input voltage and maximum load. Special attention must be taken to avoid operating near thermal
shutdown when operating in boost mode at maximum load (1A). A simple calculation can be used to determine
the power dissipation at the operating condition; PD-MAX = (TJ-MAX-OP – TA-MAX)/θJA. The LM3668 has thermal
resistance θJA = 34°C/W (1) (2) and maximum operating ambient of 85°C. As a result, the maximum power
dissipation using the above formula is around 1176mW. Refer to for PD-MAX value at different ambient
temperatures.
Dissipation Rating Table
θJA
34°C/W (4 layers board per
JEDEC standard)
(1)
(2)
TA ≤ 25°C
TA ≤ 60°C
TA ≤ 85°C
2941mW
1912mW
1176mW
In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP =
125ºC), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the
part/package in the application (θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX).
All voltage is with respect to SGND.
INDUCTOR SELECTION
There are two main considerations when choosing an inductor: the inductor should not saturate, and the inductor
current ripple should be small enough to achieve the desired output voltage ripple. Different saturation current
rating specifications are followed by different manufacturers so attention must be given to details. Saturation
current ratings are typically specified at 25°C. However, ratings at the maximum ambient temperature of
application should be requested from the manufacturer. Shielded inductors radiate less noise and should be
preferred.
In the case of the LM3668, there are two modes (Buck & Boost) of operation that must be consider when
selecting an inductor with appropriate saturation current. The saturation current should be greater than the sum
of the maximum load current and the worst case average to peak inductor current. The first equation shows the
buck mode operation for worst case conditions and the second equation for boost condition.
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ISAT > IOUTMAX + IRIPPLE
For Buck
(VIN - VOUT)
Where IRIPPLE =
ISAT >
(2 x L x f)
x
VOUT
VIN
IOUTMAX
'¶
+ IRIPPLE
Where IRIPPLE =
For Boost
(VOUT - VIN)
(2 x L x f)
(VOUT - VIN)
Where D =
(VOUT)
x
VIN
VOUT
& '¶ = (1-D)
where
•
•
•
•
•
•
•
•
•
IRIPPLE: Peak inductor current
IOUTMAX: Maximum load current
VIN: Maximum input voltage in application
L : Min inductor value including worst case tolerances (30% drop can be considered)
f : Minimum switching frequency
VOUT: Output voltage
D: Duty Cycle for CCM Operation
VOUT : Output Voltage
VIN: Input Voltage
Example using above equations:
•
•
•
•
•
•
•
VIN = 2.8V to 4V
VOUT = 3.3V
IOUT = 500mA
L = 2.2µH
F = 2MHz
Buck: ISAT = 567mA
Boost: ISAT = 638mA
(1)
As a result, the inductor should be selected according to the highest of the two ISAT values.
A more conservative and recommended approach is to choose an inductor that has a saturation current rating
greater than the maximum current limit of 2.05A.
A 2.2µH inductor with a saturation current rating of at least 2.05A is recommended for most applications. The
inductor’s resistance should be less than 100mΩ for good efficiency. For low-cost applications, an unshielded
bobbin inductor could be considered. For noise critical applications, a toroidal or shielded-bobbin inductor should
be used. A good practice is to lay out the board with overlapping footprints of both types for design flexibility.
This allows substitution of a low-noise shielded inductor, in the event that noise from low-cost bobbin model is
unacceptable.
Table 2. Suggest Inductors and Suppliers
18
Model
Vendor
Dimensions
LxWxH (mm)
D.C.R (max)
ISAT
LPS4012-222L
Coilcraft
4 x 4 x 1.2
100 mΩ
2.1A
LPS4018-222L
Coilcraft
4 x 4 x 1.8
70 mΩ
2.5A
1098AS-2R0M (2µF)
TOKO
3 x 2.8x 1.2
67 mΩ
1.8A ( lower current
applications)
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INPUT CAPACITOR SELECTION
A ceramic input capacitor of at least 10µF, 6.3V is sufficient for most applications. Place the input capacitor as
close as possible to the PVIN pin of the device. A larger value may be used for improved input voltage filtering.
Use X7R or X5R types; do not use Y5V. DC bias characteristics of ceramic capacitors must be considered when
selecting case sizes like 0805 or 0603. The input filter capacitor supplies current to the PFET switch of the
LM3668 in the first half of each cycle and reduces voltage ripple imposed on the input power source. A ceramic
capacitor’s low ESR provides the best noise filtering of the input voltage spikes due to this rapidly changing
current. For applications where input voltage is 4V or higher, it is best to use a higher voltage rating capacitor to
eliminate the DC bias affect over capacitance.
OUTPUT CAPACITOR SELECTION
A ceramic output capacitor of 22µF, 6.3V (use 10V or higher rating for 4.5/5V output option) is sufficient for most
applications. Multilayer ceramic capacitors such as X5R or X7R with low ESR is a good choice for this as well.
These capacitors provide an ideal balance between small size, cost, reliability and performance. Do not use Y5V
ceramic capacitors as they have poor dielectric performance over temperature and poor voltage characteristic for
a given value. In other words, ensure the minimum COUT value does not exceed −40% of the above-suggested
value over the entire range of operating temperature and bias conditions.
Extra attention is required if a smaller case size capacitor is used in the application. Smaller case size capacitors
typically have less capacitance for a given bias voltage as compared to a larger case size capacitor with the
same bias voltage. Please contact the capacitor manufacturer for detail information regarding capacitance verses
case size. Table 1 lists several capacitor suppliers.
The output filter capacitor smooths out current flow from the inductor to the load, helps maintain a steady output
voltage during transient load changes and reduces output voltage ripple. These capacitors must be selected with
sufficient capacitance and sufficiently low ESR to perform these functions.
Note that the output voltage ripple is dependent on the inductor current ripple and the equivalent series
resistance of the output capacitor (RESR).
The RESR is frequency dependent (as well as temperature dependent); make sure the value used for calculations
is at the switching frequency of the part.
Table 3. Suggested Capacitors and Suppliers
Model
Type
Vendor
Voltage Rating
Case Size
Inch (mm)
10 µF for CIN (For 4.5/5V option, use 10V or higher rating capacitor)
GRM21BR60J106K
Ceramic, X5R
Murata
6.3V
0805 (2012)
JMK212BJ106K
Ceramic, X5R
Taiyo-Yuden
6.3V
0805 (2012)
C2012X5R0J106K
Ceramic, X5R
TDK
6.3V
0805 (2012)
LMK212 BJ106MG (+/-20%)
Ceramic, X5R
Taiyon-Yuden
10V
0806(2012)
LMK212 BJ106KG (+/-10%)
Ceramic, X5R
Taiyon-Yuden
10V
0805(2012)
22 µF for COUT (For 4.5/5V option, use 10V or higher rating capacitor)
JMK212BJ226MG
Ceramic, X5R
Taiyo-Yuden
6.3V
0805(2012)
LMK212BJ226MG
Ceramic, X5R
Taiyo-Yuden
10V
0805(2012)
LAYOUT CONSIDERATIONS
As for any high frequency switcher, it is important to place the external components as close as possible to the
IC to maximize device performance. Below are some layout recommendations:
1. Place input filter and output filter capacitors close to the IC to minimize copper trace resistance which will
directly effect the overall ripple voltage.
2. Route noise sensitive trace away from noisy power components. Separate power GND (Noisy GND) and
Signal GND (quiet GND) and star GND them at a single point on the PCB preferably close to device GND.
3. Connect the ground pins and filter capacitors together via a ground plane to prevent switching current
circulating through the ground plane. Additional layout consideration regarding the WSON package can be
found in Application AN1187.
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PACKAGE OPTION ADDENDUM
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24-Jan-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package Qty
Drawing
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
LM3668SD-2833/NOPB
ACTIVE
WSON
DQB
12
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
S017B
LM3668SD-3034/NOPB
ACTIVE
WSON
DQB
12
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
S018B
LM3668SD-4550/NOPB
ACTIVE
WSON
DQB
12
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
S019B
LM3668SDX-2833/NOPB
ACTIVE
WSON
DQB
12
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
LM3668SDX-3034/NOPB
ACTIVE
WSON
DQB
12
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
S018B
LM3668SDX-4550/NOPB
ACTIVE
WSON
DQB
12
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
S019B
S017B
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Only one of markings shown within the brackets will appear on the physical device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
24-Jan-2013
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Nov-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LM3668SD-2833/NOPB
WSON
DQB
12
1000
178.0
12.4
3.3
3.3
1.0
8.0
12.0
Q1
LM3668SD-3034/NOPB
WSON
DQB
12
1000
178.0
12.4
3.3
3.3
1.0
8.0
12.0
Q1
LM3668SD-4550/NOPB
WSON
DQB
12
1000
178.0
12.4
3.3
3.3
1.0
8.0
12.0
Q1
LM3668SDX-2833/NOPB
WSON
DQB
12
4500
330.0
12.4
3.3
3.3
1.0
8.0
12.0
Q1
LM3668SDX-3034/NOPB
WSON
DQB
12
4500
330.0
12.4
3.3
3.3
1.0
8.0
12.0
Q1
LM3668SDX-4550/NOPB
WSON
DQB
12
4500
330.0
12.4
3.3
3.3
1.0
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Nov-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM3668SD-2833/NOPB
WSON
DQB
12
1000
203.0
190.0
41.0
LM3668SD-3034/NOPB
WSON
DQB
12
1000
203.0
190.0
41.0
LM3668SD-4550/NOPB
WSON
DQB
12
1000
203.0
190.0
41.0
LM3668SDX-2833/NOPB
WSON
DQB
12
4500
349.0
337.0
45.0
LM3668SDX-3034/NOPB
WSON
DQB
12
4500
349.0
337.0
45.0
LM3668SDX-4550/NOPB
WSON
DQB
12
4500
349.0
337.0
45.0
Pack Materials-Page 2
MECHANICAL DATA
DQB0012A
SDF12A (Rev B)
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