LT1236LS8 Precision, Low Noise, Low Profile Hermetic Voltage Reference Features n n n n n n n n Description Hermetic 5mm × 5mm LCC Leadless Chip Carrier Package: Insensitive to Humidity Thermal Hysteresis: 8ppm (0°C to 70°C) Thermal Hysteresis: 60ppm (–40°C to 85°C) Low Drift: A-Grade: 5ppm/°C Max B-Grade: 10ppm/°C Max High Accuracy: A-Grade: ±0.05% Max B-Grade: ±0.10% Max Low Noise: <1ppm Peak-to-Peak (0.1Hz to 10Hz) 100% Noise Tested Sinks and Sources ±10mA Wide Supply Range to 40V 8-Pin (5mm × 5mm) LS8 Package Applications n n n n n n Instrumentation and Test Equipment High Resolution Data Acquisition Systems A/D and D/A Converters Precision Regulators Precision Scales Digital Voltmeters The LT®1236LS8 is a precision reference that combines low drift and noise with excellent long-term stability and high output accuracy. The reference output will both source and sink up to 10mA and remains very constant with input voltage variations. The hermetic package provides outstanding humidity and thermal hysteresis performance. The LT1236LS8 is only 5mm × 5mm × 1.5mm, offering an alternative to large through-hole metal can voltage references, such as the industry standard LT1021. The LT1236LS8 offers similar performance to the LT1236, with additional stability from the hermetic package. LT1236LS8 is based on a buried Zener diode structure, which enables temperature and time stability, and extremely low noise performance of < 1ppm peak-to-peak. Noise is 100% tested in production. The LT1236LS8 operates on a supply voltage from 7.2V up to 40V. The subsurface Zener exhibits better time stability than even the best bandgap reference, and the hermetic package maintains that stability over a wide range of environmental conditions. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical Application Typical Distribution of Temperature Drift 24 DISTRIBUTION 22 OF THREE RUNS 20 Basic Connection 18 VIN IN OUT VOUT GND UNITS (%) 16 LT1236LS8 14 12 10 8 6 LT1236LS8 TA01 4 2 0 –3 –2 –1 0 1 OUTPUT DRIFT (ppm/°C) 2 3 LT1236LS8 TA02 1236ls8f 1 LT1236LS8 Absolute Maximum Ratings Pin Configuration (Note 1) Input Voltage..............................................................40V Input/Output Voltage Differential...............................35V Trim Pin-to-Ground Voltage Positive.................................................. Equal to VOUT Negative...............................................................–20V Output Short-Circuit Duration VIN = 35V...........................................................10 sec VIN ≤ 20V...................................................... Indefinite Operating Temperature Range..................– 40°C to 85°C Storage Temperature Range................... –65°C to 150°C TOP VIEW NC* NC* 1 VIN 2 NC* 3 8 4 7 NC* 6 VOUT 5 TRIM** GND LS8 PACKAGE 8-PIN LEADLESS CHIP CARRIER (5mm × 5mm) *CONNECTED INTERNALLY. D0 NOT CONNECT EXTERNAL CIRCUITRY TO THESE PINS **SEE APPLICATIONS INFORMATION SECTION TJMAX = 125°C, θJA = 120°C/W PACKAGE LID IS GND Order Information LEAD FREE FINISH PART MARKING* PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE LT1236AILS8-5#PBF† 12365 8-Lead Ceramic LCC 5mm × 5mm –40°C to 85°C LT1236BILS8-5#PBF† 12365 8-Lead Ceramic LCC 5mm × 5mm –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ †This product is only offered in trays. For more information go to: http://www.linear.com/packaging/ Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 10V, IOUT = 0, unless otherwise noted. LT1236LS8-5 PARAMETER CONDITIONS MIN TYP MAX Output Voltage (Note 2) LT1236ALS8 LT1236BLS8 4.9975 4.9950 5.000 5.000 5.0025 5.0050 Output Voltage Temperature Coefficient (Note 3) LT1236ALS8 LT1236BLS8 2 5 5 10 ppm/°C ppm/°C Line Regulation (Note 4) 7.2V ≤ VIN ≤ 10V 4 12 20 6 10 ppm/V ppm/V ppm/V ppm/V 25 40 ppm/mA ppm/mA l 10V ≤ VIN ≤ 40V 2 l Load Regulation (Sourcing Current) (Note 4) 0 ≤ IOUT ≤ 10mA 15 l UNITS V V 1236ls8f 2 LT1236LS8 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 10V, IOUT = 0, unless otherwise noted. LT1236LS8-5 PARAMETER CONDITIONS Load Regulation (Sinking Current) (Note 4) 0 ≤ IOUT ≤ 10mA MIN TYP MAX UNITS 60 100 150 ppm/mA ppm/mA 0.8 1.2 1.5 mA mA 3.5 µVP-P µVRMS l Supply Current l Output Voltage Noise (Note 5) 0.1Hz ≤ f ≤ 10Hz 10Hz ≤ f ≤ 1kHz 3.0 2.2 Long-Term Stability of Output Voltage (Note 6) ∆t = 1000Hrs Non-Cumulative 20 ppm Temperature Hysteresis of Output (Note 7) ∆T = ±25°C ∆T = 0°C to 70°C ∆T = –40°C to 85°C 3 8 60 ppm ppm ppm Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Output voltage is measured immediately after turn-on. Changes due to chip warm-up are typically less than 0.005%. Note 3: Temperature coefficient is measured by dividing the change in output voltage over the temperature range by the change in temperature. Incremental slope is also measured at 25°C. Note 4: Line and load regulation are measured on a pulse basis. Output changes due to die temperature change must be taken into account separately. Note 5: RMS noise is measured with a 2-pole highpass filter at 10Hz and a 2-pole lowpass filter at 1kHz. The resulting output is full-wave rectified and then integrated for a fixed period, making the final reading an average as opposed to RMS. Correction factors are used to convert from average to RMS, and 0.88 is used to correct for the non-ideal bandbass of the filters. Peak-to-peak noise is measured with a single highpass filter at 0.1Hz and a 2-pole lowpass filter at 10Hz. The unit is enclosed in a still-air environment to eliminate thermocouple effects on the leads. Test time is 10 seconds. Note 6: Long-term stability typically has a logarithmic characteristic and therefore, changes after 1000 hours tend to be much smaller than before that time. Total drift in the second thousand hours is normally less than one third that of the first thousand hours, with a continuing trend toward reduced drift with time. Significant improvement in long-term drift can be realized by preconditioning the IC with a 100-200 hour, 125°C burn in. Long term stability will also be affected by differential stresses between the IC and the board material created during board assembly. Temperature cycling and baking of completed boards is often used to reduce these stresses in critical applications. Note 7: Hysteresis in output voltage is created by package stress that differs depending on whether the IC was previously at a higher or lower temperature. Output voltage is always measured at 25°C, but the IC is cycled to high or low temperature before successive measurements. Hysteresis is roughly proportional to the square of temperature change. Hysteresis is not normally a problem for operational temperature excursions, but can be significant in critical narrow temperature range applications where the instrument might be stored at high or low temperatures. Hysteresis measurements are preconditioned by one temperature cycle. 1236ls8f 3 LT1236LS8 Typical Performance Characteristics Ripple Rejection 115 Ripple Rejection 130 f = 150Hz VIN = 15V COUT = 0 120 110 Start-Up 8 7 100 95 OUTPUT VOLTAGE (V) REJECTION (dB) REJECTION (dB) 110 105 100 90 80 70 90 5 0 10 15 20 25 30 INPUT VOLTAGE (V) 35 50 40 100 1k FREQUENCY (Hz) 10 14 300 12 200 150 6 50 2 0 10k Load Regulation VIN = 8V 10k INPUT CURRENT (mA) –2 –4 0.2 2 4 6 8 SINKING OUTPUT CURRENT (mA) 10 1236ls8 G07 TJ = 125°C 0.6 0.4 0 TJ = 25°C 0.8 0 0 5 10 15 20 25 30 INPUT VOLTAGE (V) 80 100 Sink Mode Current Limit TJ = – 55°C 1.0 40 20 0 60 TEMPERATURE (°C) 1236ls8 G06 60 1.2 –3 –5 –10 – 8 – 6 – 4 – 2 SOURCING 5.000 –40 –20 1236ls8 G05 1.4 –1 14 5.002 IOUT = 0 1.6 0 12 5.003 Quiescent Current 3 OUTPUT CHANGE (mV) 100 1k BANDWIDTH (Hz) 10 1.8 1 10 5.001 1236ls8 G04 2 6 8 TIME (µs) 5.004 8 4 4 4 Output Voltage Temperature Drift 10 100 100 1k FREQUENCY (Hz) 2 5.005 COUT = 0 FILTER = 1 POLE fLOW = 0.1Hz OUTPUT VOLTAGE (V) 350 RMS NOISE (µV) NOISE VOLTAGE (nV/√Hz) 16 250 0 1236ls8 G03 Output Voltage Noise Output Voltage Noise Spectrum 10 3 10k 1236ls8 G02 400 5 5 4 1236ls8 G01 0 6 60 CURRENT INTO OUTPUT (mA) 85 VIN = 0V TO 12V 35 40 1236ls8 G08 VIN = 8V 50 40 30 20 10 0 0 2 4 6 8 10 12 14 OUTPUT VOLTAGE (V) 16 18 1236ls8 G09 1236ls8f 4 LT1236LS8 Typical Performance Characteristics Load Transient Response, CLOAD = 0 Thermal Regulation – 0.5 THERMAL REGULATION* – 1.0 ILOAD = 10mA ISOURCE = 0 OUTPUT CHANGE (50mV/DIV) LOAD REGULATION 0 ISINK = 0 50mV 50mV 0 20 40 60 80 TIME (ms) ISINK = 0.2mA ISOURCE = 0.5mA ISINK = 2-10mA ISOURCE = 2-10mA ∆ISOURCE = 100µAP-P 0 100 120 140 1 2 ∆ISINK = 100µAP-P 3 4 0 TIME (µs) 1 3 2 4 1236ls8 G11 *INDEPENDENT OF TEMPERATURE COEFFICIENT 1236ls8 G10 Load Transient Response, CLOAD = 1000pF Output Noise 0.1Hz to 10Hz ISINK = 0 20mV 20mV ISINK = 0.2mA ISOURCE = 0.2mA ISINK = 2-10mA ISOURCE = 2-10mA ∆ISOURCE = 100µAP-P 0 5 FILTERING = 1 ZERO AT ORIGIN 1 POLE AT 0.1Hz 2 POLES AT 10Hz OUTPUT VOLTAGE NOISE (5µV/DIV) ISOURCE = 0 OUTPUT CHANGE (20mV/DIV) OUTPUT CHANGE (mV) VIN = 25V ∆POWER = 200mW 5µV (1ppm) ∆ISINK = 100µAP-P 10 15 20 0 TIME (µs) 5 10 15 20 1236ls8 G12 0 1 4 3 2 TIME (MINUTES) 5 6 1236ls8 G13 1236ls8f 5 LT1236LS8 Pin Functions NC (Pins 1, 3, 7, 8): Connected internally, do not connect. TRIM (Pin 5): Allows adjustment of output voltage. See Applications Information section for details. VIN (Pin 2): Power Supply. Bypass with 0.1µF (or larger) capacitor to ground. VOUT (Pin 6): Output Voltage. See Applications Information section for details regarding DC and capacitive loading and stability. GND (Pin 4): Device Ground. See Applications Information section for recommended connection methods. Block Diagram INPUT Q2 R1 OUTPUT D6 R2 D5 6.3V + – R3 D3 R4 A1 TRIM D4 Q1 GND 1236sl8 ES 1236ls8f 6 LT1236LS8 Applications Information Effect of Reference Drift on System Accuracy A large portion of the temperature drift error budget in many systems is the system reference voltage. This graph indicates the maximum temperature coefficient allowable if the reference is to contribute no more than 0.5LSB error to the overall system performance. The example shown is a 12-bit system designed to operate over a temperature range from 25°C to 65°C. Assuming the system calibration is performed at 25°C, the temperature span is 40°C. It can be seen from the graph that the temperature coefficient of the reference must be no worse than 3ppm/°C if it is to contribute less than 0.5LSB error. For this reason, the LT1236LS8 has been optimized for low drift. MAXIMUM TEMPERATURE COEFFICIENT FOR 0.5LSB ERROR (ppm/°C) Maximum Allowable Reference Drift 100 8-BIT 10-BIT 10 12-BIT 14-BIT 1.0 LT1236LS8 IN GND VOUT OUT TRIM R1 27k 1N4148 R2 50k 1236ls8 AI02 Capacitive Loading and Transient Response The LT1236LS8 is stable with all capacitive loads, but for optimum settling with load transients, output capacitance should be under 1000pF. The output stage of the reference is class AB with a fairly low idling current. This makes transient response worst-case at light load currents. Because of internal current drain on the output, actual worst-case occurs at ILOAD = 0. Significantly better load transient response is obtained by moving slightly away from these points. See Load Transient Response curves for details. In general, best transient response is obtained when the output is sourcing current. In critical applications, a 10µF solid tantalum capacitor with several ohms in series provides optimum output bypass. Load Regulation 10 20 30 40 50 60 70 80 90 100 TEMPERATURE SPAN (°C) 1236ls8 AI01 Trimming Output Voltage The LT1236LS8 has an output voltage trim pin, but the temperature drift of the nominal 4V open circuit voltage at pin 5 is about –1.7mV/°C. For the voltage trimming not to affect reference output temperature drift, the external trim voltage must track the voltage on the trim pin. Input impedance of the trim pin is about 100kΩ and attenuation to the output is 13:1. The technique shown below is suggested for trimming the output of the LT1236LS8 while maintaining minimum shift in output temperature coefficient. The R1/R2 ratio is chosen to minimize interaction of trimming and temperature drift shifts, so the exact values shown should be used. The LT1236LS8 is capable of driving 10mA to a load. The load regulation at the output of the LT1236LS8 is very good, with a change of less than 25ppm/mA when driving the load. However, the load current will cause a voltage drop in the connecting wire between the LT1236LS8 and the load. This IR drop is dependent on the resistance of the connecting wire and will appear as additional load regulation error. For example, 12 feet of #22 gauge wire or 1 foot of 0.025 inch printed circuit board trace will create 2mV loss at 10mA output current. This is equivalent to 1LSB in a 10V, 12-bit system. There are three approaches that will reduce this effect. First, limiting the distance between the LT1236LS8 and the load will reduce the trace length, and improve load regulation. Second, use wider traces for the connections between the LT1236LS8 and the load to reduce IR drop. Finally, 1236ls8f 7 LT1236LS8 Applications Information use a star-ground method, with the LT1236LS8 ground tied directly to the load, rather than through a ground plane or other shared ground trace. This last method will reduce drop in the ground trace between the LT1236LS8 and the load. The ground wire in this case will carry only approximately 1mA, which is the ground current of the LT1236LS8, while the load return current will shunt to the system ground separate from the reference-to-load path. Series Mode with Boost Transistor INPUT R1 220Ω 2N3906 IN LT1236LS8 OUT GND The following circuits show proper hook-up to minimize errors due to ground loops and line losses. Losses in the output lead can be greatly reduced by adding a PNP boost transistor if load currents are 5mA or higher. R2 can be added to further reduce current in the output sense lead. Effects of Air Movement on Low Frequency Noise The LT1236LS8 has very low noise because of the buried zener used in its design. In the 0.1Hz to 10Hz band, peakto-peak noise is about 0.5ppm of the DC output. To achieve this low noise, however, care must be taken to shield the reference from ambient air turbulence. Air movement can create noise because of thermoelectric differences between IC package leads and printed circuit board materials and/or sockets. Power dissipation in the reference, even though it rarely exceeds 20mW, is enough to cause small temperature gradients in the package leads. Variations in thermal resistance, caused by uneven air flow, create differential lead temperatures, thereby causing thermoelectric voltage noise at the output of the reference. *OPTIONAL—REDUCES CURRENT IN OUTPUT SENSE LEAD: R2 = 2.4k 1236ls8 AI04 Long-Term Drift Long-term drift cannot be extrapolated from accelerated high temperature testing. This erroneous technique gives drift numbers that are wildly optimistic. The only way long-term drift can be determined is to measure it over the time interval of interest. The LT1236LS8 long-term drift data was collected on 80 parts that were soldered into printed circuit boards similar to a real world application. The boards were then placed into a constant temperature oven with a TA = 35°C, their outputs were scanned regularly and measured with an 8.5 digit DVM. Typical long-term drift is illustrated in Figure 1. 200 OUT GND NORMALIZED TO 10 HOURS DUE TO SYSTEM WARM-UP 160 120 80 40 KEEP THIS LINE RESISTANCE LOW + LOAD PPM LT1236LS8 IN LOAD GROUND RETURN Standard Series Mode INPUT R2* 0 –40 –80 –120 GROUND RETURN –160 1236ls8 AI03 –200 0 500 1000 HOURS 1500 2000 1236ls8 F01 Figure 1. Long-Term Drift 1236ls8f 8 LT1236LS8 Applications Information Hysteresis Thermal hysteresis is a measure of change of output voltage as a result of temperature cycling. Figure 2a and 2b illustrate the typical hysteresis based on data taken from the LT1236LS8. A proprietary design technique minimizes thermal hysteresis. stresses on the die have changed position. This shift is similar, but more extreme than thermal hysteresis. Experimental results of IR reflow shift are shown below in Figure 4. These results show only shift due to reflow and not mechanical stress. 300 380s IR Reflow Shift 22 0 8 12 NUMBER OF UNITS NUMBER OF UNITS 14 4 2 –50 –30 –10 10 30 50 70 DISTRIBUTION (ppm) 90 1236ls8 F02a Figure 2a. Hysteresis Plot 0°C to 70°C 40s 0 2 6 4 MINUTES 8 10 1236ls8 F03 Figure 3. Lead-Free Reflow Profile 9 6 tL 130s RAMP TO 150°C 10 8 T = 150°C 120s 16 10 RAMP DOWN tP 30s 75 18 0 150 25°C TO 0°C TO 25°C 25°C TO 70°C TO 25°C 20 TL = 217°C TS(MAX) = 200°C TS = 190°C 225 TEMPERATURE (°C) The mechanical stress of soldering a part to a board can cause the output voltage to shift. Moreover, the heat of an IR reflow or convection soldering oven can also cause the output voltage to shift. The materials that make up a semiconductor device and its package have different rates of expansion and contraction. After a part undergoes the extreme heat of a lead-free IR reflow profile, like the one shown in Figure 3, the output voltage shifts. After the device expands, due to the heat, and then contracts, the TP = 260°C 1× REFLOW 3× REFLOW 24Hr REST 7 6 5 4 3 2 1 0 –0.05 –0.04 –0.03 –0.02 –0.01 REFLOW SHIFT (%) 0 0.01 1236ls8 F04 35 NUMBER OF UNITS 30 Figure 4. Output Voltage Shift Due to IR Reflow 25°C TO –40°C TO 25°C 25°C TO 85°C TO 25°C Humidity Sensitivity 25 20 15 10 5 0 –120 –80 –40 0 40 80 DISTRIBUTION (ppm) 120 1236ls8 F02b Figure 2b. Hysteresis Plot –40°C to 85°C Plastic mold compounds absorb moisture. With changes in relative humidity, plastic packaging materials change the amount of pressure they apply to the die inside, which can cause slight changes in the output of a voltage reference, usually on the order of 100ppm. The LS8 package is hermetic, so it is not affected by humidity, and is therefore more stable in environments where humidity may be a concern. However, PC Board material may absorb moisture and apply mechanical stress to the LT1236LS8. Proper board materials and layout are essential. 1236ls8f 9 LT1236LS8 Typical Applications Boosted Output Current with Current Limit Boosted Output Current with No Current Limit V + ≥ 9V V+ ≥ 10V D1* LED R1 220Ω R1 220Ω 8.2Ω 2N2905 2N2905 IN IN LT1236LS8 OUT GND + 5V AT 100mA LT1236LS8 2µF SOLID TANT GND OUT + 5V AT 100mA 2µF SOLID TANT 1236ls8 TA03 * GLOWS IN CURRENT LIMIT, DO NOT OMIT 1236ls8 TA04 Handling Higher Load Currents 10V 30mA IN LT1236LS8 R1* 169Ω VOUT 5V OUT GND RL TYPICAL LOAD CURRENT = 30mA *SELECT R1 TO DELIVER TYPICAL LOAD CURRENT. LT1236 WILL THEN SOURCE OR SINK AS NECESSARY TO MAINTAIN PROPER OUTPUT. DO NOT REMOVE LOAD AS OUTPUT WILL BE DRIVEN UNREGULATED HIGH. LINE REGULATION IS DEGRADED IN THIS APPLICATION 1236ls8 TA05 1236ls8f 10 LT1236LS8 Typical Applications Operating 5V Reference from 5V Supply 5V LOGIC SUPPLY 1N914 CMOS LOGIC GATE** + fIN ≥ 2kHz* LT1236LS8 1N914 ≈8.5V IN + C2* C1* 5µF OUT GND 5µF *FOR HIGHER FREQUENCIES C1 AND C2 MAY BE DECREASED **PARALLEL GATES FOR HIGHER REFERENCE CURRENT LOADING 5V REFERENCE 1236ls8 TA06 2-Pole Lowpass Filtered Reference 1µF MYLAR VIN – LT1001 LT1236LS8 VIN IN OUT GND R1 36k R2 36k f = 10Hz VREF + 0.5µF MYLAR TOTAL NOISE ≤2µVRMS 1Hz ≤ f ≤ 10kHz –VREF 1236ls8 TA07 1236ls8f 11 LT1236LS8 Typical Applications High Precision, High Stability, Differential Measurement System 8V TO 12V 5V LT1236LS8 0.01µF 4.7µF VCC R1 5k C1 0.01µF – IN+ + 1/ LTC2051HV 2 IN– + R4 5k C4 0.01µF – 1/ LTC2051HV 2 R2 10Ω C2 1µF BUSY 10µF 15 14 fO REF+ LTC2440 13 4 0.1µF SCK REF– 12 SDO 11 5 CS IN+ 7 6 IN– SDI 1, 8, 9, 16 10 EXT R5 10Ω 1236ls8 TA08 C5 1µF C2, C5 TAIYO YUDEN JMK107BJ105MA 1236ls8f 12 LT1236LS8 Typical Applications Use Resistor Arrays to Provide Precise Matching in Excitation Amplifier 15V 20Ω Q1 2N3904 + 1/2 LT1112 1 – C1 0.1µF 22Ω 5V 3 LT1236LS8 + C3 47µF 2 C1 0.1µF RN1 10k 10V 1 8 RN1 10k 350Ω BRIDGE TWO ELEMENTS VARYING 5V 7 1 VCC LTC2411/ LTC2411-1 2 REF + 3 REF – 6 4 –5V 5 4 RN1 10k 3 5 C2 0.1µF GND 6 20Ω 7 15V 8 – 6 + 5 1/2 LT1112 4 –15V IN – 6 33Ω ×2 Q2, Q3 2N3906 ×2 RN1 10k IN + –15V RN1 IS LT5400ACMS8E-1 1236ls8 TA09 1236ls8f 13 LT1236LS8 Typical Applications ±10V Range Precision Measurement System VIN1 5V 2 IN OUT LT1236LS8 GND C15 4.7k 5 R20 1k 4 –2.5V R1 40k TRIM REF+ 6 5V 3 4 + 6 1 – REF+ 30 –2.5V REF+ 31 REF– 6 R5 8.87k 7 8 5 2 9 LTC2050HV –5V 28 10 VIN2 R6 30k R9 10k 2.5V 5V 29 R4 5k R3 5k C13 0.1µF –2.5V R10 7.5k C14 0.1µF 11 C10 0.1µF 12 13 17 18 21 V+ VCC CS LTC2442 SCK SD0 CH0 CH1 SDI CH2 BUSY CH3 FO COM EXT ADCINB MUOUTA ADCINA MUXOUTB 35 1 36 33 2 34 3 –2.5V 27 26 OUTA –INA +INA 25 OUTB –INB +INB GND GND GND 4 5 32 19 V– 24 –5V C9 0.1µF –2.5V C17 0.1µF 5V C8 0.1µF 2.5V 12 13 2 R21 5k 1 5 SDO 3 MMBT3904 SDI CS R1, R3, R4 ARE CADDOCK T914 –2.5V SCK R22 1.8k 6 11 10 9 74HC4053 X0 X 14 X1 Y0 Y 15 Y1 Z0 Z 4 Z1 INH A VCC 5V B VEE –2.5V C GND 1236sl8 TA10 1236ls8f 14 LT1236LS8 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. LS8 Package 8-Pin Leadless Chip Carrier (5mm × 5mm) (Reference LTC DWG # 05-08-1852 Rev Ø) 8 2.50 ±0.15 PACKAGE OUTLINE 7 1 6 2 2.54 ±0.15 5 3 1.50 ±0.15 4 0.70 ±0.05 5.00 SQ ±0.15 5.80 SQ ±0.15 APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 5.00 SQ ±0.15 1.45 ±0.10 0.95 ±0.10 4.20 SQ ±0.10 8 1 PIN 1 TOP MARK (SEE NOTE 5) R0.20 REF 8 2.00 REF 7 2 6 3 5 1 7 4.20 ±0.10 R0.20 REF 6 2 2.54 ±0.15 5 3 1.00 TYP 4 LS8 0609 REV Ø 4 0.70 TYP NOTE: 1. ALL DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS PACKAGE DO NOT INCLUDE PLATING BURRS PLATING BURRS, IF PRESENT, SHALL NOT EXCEED 0.30mm ON ANY SIDE 4. PLATING—ELECTO NICKEL MIN 1.25UM, ELECTRO GOLD MIN 0.30UM 5. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 0.10 TYP 0.64 TYP 1236ls8f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LT1236LS8 Typical Application Measure DC to Daylight Using the LTC2408 and LT1236LS8 GUARD RING 5V ELECTROMETER INPUT (pH, PIEZO) 3 7 + 2 – R5 5k, 1% 6 LT1793 DC VOLTMETER INPUT 1mV TO 1000V 4 –5V R2 4.7k 0.1% 0V TO 5V –60mV TO 4V R3, 10k C1, 0.1µF 6 5V REF + R4 1k R1 900k 0.1%, 1W, 1000 WVDC 5V MAX 10µF + LT1236LS8 OUT IN GND 4 3-WIRE R-PACK 60Hz + AC INPUT R6 10k, 0.1% 100µF 5V 5V 2 RT 3 7 – IN914 + R9 1k 1% IN914 6 LTC1050 R10 5k 1% R8 100Ω, 5% 4 20mV TO 80mV –5V R11 24.9k, 0.1% V REF 5V 50Ω 8V + R7 10k, 0.1% 1µF 60Hz–RF RF POWER 2 100Ω Pt RTD (3-WIRE) 9 CH0 10 CH1 11 CH2 12 CH3 13 CH4 14 CH5 15 CH6 17 CH7 3 2, 8 VREF VCC 24-BIT ∆∑ ADC INFRARED THERMOCOUPLE 20 19, 25 21 FO MPU 24 26 INTERNAL OSC SELECTED FOR 60Hz REJECTION 1236sl8 TA11 –2.2mV to 16mV 0V to 4V 5V DAYLIGHT HAMAMATSU PHOTODIODE S1336-5BK OMEGA 0S36-01 INFRARED DIN SERIAL DATA LINK MICROWIRE AND SPI COMPATABLE 23 LTC2408 2.7V AT 0°C 0.9V AT 40°C R12 24.9k, 0.1% V REF 5V THERMISTOR 10k NTC CLK SDO 1, 5, 6, 16, 18, 22, 27, 28 LOCAL TEMP 1µF CSMUX 8-CHANNEL MUX GND FORCE SENSE J3 4 ADCIN CSADC <1mV J1 J2 50Ω LOAD BONDED TO RTD ON INSULATED MOUNTING 7 MUXOUT R13 5k 0.1% Related Parts PART NUMBER DESCRIPTION COMMENTS LT1021 Precision References for Series or Shunt Operation in Hermetic TO-5, SOP-8, DIP-8 Package 0.05% Max Initial Error, 5ppm/°C Max Drift, 1ppm Peak-to-Peak Noise (0.1Hz to 10Hz), –55°C to 125°C (TO-5) LT1236S8/ LT1236N8 Low Drift, Low Noise, 5V and 10V Voltage Reference in SO8, and DIP8 Package 0.05% Max Initial Error, 5ppm/°C Max Drift, 1ppm Peak-to-Peak Noise (0.1Hz to 10Hz), –40°C to 85°C LTC6652LS8 High Precision, Buffered Voltage Reference Family in 5mm × 5mm Hermetic QFN Package 0.05% Max Initial Error, 5ppm/°C Max Drift, Shutdown Current <2µA, –40°C to 125°C Operation LT6654LS8 Precision, Low Noise, High Output Drive Voltage Reference 1.6ppm Peak-to-Peak Noise (0.1Hz to 10Hz, Sink/Source ±10mA, 5ppm/°C Family in 5mm × 5mm Hermetic QFN Package Max Drift, –40°C to 125°C Operation 1236ls8f 16 Linear Technology Corporation LT 0812 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2012