Ordering number: EN 4484B
CMOS LSI
LC3564RM,RT-10LV/12LV/15LV
64K (8192 words × 8 bits) SRAM
Overview
■
Common-pin input/outputs, 3-state output
The LC3564RM,RT are 8192-word × 8bit, asynchronous,
silicon gate, low-voltage CMOS SRAM LSIs.They operate from a 2.0 to 3.6V supply, making them ideal for handheld, battery-operated equipment.
■
Clock not needed (fully-static RAM)
■
Package
They are fully CMOS devices employing 2-layer A1 wiring to realize high-speed access, low operating current
consumption and very low standby current. They incorporate control signal inputs; OE for high-speed memory
access, and 2 chip enables CE1 and CE2 for power-down
and device selection.
They are ideal for systems requiring high speed, low
power and battry backup or for easy mamory expansion.
The very low standby current means that backup can also
be achieved using a capacitor.
• SOP 28-pin (450mil) plastic package: LC3564RM
series
• TSOP 28-pin (8 × 13.4mm) plastic package:
LC3564RT series
Package Dimensions
unit: mm
3158 - SOP28
[LC3564RM]
Features
■
Supply voltage range: 2.0 to 3.6V
• 3V operation: 2.7 to 3.6V
• Battery operation: 2.0 to 2.4V
■
High-speed access time
• 3V operation
- LC3564RM,RT-10LV: 100ns (max)
- LC3564RM,RT-12LV: 120ns (max)
- LC3564RM,RT-15LV: 150ns (max)
• Battery operation
- LC3564RM,RT-10LV: 200ns (max)
- LC3564RM,RT-12LV: 250ns (max)
- LC3564RM,RT-15LV: 300ns (max)
■
unit: mm
3221 - TSOP28
[LC3564RT]
Very-low standby current
• 3V operation
- Ta ≤ 70°C: 1.0µA
- Ta ≤ 85°C: 3.0µA
• Battery operation
- Ta ≤ 70°C: 0.85µA
- Ta ≤ 85°C: 2.5µA
■
Operating temperature range: –40 to +85°C
■
Data retention supply voltage: 2.0 to 3.6V
■
Input/output levels: CMOS Compatible (0.8Vcc/0.2Vcc)
■
3 control inputs (OE, CE1, CE2)
SANYO Electric Co., Ltd. Semiconductor Business Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
60597HA(ID) / 50995TH(ID) / D2293JN No. 4484—1/10
LC3564RM,RT-10LV/12LV/15LV
Pin Assignment
Block Diagram
No. 4484—2/10
LC3564RM,RT-10LV/12LV/15LV
Pin Functions
Number
Name
Function
1
NC
No connection
2 to 10, 21, 23 to 25
A0 to A12
Address inputs
27
WE
Read/write control input
22
OE
Output enable input
20, 26
CE1, CE2
Chip enable inputs
11 to 13, 15 to 19
I/O1 to I/O8
Data input/outputs
28, 14
VCC, GND
Supply and ground pins
Truth Table
CE1
CE2
OE
WE1
Read cycle
L
H
L
H
Data output
ICCA
Write cycle
L
H
X
L
Data input
ICCA
Output disable
L
H
H
H
High impedance
ICCA
H
X
X
X
High impedance
ICCS
X
L
X
X
High impedance
ICCS
Mode
I/O
Supply current
No selection
Note: X = H or L
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter
Maximum supply voltage
Symbol
Conditions
Ratings
VCC max
Unit
4.6
V
V
Input voltage range
VIN
−0.3 to VCC + 0.3
Input/output voltage range
VI/O
−0.3 to VCC + 0.3
V
Operating temperature range
Topr
−40 to +85
°C
Storage temperature range
Tstg
−55 to +125
°C
Note: Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation should be restricted to Recommended operating conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.
Inout/Output Capacitance at Ta = 25°C, f = 1 MHz
Ratings
Parameter
Input/output pin capacitance
Input pin capacitance
Symbol
CI/O
CI
Conditions
Unit
min.
typ.
max.
VI/O = 0V
-
6
10
pF
VI = 0V
-
6
10
pF
Note: Measured samples only.
No. 4484—3/10
LC3564RM,RT-10LV/12LV/15LV
3V Operation
DC Recommended Operating Ranges at Ta = –40 to +85°C, VCC = 2.7 to 3.6V
Ratings
Parameter
Symbol
Unit
min.
Supply voltage
typ.
VCC
2.7
3.6
V
VIH
0.8VCC
-
VCC + 0.3
V
VIL
−0.3*
-
0.2VCC
V
Input voltage
3.0
max.
* When pulsewidth is less than 30 ns, the minimum value is -2.0V.
DC Electrical Characteristics at Ta = –40 to +85°C, VCC = 2.7 to 3.6V
Ratings
Parameter
Symbol
Conditions
min.
Unit
typ.*
max.
Input leakage current
ILI
VIN = 0V to VCC
−1.0
-
+1.0
µA
I/O leakage current
ILO
VCE1 = VIH or VCE2 = VIL or
VOE = VIH or VWE = VIL ,
VI/O = 0V to VCC
−1.0
-
+1.0
µA
Output high level voltage
VOH
IOH = −2.0mA
VCC − 0.4
Output low level voltage
VOL
IOL = 2.0mA
ICCA1
VCE1 ≤ 0.2V,
VCE2 ≥ VCC– 0.2V,
II/O = 0mA,
VIN ≤ 0.2V or
VIN ≥ VCC– 0.2V
ICCA2
VCE1 = VIL, VCE2 = VIH,
II/O = 0mA, VIN = VIH or VIL
ICCA3
VCE1 = VIL,
VCE2 = VIH,
II/O = 0mA,
duty = 100%
VCC – 0.2V/0.2V input
Operating supply
current
CMOS input
Standby supply
current
-
-
V
-
-
0.4
V
Ta ≤ 70°C
-
0.01
1.0
µA
Ta ≤ 85°C
-
-
3.0
µA
-
-
4
mA
min. cycle
-
-
25
mA
200 ns cycle
-
-
15
mA
1 µs cycle
-
-
10
mA
-
0.01
1.0
µA
-
-
3.0
µA
-
-
1
mA
VCC − 0.2V/0.2V input
ICCS1
VCE2 ≤ 0.2V or
Ta ≤ 70°C
{VCE1 ≥ VCC− 0.2V,
VCE2 ≥ VCC− 0.2V} Ta ≤ 85°C
CMOS input
ICCS2
VCE2 = VIL or VCE1 = VIH,
VIN = 0V to VCC
* VCC = 3.0V, Ta = 25°C
No. 4484—4/10
LC3564RM,RT-10LV/12LV/15LV
AC Electrical Characteristics at Ta = –40 to +85°C, VCC = 2.7 to 3.6V
AC test conditions
Input pulse voltage level: 0.2VCC to 0.8 VCC
Input rise and fall times: 5 ns
Input/output timing level: VCC/2
Output load: 30 pF (including jig capacitance)
Read Cycle
LC3564RM,RT
Parameter
Symbol
-10LV
min.
-12LV
max.
min.
-15LV
max.
min.
Unit
max.
Read cycle time
tRC
100
-
120
-
150
-
ns
Address access time
tAA
-
100
-
120
-
150
ns
CE1 access time
tCA1
-
100
-
120
-
150
ns
CE2 access time
tCA2
-
100
-
120
-
150
ns
OE access time
tOA
-
50
-
60
-
75
ns
Output hold time
tOH
10
-
10
-
10
-
ns
CE1 output enable time
tCOE1
10
-
10
-
10
-
ns
CE2 output enable time
tCOE2
10
-
10
-
10
-
ns
OE output enable time
tOOE
5
-
5
-
5
-
ns
CE1 output disable time
tCOD1
-
35
-
40
-
50
ns
CE2 output disable time
tCOD2
-
35
-
40
-
50
ns
OE output disable time
tOOD
-
25
-
30
-
40
ns
Write Cycle
LC3564RM,RT
Parameter
Write cycle time
Symbol
tWC
-10LV
-12LV
-15LV
Unit
min.
max.
min.
max.
min.
max.
100
-
120
-
150
-
ns
Address setup time
tAS
0
-
0
-
0
-
ns
Write pulsewidth
tWP
60
-
70
-
80
-
ns
CE1 setup time
tCW1
70
-
80
-
90
-
ns
CE2 setup time
tCW2
70
-
80
-
90
-
ns
Write recovery time
tWR
0
-
0
-
0
-
ns
CE1 write recovery time
tWR1
0
-
0
-
0
-
ns
CE2 write recovery time
tWR2
0
-
0
-
0
-
ns
Data setup time
tDS
50
-
55
-
60
-
ns
Data hold time
tDH
0
-
0
-
0
-
ns
CE1 data hold time
tDH1
0
-
0
-
0
-
ns
CE2 data hold time
tDH2
0
-
0
-
0
-
ns
WE output enable time
tWOE
5
-
5
-
5
-
ns
WE output disable time
tWOD
-
35
-
40
-
45
ns
No. 4484—5/10
LC3564RM,RT-10LV/12LV/15LV
Battery Operation
DC Recommended Operating Ranges at Ta = –40 to +85°C, VCC = 2.0 to 2.4V
Ratings
Parameter
Symbol
Supply voltage
Unit
min.
typ.
VCC
2.0
2.2
2.4
V
VIH
0.8VCC
-
VCC + 0.3
V
VIL
–0.3
-
0.2VCC
V
Input voltage
max.
DC Electrical Characteristics at Ta = –40 to +85°C, VCC = 2.0 to 2.4V
Ratings
Parameter
Symbol
Conditions
Unit
min.
typ.*
max.
ILI
VIN = 0V to VCC
–1.0
-
+1.0
µA
I/O leakage current
ILO
VCE1 = VIH or VCE2 = VIL or
VOE = VIH or VWE = VIL ,
VI/O = 0V to VCC
–1.0
-
+1.0
µA
Output high level voltage
VOH
IOH = –0.5mA
VCC – 0.2
-
-
V
Output low level voltage
VOL
IOL = 0.5mA
ICCA1
VCE1 ≤ 0.2V,
VCE2 ≥ VCC– 0.2V,
II/O = 0mA,
VIN ≤ 0.2V or
VIN ≥ VCC– 0.2V
ICCA2
VCE1 = VIL, VCE2 = VIH,
II/O = 0mA, VIN = VIH or VIL
ICCA3
VCE1 = VIL,
VCE2 = VIH,
II/O = 0mA,
duty = 100%
VCC – 0.2V/0.2V input
CMOS input
Input leakage current
VCC – 0.2V/0.2V input
Operating supply
current
-
-
0.2
V
Ta ≤ 70°C
-
0.01
0.85
µA
Ta ≤ 85°C
-
-
2.5
µA
-
-
2
mA
min. cycle
-
-
10
mA
1 µs cycle
-
-
5
mA
VCE2 ≤ 0.2V or
Ta ≤ 70°C
{VCE1 ≥ VCC– 0.2V,
VCE2 ≥ VCC– 0.2V} Ta ≤ 85°C
-
0.01
0.85
µA
ICCS1
-
-
2.5
µA
ICCS2
VCE2 = VIL or VCE1 = VIH,
VIN = 0V to VCC
-
-
800
mA
CMOS input
Standby supply
current
* VCC = 2.2V, Ta = 25°C
No. 4484—6/10
LC3564RM,RT-10LV/12LV/15LV
AC Electrical Characteristics at Ta = –40 to +85°C, VCC = 2.0 to 2.4V
AC test conditions
Input pulse voltage level: 0.2VCC to 0.8 VCC
Input rise and fall times: 10 ns
Input/output timing level: VCC/2
Output load: 30 pF (including jig capacitance)
Read Cycle
LC3564RM,RT
Parameter
Symbol
-10LV
min.
-12LV
max.
min.
-15LV
max.
min.
Unit
max.
Read cycle time
tRC
200
-
250
-
300
-
ns
Address access time
tAA
-
200
-
250
-
300
ns
CE1 access time
tCA1
-
200
-
250
-
300
ns
CE2 access time
tCA2
-
200
-
250
-
300
ns
OE access time
tOA
-
120
-
130
-
150
ns
Output hold time
tOH
10
-
10
-
10
-
ns
CE1 output enable time
tCOE1
10
-
10
-
10
-
ns
CE2 output enable time
tCOE2
10
-
10
-
10
-
ns
OE output enable time
tOOE
5
-
5
-
5
-
ns
CE1 output disable time
tCOD1
-
70
-
80
-
100
ns
CE2 output disable time
tCOD2
-
70
-
80
-
100
ns
OE output disable time
tOOD
-
50
-
60
-
80
ns
Write Cycle
LC3564RM,RT
Parameter
Write cycle time
Symbol
tWC
-10LV
-12LV
-15LV
Unit
min.
max.
min.
max.
min.
max.
200
-
250
-
300
-
ns
Address setup time
tAS
0
-
0
-
0
-
ns
Write pulsewidth
tWP
120
-
140
-
160
-
ns
CE1 setup time
tCW1
140
-
160
-
180
-
ns
CE2 setup time
tCW2
140
-
160
-
180
-
ns
Write recovery time
tWR
0
-
0
-
0
-
ns
CE1 write recovery time
tWR1
0
-
0
-
0
-
ns
CE2 write recovery time
tWR2
0
-
0
-
0
-
ns
Data setup time
tDS
120
-
130
-
150
-
ns
Data hold time
tDH
0
-
0
-
0
-
ns
CE1 data hold time
tDH1
0
-
0
-
0
-
ns
CE2 data hold time
tDH2
0
-
0
-
0
-
ns
WE output enable time
tWOE
5
-
5
-
5
-
ns
WE output disable time
tWOD
-
70
-
80
-
90
ns
No. 4484—7/10
LC3564RM,RT-10LV/12LV/15LV
Timing Chart
Read Cycle: Note 1
Write Cycle 1 (WE write): Note 6
No. 4484—8/10
LC3564RM,RT-10LV/12LV/15LV
Write Cycle 2 (CE1 write): Note 6
Write Cycle 3 (CE2 write): Note 6
Note: 1. We should be held high level during the read cycle
2. Do not apply external signals that are out-of-phase with DOUT
3. tWP is a period when CE1 and WE are LOW and CE2 is HIGH. It is measured from when WE goes low level to when either CE1 and WE go HIGH or CE2 goes
LOW, whichever occurs first.
4. tCW1 and tCW2 are periods when CE1 and WE are LOW and CE2 is HIGH. They are measured from when CE1 goes LOW and CE2 goes HIGH, respectively,
to when either CE1 and WE go HIGH or CE2 goes LOW, whichever occurs first.
5. The outputs DOUT1 to DOUT8 are in a high-impedance state when OE is HIGH, CE1 is HIGH, CE2 is LOW and WE is LOW.
6. During the write cycle, OE is VIH or VIL.
7. DOUT has the same phase as the write data.
No. 4484—9/10
LC3564RM,RT-10LV/12LV/15LV
Data Retention Characteristics at Ta = –40 to +85°C
3V Operation
Ratings
Parameter
Symbol
Conditions
VCE1 ≥ VCC – 0.2V,
VCE2 ≥ VCC – 0.2V or
VCE2 ≤ 0.2V
Unit
min.
typ.
max.
2.0
-
3.6
Data retention supply voltage
VDR
V
Chip enable setup time
tCDR
0
-
-
ns
Chip enable hold time
tR
tRC
-
-
ns
Note: tRC is the read cycle time.
Data Retention Waveform 1 (CE1 control)
Data Retention Waveform 2 (CE2 control)
Battery Operation
Ratings
Parameter
Data retention supply voltage
Symbol
VDR
Conditions
VCE1 ≥ VCC – 0.2V,
VCE2 ≥ VCC – 0.2V or
VCE2 ≤ 0.2V
Unit
min.
typ.
max.
2.0
-
3.6
V
■
No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear
power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury,
death or property loss.
■
Anyone purchasing any products described or contained herein for an above-mentioned use shall:
➀
Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their
officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated
with such use:
➁
Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO.,
LTD., its affiliates, subsidiaries and distributors or any of their officers and employees, jointly or severally.
■
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO
believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of
intellectual property rights or other rights of third parties.
This catalog provides information as of June, 1997. Specifications and information herein are subject to change without notice.
No. 4484—10/10