NJU3552 PRELIMINARY 4-BIT SINGLE CHIP OTP MICRO CONTROLLER ■ PACKAGE OUTLINE ■ GENERAL DESCRIPTION The NJU3552 is the C-MOS 4-bit Single Chip OTP type Micro Controller with programmable Flash Memory. It is completely compatible with the NJU3502 in function and the pin configuration. Therefore, the NJU3552 is suitable for the final evaluation before NJU3502 mask generation, the small quantity production and short leadtime. * NJU3552L NJU3552M In this data sheet, only OTP programming and the difference between NJU3552 and NJU3502 are mentioned mainly. Therefore the detail function and specification should be referred on the NJU3502 data sheet. ■ FEATURES ● ● ● ● ● Internal One Time Programmable ROM 1,024 X 8bits Internal Data RAM 64 X 4bits Wide operating voltage range 2.7V ~ 5.5V Package outline SDIP24 / DMP24 ROM programmer “SUPERPRO/L” by XELTEK co,. ■ PIN CONFIGURATION IN OTP PROGRAMMING MODE 1 24 D0 2 23 CNT2 D1 3 22 CNT1 D2 4 21 D7 5 20 6 19 7 18 8 17 D6 9 16 D5 CLK 10 15 REQ 11 14 12 13 Open Open D3 Open PROM VSS VDD Open D4 Open RESET Note) The pin configuration in Normal operating mode is the same as NJU3502. -1- -2- SCK/CKOUT SDI(O)/PF1 SIO TIMER PC *1 PORT_A *3 ID IR 1024 x 8 bit OTP ROM MUX TLU addr STACK ALU Y’ Reg Y Reg PORT_B *1 *2 64 x 4 bit RAM X’ Reg X Reg CPU CORE PORT_C AC *1 *3 PC3 PC2 PC1 PC0 PB3 PB2 PB1 PB0 PA3 PA2 PA1 PA0 *1 refer [INPUT OUTPUT TERMINAL TYPE] *2 Input / Output direction of 4-bit group is changed by the program. *3 Input / Output direction of each bit is selected by mask option. INT3 INT2 INT1 Logic PORT_D *1 *3 STANDBY CONTROLLER CPU TIMING GENERATOR OSC PRESCALER OSC2 OSC1 RESET TEST VSS VDD ■ BLOCK DIAGRAM SDO/PF0 EXTI/PE0 Interrupt NJU3552 NJU3552 PD1 PD0 NJU3552 ■ TERMINAL DESCRIPTION IN OTP PROGRAMMING MODE No. SYMBOL INPUT/OUTPUT FUNCTION 13 RESET INPUT RESET terminal. When the low-level input-signal, the system is initialized. 2 - 4, 7, 15 - 17, 21 22, 23 11 10 9 24 12 Note 1) 2) D0 - D7 INPUT/OUTPUT Data bus CNT1 CNT2 REQ CLK PROM VDD VSS INPUT INPUT OUTPUT INPUT INPUT - OTP control input terminal Request output terminal Clock input terminal OTP programming enable terminal Power Source (5V) Power Source (0V) Use at VDD=5V in OTP programming mode. Non connect anything to the other terminals. ■ Difference between NJU3552 (OTP version) and NJU3502 (MASK version) ● Operating mode NJU3552 has two operating modes. One is ”Normal operating mode” and the other is “OTP programming mode”. ● • Normal operating mode The ”TEST” terminal is set to low level. (The terminal is recommended to connect to GND.) Operating voltage range; 2.7V ~ 5.5V. • OTP Programming mode User program is read out from or written into the OTP by the universal programmer “SUPERPRO/L” and converting adapter made by XELTEK co,.(USA). Option information set in the initialization When the initialization is performed(RESET terminal is “L”), the operation information stored in option area is set as shown in the following timing chart . The option information is set in the term of 1 / fOSC x 256clock after RESET releasing and oscillation stability time. After information set, the program counter is set to 0000H and the NJU3552 operates in normal. [ TIMING CHART ] Oscillation Stability Time Option information setting 1/fOSCx256clock Normal Operation Oscillator Clock Oscillation Start RESET PC=0000H fOSC=4MHz about 64µsec -3- NJU3552 ■ ABSOLUTE MAXIMUM RATINGS (Ta=25°C) PARAMETER SYMBOL RATINGS UNIT Supply Voltage VDD -0.3 ~ +7.0 V Input Voltage VIN -0.3 ~ VDD + 0.3 V Output Voltage VOUT -0.3 ~ VDD + 0.3 V Operating Temperature Topr -20 ~ +75 °C Storage Temperature Tstg -55 ~ +125 °C Note) The difference of electrical characteristics between NJU3552 (OTP version) and NJU3502 (MASK version) NJU3502 NJU3552 Supply Voltage (VDD) MIN. 2.4V → 2.7V Supply Current 5V (IDD1) Max. (IDD2) Max. (IDD3) Max. (IDD4) Max. 4.0mA 4.0mA 3.8mA 4.0µA → → → 30mA 30mA 30mA 20µA 2.0mA 2.0mA 1.8mA 2.0µA → → 20mA 20mA 20mA 20µA • • 3V -4- (IDD1) Max. (IDD2) Max. (IDD3) Max. (IDD4) Max. → NJU3552 ■ ELECTRICAL CHARACTERISTICS DC CHARACTERISTICS 1 (VDD=3.6~5.5V, VSS=0V, Ta=-20~75°C) PARAMETER Supply Voltage SYM BOL VDD IDD1 IDD2 Supply Current IDD3 IDD4 IDD5 High-Level Input Voltage Low-level Input Voltage High-Level Input Current VIH1 VIH2 VIH3 VIL1 VIL2 VIL3 IIH IIL1 Low-Level Input Current IIL2 High-Level Output Voltage Low-Level Output Voltage VOH VOL1 VOL2 Output Leakage Current IOD CONDITIONS MIN VDD VDD VDD=5V, fOSC=2MHz X’tal Oscillation in Reset VDD VDD=5V, fOSC=2MHz Ceramic Oscillation in Reset VDD VDD=5V, fOSC=2MHz CR Oscillation in Reset VDD VDD=5V, STANDBY Mode VDD VDD=5V, fOSC=4MHz, Operating PA0~PA3, PB0~PB3, PC0~PC3, SDI(O)/PF1, SCK/CKOUT PD0, PD1, EXTI/PE0, RESET OSC1 PA0~PA3, PB0~PB3, PC0~PC3, SDI(O)/PF1, SCK/CKOUT PD0, PD1, EXTI/PE0, RESET OSC1 VDD=5.5V, VIN=5.5V PA0~PA3, PB0~PB3, PC0~PC3, PD0, PD1, EXTI/PE0, SDI(O)/PF1, RESET, SCK/CKOUT VDD=5.5V, VIN=0V Without pull-up resistance PA0~PA3, PB0~PB3, PC0~PC3, PD0, PD1, EXTI/PE0, SDI(O)/PF1, RESET VDD=5.5V, VIN=0V With pull-up resistance PA0~PA3, PB0~PB3, PC0~PC3, PD0, PD1, EXTI/PE0, SDI(O)/PF1, SCK/CKOUT IOH=-100µA PA0~PA3, PC0~PC3, PD0, PD1, SDO/PF0, SDI(O)/PF1, SCK/CKOUT IOL1=400µA PA0~PA3, PC0~PC3, PD0, PD1, SDO/PF0, SDI(O)/PF1, SCK/CKOUT IOL2=15mA PB0~PB3 3.6 CIN MAX UNIT NOTE 5.5 V 30 mA *3 30 mA *3 30 mA *3 20 µA *3 30 mA *3 0.7VDD VDD V *1 0.8VDD VDD-1.0 VDD VDD V V *1 0 0.3VDD V *1 0 0 0.2VDD 1.0 V V *1 10 µA *1 -10 µA *1 -100 µA *1 V *2 0.5 V *2 2.0 V *2 10 µA *2 20 pF VDD-0.5 VDD=5.5V, VOH=5.5V PB0~PB3 Except VDD, VSS terminals fOSC=1MHz Other terminals : 0V *1 Input/output port is set as an Input terminal. *2 Input/output port is set as an Output terminal. *3 Except the current through Pull-up resister. Input Capacitance TYP 10 -5- NJU3552 ■ ELECTRICAL CHARACTERISTICS DC CHARACTERISTICS 2 (VDD=2.7~3.6V, VSS=0V, Ta=-20~75°C) PARAMETER Supply Voltage SYM BOL VDD IDD1 IDD2 Supply Current IDD3 IDD4 IDD5 High-Level Input Voltage Low-level Input Voltage High-Level Input Current VIH1 VIH2 VIH3 VIL1 VIL2 VIL3 IIH IIL1 Low-Level Input Current IIL2 High-Level Output Voltage Low-Level Output Voltage VOH VOL1 VOL2 Output Leakage Current IOD CONDITIONS MIN VDD VDD VDD=3V, fOSC=1MHz X’tal Oscillation in Reset VDD VDD=3V, fOSC=1MHz Ceramic Oscillation in Reset VDD VDD=3V, fOSC=1MHz CR Oscillation in Reset VDD VDD=3V, STANDBY Mode VDD VDD=3V, fOSC=2MHz, Operating PA0~PA3, PB0~PB3, PC0~PC1, SDI(O)/PL1, SCK/CKOUT PD0, PD1, EXTI/PE0, RESET OSC1 PA0~PA3, PB0~PB3, PC0~PC3, SDI(O)/PF1, SCK/CKOUT PD0, PD1, EXTI/PE0, RESET OSC1 VDD=3.6V, VIN=3.6V PA0~PA3, PB0~PB3, PC0~PC3, PD0, PD1, EXTI/PE0, SDI(O)/PF1, RESET, SCK/CKOUT VDD=3.6V, VIN=0V Without pull-up resistance PA0~PA3, PB0~PB3, PC0~PC3, PD0, PD1, EXTI/PE0, SDI(O)/PF1, RESET VDD=3.6V, VIN=0V With pull-up resistance PA0~PA3, PB0~PB3, PC0~PC3, PD0, PD1, EXTI/PE0, SDI(O)/PF1, SCK/CKOUT IOH=-80µA PA0~PA3, PC0~PC3, PD0, PD1, SDO/PF0, SDI(O)/PF1, SCK/CKOUT IOL1=350µA PA0~PA3, PC0~PC3, PD0, PD1, SDO/PF0, SDI(O)/PF1, SCK/CKOUT IOL2=5mA PB0~PB3 2.7 -6- CIN MAX UNIT NOTE 3.6 V 20 mA *3 20 mA *3 20 mA *3 20 µA *3 20 mA *3 0.8VDD VDD V *1 0.85VDD VDD-0.3 VDD VDD V V *1 0 0.2VDD V *1 0 0 0.15VDD 0.3 V V *1 10 µA *1 -10 µA *1 -100 µA *1 V *2 0.5 V *2 1.0 V *2 10 µA *2 20 pF VDD-0.5 VDD=3.6V, VOH=3.6V PB0~PB3 Except VDD, VSS terminals fOSC=1MHz Other terminals : 0V *1 Input/output port is set as an Input terminal. *2 Input/output port is set as an Output terminal. *3 Except the current through Pull-up resister. Input Capacitance TYP 10 NJU3552 ■ ELECTRICAL CHARACTERISTICS AC CHARACTERISTICS 1 (VSS=0V, Ta= -20~75°C) PARAMETER SYM BOL CONDITIONS VDD=2.7~3.6V Operating Frequency fOSC VDD=3.6~5.5V Instruction Cycle Time External Clock Pulse Width External Clock Rise Time Fall Time RESET Low-Level Width RESET Rise Time Port Input Level Width Edge Detection (PD1) Rise Time Fall Time Restart Signal (PD0) Rise Time External interrupt input (EXTI) Rise Time X’tal Resonator Ceramic Resonator External Resistor Oscillation External Clock X’tal Resonator Ceramic Resonator External Resistor Oscillation External Clock MIN TYP MAX 0.03 0.03 2.0 2.0 0.03 1.0 0.03 0.03 0.03 2.0 4.0 4.0 0.03 2.0 0.03 4.0 6/fOSC tC 250 125 UNIT MHz s tCPH tCPL VDD=2.7~3.6V VDD=3.6~5.5V 16600 16600 ns tCPR tCPF VDD=2.7~5.5V 20 ns tRST VDD=2.7~5.5V tRSR VDD=2.7~5.5V tPIN VDD=2.7~5.5V tEDR tEDF VDD=2.7~5.5V 200 ns tSTR VDD=2.7~5.5V 200 ns tEXR VDD=2.7~5.5V 200 ns 4/fOSC s 20 6/fOSC ms s -7- NJU3552 ■ AC CHARACTERISTICS 1 TIMING CHART EXTERNAL CLOCK 1/fOSC VIH3 OSC1 VIL3 tCPH tCPF RESET INPUT tRST tCPR tCPL tRSR VIH2 RESET VIL2 PORT INPUT tPIN VIH1, VIH2 PORT VIL1, VIL2 EDGE DETECTOR INPUT tEDF tEDR VIH2 PD1 VIL2 RESTART SIGNAL INPUT tSTR VIH2 PD0 VIL2 EXTERNAL INTERRUPT tEXR VIH2 EXTI VIL2 -8- NJU3552 ■ ELECTRICAL CHARACTERISTICS AC CHARACTERISTICS 2 SERIAL INTERFACE (VSS=0V, VDD=2.7~5.5V, Ta= -20~75°C) PARAMETER SYM BOL Serial Operating Frequency fSC Clock Pulse Width Low-Level tSCL CONDITIONS MIN Internal Clock External Clock Internal Clock tSCH Internal Clock VDD=2.7~3.6V fOSC=2MHz VDD=3.6~5.5V fOSC=4MHz UNIT 3.0 µs 1.5 1.0 VDD=2.7~3.6V fOSC=2MHz VDD=3.6~5.5V fOSC=4MHz 3.0 µs 1.5 External Clock SDI setup Time tDS To SCK SDI Hold time tDH To SCK SDO Data t Fix Time To SCK DCD * The dividing ratio of the internal clock is 1/2. ■ AC CHARACTERISTICS 2 MAX (1/12)×fOSC* Hz 500k External Clock Clock Pulse Width High-Level TYP 1.0 0.5 µs 0.5 µs 0.5 µs SERIAL INTERFACE TIMING CHART 1/fSC tSCL tSCH VIH1 SCK VIL1 tDS tDH VIH1 SDI(O) INPUT DATA VIL1 tDCD VOH OUTPUT DATA SDO/SDI(O) VOL1 -9- NJU3552 ■ OPTION as same as mask version (NJU3502) 1) INPUT OUTPUT Terminal Selection All of input-output terminals select a terminal type for each port from the following table1 and table2 by the mask option. [ CIRCUIT TYPE TABLE 1 ] TERMINAL TYPES PA0 PA1 PA2 PA3 PB0 PB1 PB2 PB3 PC0 ICP IC ICP IC ICP IC ICP IC OC Programmable Input / Output Port of Output SYMBOL Port of Input Input / Output Terminal*1 EXTRA FUNCTION REMARKS OC OC OC IOP IO IOP IO IOP IO IOP IO ICP OC IC PC1 ICP OC IC PC2 ICP OC IC PC3 ICP OC IC Note) The symbol in the above table is the same as in mask option generator software. *1) The symbol and the detail circuits of INPUT OUTPUT TERMINAL are written in INPUT OUTPUT TERMINAL TYPE. - 10 - NJU3552 [ CIRCUIT TYPE TABLE 2 ] TERMINAL TYPES PD1 EXTI / PE0 *2 SDO / PF0 SDI(O) / PF1 *2 SCK / CKOUT *2 *3 Port of Output PD0 Port of Input SYMBOL Programmable Input / Output Input / Output Terminal*1 ISP IS ISP IS ISP IS OC Restart signal input OC Edge detection ICP IC OC OC EXTRA FUNCTION IIP II SO SDP SD SCP SC External interrupt input (EXTI) Serial data output Serial data input/output REMARKS R F Rise edge detection Fall edge detection MSB MSB first LSB LSB first Serial clock input/output Output clock divide by pre-scaler Note) The symbol in the above table is the same as in mask option generator software. *1) The symbol and the detail circuits of INPUT OUTPUT TERMINAL are written in INPUT OUTPUT TERMINAL TYPE. *2) The pull-up resistance is added to the terminal selected as the extra function. *3) When Serial INPUT-OUTPUT is selected, “SCK” is selected automatically. When it is not selected, “CKOUT” is selected automatically. - - 11 - NJU3552 [MASK OPTION LIST] SYM BOL FUNCTION SYM BOL FUNCTION ICP C-MOS input with pull-up resistance MSB Serial data order MSB first ISP C-MOS Schmitt trigger input with pull-up resistance LSB Serial data order LSB first IC C-MOS input 1 1/2 IS C-MOS Schmitt trigger input 2 1/4 OC C-MOS output 3 1/8 IIP External interrupt input with pull-up resistance 4 1/16 External interrupt input 5 1/32 Serial data input/output with pull-up resistance 6 1/64 SD Serial data input/output 7 1/128 SO Serial data output 8 1/256 Serial clock input/output with pull-up resistance 9 1/512 SC Serial clock input/output a 1/1024 IOP Programmable input/output with pull-up resistance b 1/2048 IO Programmable input/output c 1/4096 R Rise edge detection F Fall edge detection II SDP SCP - 12 - NJU3552 [ INPUT OUTPUT TERMINAL TYPE ] Types With Pull-up Without Pull-up Terminals Type ICP Type IC PA0~PA3, PC0~PC3, SDI(O)/PF1 Type ISP Type IS PD0, PD1, EXTI/PE0 Type ON PA0~PA3, PC0~PC3, PD0, PD1, SDO/PF0, SDI(O)/PF1 INPUT TERMINAL C-MOS SCHMITT TRIGGER PROGRAMMABLE INPUT OUTPUT TERMINAL OUTPUT TERMINAL C-MOS Type ONP Type ON Type IOP Type IO N-channel(Nch) OPEN DRAIN PB0~PB3 C-MOS INPUT / Nch OPEN DRAIN OUTPUT - 13 - NJU3552 2) Edge Detector Selection PD1 terminal is added the “Edge detect function” by the mask option. Rising edge Falling edge 3) The data order (MSB, LSB) of the Serial Interface The data order of the Serial Interface is selected select either MSB or LSB first by the mask option. 4) Dividing ration of the internal clock Each dividing ration of the count clocks of Timer, the Internal shift clock of the Serial Interface and the output clock through the SCK/CKOUT terminal is selected among the following by the mask option. The frequency of each clock is determined by the dividing ration and the 1-instruction term (1/fOSCx6). 1/2, 1/4, 1/8, 1/16, 1/32, 1/64, 1/128, 1/256, 1/512, 1/1024, 1/2048, 1/4096 Note) As the shift clock of the serial interface, the external clock or the internal is selected by the program. [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. - 14 -