LED Drivers for LCD Backlights
White Backlight LED Driver
for Medium to Large LCD Panels
(Switching Regulator Type)
BD8119FM-M
No.11040EBT17
●Description
BD8119FM-M is a white LED driver with the capability of withstanding high input voltage (36V MAX).
This driver has 4ch constant-current drivers integrated in 1-chip, which each channel can draw up to 150mA max, so that
high brightness LED driving can be realized.
Furthermore, a current-mode buck-boost DC/DC controller is also integrated to achieve stable operation against unstable
car-battery voltage input and also to remove the constraint of the number of LEDs in series connection.
The brightness can be controlled by either PWM or VDAC techniques.
●Features
1) Input voltage range is 5.0 to 30 V
2) Integrated buck-boost current-mode DC/DC controller
3) Four integrated LED current driver channels (150mA max. each channel)
4) PWM Light Modulation (Minimum Pulse Width 25µs)
5) Built-in protection functions (UVLO, OVP, TSD, OCP, SCP)
6) Abnormal status detection function (OPEN/ SHORT)
7) HSOP-M28 package
●Applications
Backlight for car navigation, dashboard panels, etc.
(※ Recommended Component of Toshiba Matsushita Display Technology Co.,Ltd. )
●Absolute maximum ratings (Ta=25℃)
Parameter
Power supply voltage
BOOT ,OUTH Voltage
Symbol
Ratings
Unit
VCC
36
V
VBOOT, VOUTH
41
V
VSW, VCS, VOUTH
36
V
VBOOT-SW
7
V
VLED1～4
VVREG, VOVP, VOUTL, VFAIL1, VFAIL2,
VLEDEN1, VLEDEN2, VISET, VVDAC,
VPWM, VSS, VCOMP, VRT, VSYNC, VEN
Pd
36
V
-0.3～7 < VCC
V
※1
W
Operating temperature range
Topr
-40～+95
℃
Storage temperature range
Tstg
-55～+150
℃
ILED
※2 ※3
SW,CS Voltage
BOOT-SW Voltage
LED output voltage
VREG, OVP, OUTL, FAIL1, FAIL2,
LEDEN1, LEDEN2, ISET, VDAC,
PWM, SS, COMP, RT, SYNC, EN Voltage
Power Consumption
LED maximum output current
2.20
150
mA
※1 IC mounted on glass epoxy board measuring 70mm×70mm×1.6mm, power dissipated at a rate of 17.6mw/℃ at temperatures above 25℃.
※2 Dispersion figures for LED maximum output current and VF are correlated. Please refer to data on separate sheet.
※3 Amount of current per channel.
●Operating conditions (Ta=25℃)
Parameter
Power supply voltage
Oscillating frequency range
External synchronization frequency range
※4 ※5
External synchronization pulse duty range
Symbol
Ratings
Unit
VCC
5.0～30
V
FOSC
250～550
kHz
FSYNC
fosc～550
kHz
FSDUTY
40～60
%
※4 Connect SYNC to GND or OPEN when not using external frequency synchronization.
※5 Do not switch between internal and external synchronization when an external synchronization signal is input to the device.
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1/20
2011.08 - Rev.B
Technical Note
BD8119FM-M
●Electrical Characteristics (unless otherwise specified, VCC=12V Ta=25℃)
Limits
Parameter
Symbol
Min
Typ
Max.
Unit
Conditions
Circuit current
ICC
-
7
14
mA
EN=Hi, SYNC=Hi, RT=OPEN
PWM=Low, ISET=OPEN, CIN=10µF
Standby current
IST
-
4
8
µA
EN=Low
VREG
4.5
5
5.5
V
IREG=-5mA, CREG=2.2µF
OUTH high-side ON resistance
RONHH
1.0
3
4.5
Ω
ION=-10mA
OUTH low-side ON resistance
RONHL
0.5
2
3.0
Ω
ION=10mA
Over-current protection
operating voltage
VOLIMIT
VCC
-0.66
VCC
-0.6
VCC
-0.54
V
OUTH high-side ON resistance
RONLH
1.0
3
4.5
Ω
ION=-10mA
OUTH low -side ON resistance
RONLL
0.5
2
3.0
Ω
ION=10mA
RON_SW
1.0
2.0
4.0
Ω
ION_SW=10mA
VLED
0.9
1.0
1.1
V
ICOMPSINK
15
25
35
µA
VLED=2V, Vcomp=1V
ICOMPSOURCE
-35
-25
-15
µA
VLED=0V, Vcomp=1V
fOSC
250
300
350
KHz
Over-voltage detection
reference voltage
VOVP
1.9
2.0
2.1
V
VOVP=Sweep up
OVP hysteresis width
VOHYS
0.45
0.55
0.65
V
VOVP=Sweep down
SCP Latch OFF Delay Time
TSCP
70
100
130
ms
UVLO voltage
VUVLO
4.0
4.3
4.6
V
UVLO hysteresis width
VUHYS
50
150
150
mV
[VREG Block (VREG)]
Reference voltage
[OUTH Block]
[OUTL Block]
[SW Block]
SW low -side ON resistance
[Error Amplifie Block]
LED voltage
COMP sink current
COMP source current
[Oscillator Block]
Oscillating frequency
RT=100kΩ
[OVP Block]
RT=100kΩ
[UVLO Block ]
VCC : Sweep down
VCC : Sweep up
◎ This product is not designed for use in radioactive environments.
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2/20
2011.08 - Rev.B
Technical Note
BD8119FM-M
●Electrical Characteristics – Continued (unless otherwise specified, VCC=12V Ta=25℃)
Limits
Parameter
Symbol
Unit
Min
Typ
Max.
Conditions
[LED Output Block]
LED current
relative dispersion width
LED current
absolute dispersion width
ILED=50mA,
ΔILED1=(ILEDILED_AVG-1)×100
ILED=50mA,
ΔILED2=(ILED50mA-1)×100
△ILED1
-3
-
+3
%
△ILED2
-5
-
+5
%
ISET voltage
VISET
1.96
2.0
2.04
V
RISET 1=120kΩ
PWM minimum pulse width
Tmin
25
-
-
µs
FPWM=150Hz, ILED=50mA
PWM maximum duty
Dmax
-
-
100
%
FPWM=150Hz, ILED=50mA
fPWM
-
-
20
KHz
Duty=50%, ILED=50mA
VDAC gain
GVDAC
-
25
-
mA/V
VDAC=0～2V, RISET=120kΩ
ILED=VDAC÷RISET×Gain
Open detection voltage
VOPEN
0.2
0.3
0.4
V
VLED= Sweep down
LED Short detection Voltage
VSHORT
4.4
4.7
5.0
V
VOVP= Sweep up
LED Short Latch OFF Delay Time
TSHORT
70
100
130
ms
RT=100kΩ
TPWM
70
100
130
ms
RT=100kΩ
PWM frequency
PWM Latch OFF Delay Time
[Logic Inputs (EN, SYNC, PWM, LEDEN1, LEDEN2)]
Input HIGH voltage
VINH
2.1
-
5.5
V
Input LOW voltage
VINL
GND
-
0.8
V
Input current 1
IIN
20
35
50
µA
VIN=5V
(SYNC, PWM, LEDEN1, LEDEN2)
Input current 2
IEN
15
25
35
µA
VEN=5V (EN)
VOL
-
0.1
0.2
V
IOL=0.1mA
[FAIL Output (open drain) ]
FAIL LOW voltage
◎ This product is not designed for use in radioactive environments.
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3/20
2011.08 - Rev.B
Technical Note
BD8119FM-M
●Reference data (unless otherwise specified, Ta=25℃)
400
5.3
VCC=12V
5.1
4.9
4.7
4.5
-40
-15
10
35
60
TEMPERATURE:Ta [℃]
360
VCC=12V
320
280
240
200
85
VCC= 12V
51
49
47
-15
10
35
60
TEMPERATURE:Ta [℃]
85
0.5
VCC= 12V
51
49
47
40
30
20
10
45
0
-40
-15
10
35
60
TEMPERATURE:Ta [℃]
85
4
3
2
1
0
0
0.5
1
1.5
VDAC VOLTAGE:VDAC[V]
2
0
Fig.5 VDAC Gain①
Fig.4 ILED
temperature characteristic
85
8.0
VCC=12V
55
OUTPUT CARRENT:Icc [mA]
85
EFFICIENCY [%]
10.0
EFFICIENCY [%]
100
VCC=30V
70
VCC=30V
VCC=15V
55
40
40
25
6.0
VCC=12V
4.0
2.0
Fig.7 Efficiency
(Depend on input voltage)
0.66
0.62
0.60
0.58
VCC=12V
0.56
0
150
275
400
525
OUTPUT CURRENT [mA]
10
10
8
8
6
4
2
0
0.54
-15
10
35
60
TEMPERATURE:Ta [℃]
85
Fig.10 Overcurrent detecting
voltage temperature characteristic
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6
12
18
24
30
SUPPLY VOLTAGE:Vcc [V]
36
Fig.9 Circuit Current
(Switching OFF)
Fig.8 Efficiency
(Depend on output voltage)
OUTPUT VOLTAGE:VREG [V]
0.64
0.0
25
150
275
400
525
OUTPUT CURRENT [mA]
OUTPUTCURRENT :ILED [mA]
25
-40
0.1
VCC=4V
VCC=5V
25
0.02
0.04
0.06
0.08
VDAC VOLTAGE:VDAC[V]
Fig.6 VDAC Gain②
100
70
4.5
5
OUTPUTCURRENT :ILED [mA]
OUTPUTCURRENT :ILED [mA]
50
53
1.5
2.5
3.5
LED VOLTAGE:VLED[V]
Fig.3 ILED depend on VLED
Fig.2 OSC
temperature characteristic
55
OUTPUT VOLTAGE:Vcc-Vcs [V]
53
45
-40
Fig.1 VREG
temperature characteristic
OUTPUTCURRENT :ILED [mA]
55
OUTPUTCURRENT :ILED [mA]
SWITCHING FREQUENCY:FOSC [kHz]
OUTPUT VOLTAGE:VREG [V]
5.5
6
4
2
0
0
1
2
3
4
EN VOLTAGE:VEN [V]
5
Fig.11 EN threshold voltage
4/20
0
1
2
3
4
PWM VOLTAGE:VEN [V]
5
Fig.12 PWM threshold voltage
2011.08 - Rev.B
Technical Note
BD8119FM-M
●Block diagram
COUT
VREG
Vin
CIN
UVLO
OVP
TSD
OVP
VCC
VREG
EN
OCP
＋
－
Timer
Latch
PWM
CS
FAIL1
BOOT
Control Logic
OUTH
DRV
SYNC
RT
SLOPE
SW
CTL
－
PWM
＋
DGND
OSC
VREG
CRT
RT
OUTL
ERR AMP
－
－
－
－
＋
COMP
Ccomp
RPC
OCP OVP
GND
LED1
CPC
SS
LED2
SS
CSS
Current driver
LED3
PWM
LED4
ISET
VDAC
PGND
Open Short Detect
ISET
Open Det
RISET
Timer
Latch
Short Det
FAIL2
LEDEN1
LEDEN2
Fig.13
●Pin layout
COMP
1
28
SS
2
27
VCC
3
26
EN
4
25
RT
5
24
SYNC
6
23
GND
7
22
PWM
8
21
FAIL1
9
20
FAIL2
10
19
LEDEN1
11
18
LEDEN2
12
17
LED1
13
16
LED2
14
15
Fig.14
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●Pin function table
Pin
Symbol
1
COMP
VREG
2
SS
BOOT
3
VCC
CS
4
EN
OUTH
5
RT
SW
6
SYNC
7
GND
DGND
8
PWM
OUTL
9
FAIL1
10
FAIL2
11
LEDEN1
12 LEDEN2
13
LED1
14
LED2
15
LED3
N.C.
16
LED4
PGND
17
OVP
ISET
18
VDAC
VDAC
19
ISET
20
PGND
OVP
21
LED4
22
OUTL
LED3
23
DGND
24
SW
25
OUTH
26
CS
27
BOOT
28
VREG
5/20
Function
Error amplifier output
Soft start time-setting capacitance input
Input power supply
Enable input
Oscillation frequency-setting resistance input
External synchronization signal input
Small-signal GND
PWM light modulation input
Failure signal output
LED open/short detection signal output
LED output enable pin 1
LED output enable pin 2
LED output 1
LED output 2
LED output 3
LED output 4
Over-voltage detection input
DC variable light modulation input
LED output current-setting resistance input
LED output GND
N.C.
Low-side external MOSFET Gate Drive out put
Low-side internal MOSFET Source out put
High-side external MOSFET Source pin
High-side external MOSFET Gate Drive out pin
DC/DC Current Sense Pin
High-side MOSFET Power Supply pin
Internal reference voltage output
2011.08 - Rev.B
Technical Note
BD8119FM-M
●5V voltage reference (VREG)
5V (Typ.) is generated from the VCC input voltage when the enable pin is set high. This voltage is used to power internal
circuitry, as well as the voltage source for device pins that need to be fixed to a logical HIGH.
UVLO protection is integrated into the VREG pin. The voltage regulation circuitry operates uninterrupted for output
voltages higher than 4.5 V (Typ.), but if output voltage drops to 4.3 V (Typ.) or lower, UVLO engages and turns the IC off.
Connect a capacitor (Creg = 2.2µF Typ.) to the VREG terminal for phase compensation. Operation may become unstable
if Creg is not connected.
●Constant-current LED drivers
If less than four constant-current drivers are used, unused channels should be switched off via the LEDEN pin configuration.
The truth table for these pins is shown below. If a driver output is enabled but not used (i.e. left open), the IC’s open
circuit-detection circuitry will operate. Please keep the unused pins open. The LEDEN terminals are pulled down
internally in the IC, so if left open, the IC will recognize them as logic LO. However, they should be connected directly to
VREG or fixed to a logic HI when in use.
LED
LED EN
〈1〉
〈2〉
1
2
3
4
L
L
ON
ON
ON
ON
H
L
ON
ON
ON
OFF
L
H
ON
ON
OFF
OFF
H
H
ON
OFF
OFF
OFF
・Output current setting
LED current is computed via the following equation:
ILED = min[VDAC , VISET(=2.0V)] / RSET x GAIN [A]
(min[VDAC , 2.0V] = the smaller value of either VDAC or VISET; GAIN = set by internal circuitry.)
In applications where an external signal is used for output current control, a control voltage in the range of 0.1 to 2.0 V can
be connected on the VDAC pin to control according to the above equation. If an external control signal is not used,
connect the VDAC pin to VREG (do not leave the pin open as this may cause the IC to malfunction). Also, do not switch
individual channels on or off via the LEDEN pin while operating in PWM mode.
The following diagram illustrates the relation between ILED and GAIN.
ILED vs GAIN
3350
3300
3250
GAIN
3200
3150
3100
3050
3000
2950
0
20
40
60
80
ILED[mA]
100
120
140
160
ILED[mA]
10
20
30
40
50
60
70
80
90
100
110
120
130
140
150
GAIN
3215
3080
3030
2995
3000
3020
3040
3070
3105
3140
3175
3210
3245
3280
3330
In PWM intensity control mode, the ON/OFF state of each current driver is controlled directly by the input signal on the
PWM pin; thus, the duty ratio of the input signal on the PWM pin equals the duty ratio of the LED current. When not
controlling intensity via PWM, fix the PWM terminal to a high voltage (100%). Output light intensity is greatest at 100%
input.
PWM
PWM
ILED
ILED(50mA/div)
PWM=150Hz
PWM=150Hz
Duty=0.38%
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Duty=50%
2011.08 - Rev.B
Technical Note
BD8119FM-M
●Buck-Boost DC/DC controller
・Number of LEDs in series connection
Output voltage of the DCDC converter is controlled such that the forward voltage over each of the LEDs on the output is
set to 1.0V (Typ.). DCDC operation is performed only when the LED output is operating. When two or more LED outputs
are operating simultaneously, the LED voltage output is held at 1.0V (Typ.) per LED over the column of LEDs with the
highest VF value. The voltages of other LED outputs are increased only in relation to the fluctuation of voltage over this
column. Consideration should be given to the change in power dissipation due to variations in VF of the LEDs. Please
determine the allowable maximum VF variance of the total LEDs in series by using the description as shown below:
VF variation allowable voltage 3.7V(Typ.) = short detecting voltage 4.7V(Typ.) - LED control voltage 1.0V(Typ.)
The number of LEDs that can be connected in series is limited due to the open-circuit protection circuit, which engages at
85% of the set OVP voltage. Therefore, the maximum output voltage of the under normal operation becomes
30.6 V (= 36 V x 0.85, where (30.6 V – 1.0 V) / VF > N [maximum number of LEDs in series]).
・Over-voltage protection circuit (OVP)
The output of the DCDC converter should be connected to the OVP pin via a voltage divider. In determining an
appropriate trigger voltage of for OVP function, consider the total number of LEDs in series and the maximum variation in
VF. Also, bear in mind that over-current protection (OCP) is triggered at 0.85 x OVP trigger voltage. If the OVP function
engages, it will not release unless the DCDC voltage drops to 72.5% of the OVP trigger voltage. For example, if ROVP1
(output voltage side), ROVP2 (GND side), and DCDC voltage VOUT are conditions for OVP, then:
VOUT ≥ (ROVP1 + ROVP2) / ROVP2 x 2.0 V.
OVP will engage when VOUT > 32 V if ROVP1 = 330 kΩ and ROVP2 = 22 kΩ.
・Buck-boost DC/DC converter oscillation frequency (FOSC)
The regulator’s internal triangular wave oscillation frequency can be set via a resistor connected to the RT pin (pin 26).
This resistor determines the charge/discharge current to the internal capacitor, thereby changing the oscillating frequency.
Refer to the following theoretical formula when setting RT:
30 × 106
RT [Ω]
fosc =
x α [kHz]
6
30 x 10 (V/A/S) is a constant (±16.6%) determined by the internal circuitry, and α is a correction factor that varies in
relation to RT: { RT: α = 50kΩ: 0.98, 60kΩ: 0.985, 70kΩ: 0.99, 80kΩ: 0.994, 90kΩ: 0.996, 100kΩ: 1.0, 50kΩ: 1.01, 200kΩ:
1.02, 300kΩ: 1.03, 400kΩ: 1.04, 500kΩ: 1.045 }
A resistor in the range of 62.6kΩ～523kΩ is recommended. Settings that deviate from the frequency range shown below
may cause switching to stop, and proper operation cannot be guaranteed.
550K
Frequency
周波数 [kHz]
450K
350K
250K
150K
50K
0
100
200
300
400
RT [kΩ]
500
600
700
800
Fig.15 RT versus switching frequency
・External DC/DC converter oscillating frequency synchronization (FSYNC)
Do not switch from external to internal oscillation of the DC/DC converter if an external synchronization signal is present
on the SYNC pin. When the signal on the SYNC terminal is switched from high to low, a delay of about 30 µS (typ.)
occurs before the internal oscillation circuitry starts to operate (only the rising edge of the input clock signal on the SYNC
terminal is recognized). Moreover, if external input frequency is less than the internal oscillation frequency, the internal
oscillator will engage after the above-mentioned 30 µS (typ.) delay; thus, do not input a synchronization signal with a
frequency less than the internal oscillation frequency.
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7/20
2011.08 - Rev.B
Technical Note
BD8119FM-M
・Soft Start Function
The soft-start (SS) limits the current and slows the rise-time of the output voltage during the start-up, and hence leads to
prevention of the overshoot of the output voltage and the inrush current.
・Self-diagnostic functions
The operating status of the built-in protection circuitry is propagated to FAIL1 and FAIL2 pins (open-drain outputs). FAIL1
becomes low when UVLO, TSD, OVP, or SCP protection is engaged, whereas FAIL2 becomes low when open or short
LED is detected.
FAIL2
FAIL1
OPEN
UVLO
TSD
OVP
OCP
SCP
Counter
S
MASK
R
Q
EN=Low
S
UVLO/TSD
Q
EN=Low
SHORT
R
UVLO/TSD
・Operation of the Protection Circuitry
・Under-Voltage Lock Out (UVLO)
The UVLO shuts down all the circuits other than REG when VCC 4.3V (TYP).
・Thermal Shut Down (TSD)
The TSD shuts down all the circuits other than REG when the Tj reaches 175℃ (TYP), and releases when the Tj
becomes below 150℃ (TYP).
・Over Current Protection (OCP)
The OCP detects the current through the power-FET by monitoring the voltage of the high-side resistor, and activates
when the CS voltage becomes less than VCC-0.6V (TYP).
When the OCP is activated, the external capacitor of the SS pin becomes discharged and the switching operation of the
DCDC turns off.
・Over Voltage Protection (OVP)
The output voltage of the DCDC is detected with the OVP-pin voltage, and the protection activates when the OVP-pin
voltage becomes greater than 2.0V (TYP).
When the OVP is activated, the external capacitor of the SS pin becomes discharged and the switching operation of the
DCDC turns off.
・Short Circuit Protection (SCP)
When the LED-pin voltage becomes less than 0.3V (TYP), the internal counter starts operating and latches off the circuit
approximately after 100ms (when FOSC = 300kHz). If the LED-pin voltage becomes over 0.3V before 100ms, then the
counter resets.
When the LED anode (i.e. DCDC output voltage) is shorted to ground, then the LED current becomes off and the LED-pin
voltage becomes low. Furthermore, the LED current also becomes off when the LED cathode is shorted to ground. Hence
in summary, the SCP works with both cases of the LED anode and the cathode being shorted.
・LED Open Detection
When the LED-pin voltage 0.3V (TYP) as well as OVP-pin voltage 1.7V (TYP) simultaneously, the device detects as
LED open and latches off that particular channel.
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8/20
2011.08 - Rev.B
Technical Note
BD8119FM-M
・LED Short Detection
When the LED-pin voltage 4.7V (TYP) as well as OVP-pin voltage 1.6V (TYP) simultaneously the internal counter
starts operating, and approximately after 100ms (when FOSC = 300kHz) the only detected channel (as LED short)
latches off. With the PWM brightness control, the detecting operation is processed only when PWM-pin = High. If the
condition of the detection operation is released before 100ms (when FOSC = 300kHz), then the internal counter resets.
※ The counter frequency is the DCDC switching frequency determined by the RT. The latch proceeds at the count of 32770.
Protection
Detecting Condition
Operation after detect
[Detect]
[Release]
VREG<4.3V
VREG>4.5V
TSD
Tj>175℃
Tj<150℃
OVP
VOVP>2.0V
VOVP<1.45V
SS discharged
OCP
VCS≦VCC-0.6V
VCS>VCC-0.6V
SS discharged
SCP
VLED<0.3V
(100ms delay when
FOSC=300kHz)
EN or UVLO
Counter starts and then latches off
all blocks (but except REG)
LED open
VLED<0.3V & VOVP>1.7V
EN or UVLO
The only detected channel latches off
LED short
VLED>4.7V & VOVP<1.6V
(100ms delay when
FOSC=300kHz)
EN or UVLO
The only detected channel latches off
(after the counter sets)
UVLO
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9/20
All blocks shut down
All blocks (but except REG)
shut down
2011.08 - Rev.B
Technical Note
BD8119FM-M
●Protection Sequence
VCC
EN
＊1
4.5V
VREG
UVLO
VDAC
＊1
SYNC
PWM
＊2
＊2
④
SS
ILED1
①
ILED2
②
ILED3
ILED4
VLED1
1.0Ｖ
VLED2
<0.3Ｖ
>4.7Ｖ
VLED3
100ms ＊3
100ms ＊3
VLED4
0.3V
2.0V
1.7V
VOVP
FAIL1
③
＊4
FAIL2
＊1
＊2
＊3
Turn on the EN after the VCC is on
SYNC and PWM inputs are allowed to be on beforethe VCC is on
Aprox 100ms of delay when Fosc = 300kHz
Case for LED2 in open-mode
When VLED2＜0.3V and VOVP＞1.7V simultaneously, then LED2 becomes off and FAIL2 becomes low
② Case for LED3 in short-mode
When VLED3＞4.7V and VOVP＜1.6V simultaneously, then LED3 becomes off after 100ms approx
③ Case for LED4 in short to GND
③-1 DCDC output voltage increases, and then SS dichages and FAIL1 becomes low
③-2 Detects VLED4<0.3V and shuts down after 100ms approx
①
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10/20
2011.08 - Rev.B
Technical Note
BD8119FM-M
●Procedure for external components selection
Follow the steps as shown below for selecting the external components
1.
Work out IL_MAX from the operating conditions.
2.
Select the value of RSC such that IOCP > IL_MAX
3.
Select the value of L such that 0.05/µs < VOUT / L < 0.3V/ µs
4.
Select coil, schottky diodes, MOSFET and RCS which meet with the ratings
5.
Select the output capacitor which meets with the ripple voltage requirements
6.
Select the input capacitor
7.
Work on with the compensation circuit
8.
Work on with the Over-Voltage Protection (OVP) setting
9.
Work on with the soft-start setting
10.
Feedback the value of L
Verify experimentally
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© 2011 ROHM Co., Ltd. All rights reserved.
11/20
2011.08 - Rev.B
Technical Note
BD8119FM-M
1. Computation of the Input Peak Current and IL_MAX
①Calculation of the maximum output voltage (Vout_max)
To calculate the Vout_max, it is necessary to take into account of the VF variation and the number of LED connection in
series.
Vout_max = (VF + ΔVF) × N + 1.0V
ΔVF: VF Variation N: Number of LED connection in series
②Calculation of the output current Iout
Iout = ILED × 1.05 × M
Number of LED connection in parallel
③Calculation of the input peak current IL_MAX
IL_MAX = IL_AVG + 1/2ΔIL
IL_AVG = (VIN + Vout) × Iout / (n × VIN)
ΔIL=
VIN
L
×
1
Vout
×
Fosc
VIN+Vout
n: efficiency
Fosc: switching frequency
・The worst case scenario for VIN is when it is at the minimum, and thus the minimum value should be applied in the
equation.
・The L value of 10µF 47µF is recommended. The current-mode type of DC/DC conversion is adopted for BD8119FM-M,
which is optimized with the use of the recommended L value in the design stage. This recommendation is based upon
the efficiency as well as the stability. The L values outside this recommended range may cause irregular switching
waveform and hence deteriorate stable operation.
・n (efficiency) is approximately 80%
VIN
IL
Rcs
CS
M1
D2
L
Vout
M2
Co
D1
External Application Circuit
2. The setting of over-current protection
Choose Rcs with the use of the equation Vocp_min (=0.54V) / Rcs > IL_MAX
When investigating the margin, it is worth noting that the L value may vary by approximately ±30%.
3.
The selection of the L
In order to achieve stable operation of the current-mode DC/DC converter, we recommend selecting the L value in the
range indicated below:
Vout×Rcs
0.05 [V/µS] <
< 0.3 [V/µS]
L
The smaller
Vout×Rcs
L
allows stability improvement but slows down the response time.
4. Selection of coil L, diode D1 and D2, MOSFET M1 and M2, and Rcs
Current rating
Voltage rating
Coil L
Diode D1
> IL_MAX
―
> Iocp
> VIN_MAX
Diode D2
> Iocp
> Vout
MOSFET M1
> Iocp
> VIN_MAX
MOSFET M2
> Iocp
> Vout
―
―
Rcs
Heat loss
> Iocp2 × Rcs
※ Allow some margin, such as the tolerance of the external components, when selecting.
※ In order to achieve fast switching, choose the MOSFETs with the smaller gate-capacitance.
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12/20
2011.08 - Rev.B
Technical Note
BD8119FM-M
5. Selection of the output capacitor
Select the output capacitor Cout based on the requirement of the ripple voltage Vpp.
Vpp =
Iout
×
Cout
1
Vout
×
Fosc
Vout+VIN
+ IL_MIN × RESR
Choose Cout that allows the Vpp to settle within the requirement. Allow some margin also, such as the tolerance of the
external components.
6. Selection of the input capacitor
A capacitor at the input is also required as the peak current flows between the input and the output in DC/DC conversion.
We recommend an input capacitor greater than 10µF with the ESR smaller than 100m. The input capacitor outside of
our recommendation may cause large ripple voltage at the input and hence lead to malfunction.
7. Phase Compensation Guidelines
In general, the negative feedback loop is stable when the following condition is met:
・Overall gain of 1 (0dB) with a phase lag of less than 150º (i.e., a phase margin of 30º or more)
However, as the DC/DC converter constantly samples the switching frequency, the gain-bandwidth (GBW) product of
the entire series should be set to 1/10 the switching frequency of the system. Therefore, the overall stability
characteristics of the application are as follows:
・Overall gain of 1 (0dB) with a phase lag of less than 150º (i.e., a phase margin of 30º or more)
・GBW (frequency at gain 0dB) of 1/10 the switching frequency
Thus, to improve response within the GBW product limits, the switching frequency must be increased.
The key for achieving stability is to place fz near to the GBW.
Vout
Phase-lead fz =
1
2πCpcRpc
Phase-lag fp1 =
1
[Hz]
2πRLCout
[Hz]
LED
FB
A
COMP
Rpc
Cpc
Good stability would be obtained when the fz is set between 1kHz～10kHz.
In buck-boost applications, Right-Hand-Plane (RHP) Zero exists. This Zero has no gain but a pole characteristic in
terms of phase. As this Zero would cause instability when it is in the control loop, so it is necessary to bring this zero
before the GBW.
fRHP=
Vout+VIN/(Vout+VIN)
[Hz]
2πILOADL
ILOAD: Maximum Load Current
It is important to keep in mind that these are very loose guidelines, and adjustments may have to be made to ensure
stability in the actual circuitry. It is also important to note that stability characteristics can change greatly depending on
factors such as substrate layout and load conditions. Therefore, when designing for mass-production, stability should
be thoroughly investigated and confirmed in the actual physical design.
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13/20
2011.08 - Rev.B
Technical Note
BD8119FM-M
8. Setting of the over-voltage protection
We recommend setting the over-voltage protection Vovp
1.2V to 1.5V greater than Vout which is adjusted by the
number of LEDs in series connection. Less than 1.2V may
cause unexpected detection of the LED open and short during
the PWM brightness control. For the Vovp greater than 1.5V,
the LED short detection may become invalid.
Vo
－
＋
ROVP2
2.0V/1.45V
OVP
ROVP1
－
＋
1.7V/1.6V
9. Setting of the soft-start
The soft-start allows minimization of the coil current as well as the overshoot of the output voltage at the start-up.
For the capacitance we recommend in the range of 0.001 0.1µF. For the capacitance less than 0.001µF may cause
overshoot of the output voltage. For the capacitance greater than 0.1µF may cause massive reverse current through the
parasitic elements of the IC and damage the whole device. In case it is necessary to use the capacitance greater than
0.1µF, ensure to have a reverse current protection diode at the Vcc or a bypass diode placed between the SS-pin and
the Vcc.
Soft-start time TSS
TSS = CSSX0.7V / 5µA [s]
CSS: The capacitance at the SS-pin
10 Verification of the operation by taking measurements
The overall characteristic may change by load current, input voltage, output voltage, inductance, load capacitance,
switching frequency, and the PCB layout. We strongly recommend verifying your design by taking the actual
measurements.
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14/20
2011.08 - Rev.B
Technical Note
BD8119FM-M
●Power Dissipation Calculation
Power dissipation can be calculated as follows:
Pc(N) = ICC*VCC + 2*Ciss*VREG*Fsw*Vcc+[VLED*N+△Vf*(N-1)]*ILED
ICC
VCC
Ciss
Vsw
Fsw
VLED
N
ΔVf
ILED
Maximum circuit current
Supply power voltage
External FET capacitance
SW gate voltage
SE frequency
LED control voltage
LED parallel numeral
LED Vf fluctuation
LED output current
Sample Calculation:
Pc(4) = 10mA × 30V + 500pF × 5V × 300kHz × 30V + [1.0V × 4 + △Vf × 3] × 100mA
△Vf = 3.0V, Pc (4) = 322.5mW + 1.3W = 1622.5mW
Power Dissipation
4
(3) 3.50W
Pd [mW]
2000
ILED=5
0mA
1500
ILED=1
00mA
1000
ILED=1
50mA
500
Power Dissipation Pd[Ｗ]
2500
3
(1) θja=56.8℃/W (Substrate copper foil density 3%)
(2) θja=39.1℃/W (Substrate copper foil density34%)
(3) θja=35.7℃/W (Substrate copper foil density60%)
(2) 3.20W
(1) 2.20W
2
1
0
0
0.5
1
1.5
2
2.5
3
3.5
0
LEDLEDバラツキ⊿Vf[V]
Fluctuation ΔVf [V]
25
50
75
95 100
125
150
Ambient Temperature Ta[℃]
Fig.16
Note 1: Power dissipation calculated when mounted on 70mm X 70mm X 1.6mm glass epoxy substrate (1-layer platform/copper thickness 18µm)
Note 2: Power dissipation changes with the copper foil density of the board.
The area of the copper foil becomes the total area of the heat radiation fin and the foot pattern (connected directly with IC) of this IC.
This value represents only observed values, not guaranteed values.
Pd=2200mW ( 968mW): Substrate copper foil density 3%
Pd=3200mW (1408mW): Substrate copper foil density 34%
Pd=3500mW (1540mW): Substrate copper foil density 60% (Value within parentheses represents power dissipation when Ta=95°C)
Note 3: Please design so that ambient temperature + self-generation of heat may become 150℃ or less because this IC is Tj=150℃.
Note 4: Please note the heat design because there is a possibility that thermal resistance rises from the examination result of the temperature cycle
by 20% or less.
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15/20
2011.08 - Rev.B
Technical Note
BD8119FM-M
VCC
VCC
CPC2
CIN1
CIN2
CPC1
RPC1
CCS
1. COMP
28. VREG
2. SS
27. BOOT
RCS1 RCS2 RCS3
VREG
CSS
RCS5
3. VCC
EN
SW1
4. EN
5. RT
SYNC
CRT
26. CS
25. OUTH
24. SW
6. SYNC
23. DGND
7. GND
22. OUTL
CREG
D
CBT
G
VOUT
M1
D1
D2
L1
S
D
ROVP2
G
RRT
CIN3
FIN. FIN
FIN. FIN
8. PWM
21. FBR
9. FAIL1
20. PGND
M2
S
COUT1 COUT2
ROVP1
VREG
PWM
CISET
RFL2 RFL1
FAIL1
10. FAIL2
FAIL2
VREG
SW2
SW3
RDAC
19. ISET
VREG
RISET
11. LEDEN1
18. VDAC
12. LEDEN2
17. OVP
VDAC
13. LED1
16. LED4
LED4
14. LED2
15. LED3
LED3
LED1
LED2
● The coupling capacitors CVCC and CREG should be mounted as close as possible to the IC’s pins.
● Large currents may pass through DGND and PGND, so each should have its own low-impedance
routing to the system ground.
● Noise should be minimized as much as possible on pins VDAC, ISET,RT and COMP.
● PWM, SYNC and LED1-4 carry switching signals, so ensure during layout that surrounding traces are
not affected by crosstalk.
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16/20
2011.08 - Rev.B
Technical Note
BD8119FM-M
●Application Board Part List
serial No.
component name
component value
product name
1
CIN1
10µF
2
CIN2
－
3
CIN3
－
4
CPC1
0.1µF
5
CPC2
－
6
RPC1
510Ω
7
CSS
0.1µF
GRM188B31H104KA92
murata
8
RRT
100kΩ
MCR03 Series
Rohm
9
CRT
－
GRM31CB31E106KA75B
Manufacturer
murata
murata
10
RFL1
100kΩ
MCR03 Series
Rohm
11
RFL2
100kΩ
MCR03 Series
Rohm
12
CCS
－
13
RCS1
620mΩ
MCR100JZHFLR620
Rohm
14
RCS2
620mΩ
MCR100JZHFLR620
Rohm
15
RCS3
－
16
RCS5
0Ω
17
CREG
2.2µF
GRM188B31A225KE33
murata
18
CBT
0.1µF
GRM188B31H104KA92
murata
19
M1
－
RSS070N05
Rohm
20
M2
－
RSS070N05
Rohm
21
D1
－
RB050L-40
Rohm
22
D2
－
RF201L2S
Rohm
23
L1
33µH
CDRH105R330
Sumida
24
COUT1
10µF
GRM31CB31E106KA75B
murata
25
COUT2
10µF
GRM31CB31E106KA75B
murata
26
ROVP1
30kΩ
MCR03 Series
Rohm
27
ROVP2
360kΩ
MCR03 Series
Rohm
28
RISET
120kΩ
MCR03 Series
Rohm
29
CISET
－
30
RDAC
0Ω
・The above values are fixed numbers for confirmed operation with the following conditions: VCC = 12V, four parallel channels
of five series-connected LEDs, and ILED=50mA.
・Optimal values of external components depend on the actual application; these values should only be used as guidelines
and should be adjusted to fit the operating conditions of the actual application.
When performing open/short tests of the external components, the open condition of D1 or D2 may cause permanent
damage to the driver and/or the external components. In order to prevent this, we recommend having parallel connections
for D1 and D2.
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17/20
2011.08 - Rev.B
Technical Note
BD8119FM-M
●Input/output Equivalent Circuits (terminal name follows pin number)
1. COMP
2. SS
VREG
VREG
VREG
4. EN
Vcc
Vcc
EN
2K
COMP
1K
SS
175k
10k
2K
135k
5. RT
6. SYNC, 8. PWM
9. FAIL1, 10. FAIL2
3.3V
VREG
FAIL1
10K
167
SYNC
RT
PWM
150K
11. LEDEN1, 12. LEDEN2
3.3V
FAIL2
1K
13. LED1, 14. LED2, 15. LED3, 16. LED4 17. OVP
Vcc
Vcc
5K
LED1～4
10K
10K
10K
LEDEN1
LEDEN2
150K
2.5K
5K
18. VDAC
19. ISET
VREG
OVP
22. OUTL
VREG
Vcc
500
500
VREG
Vcc
12.5
VREG
ISET
VDAC
OUTL
100K
24. SW
25. OUTH
Vcc
26. CS
BOOT
BOOT
Vcc
5K
SW
CS
OUTH
100K
SW
SW
27. BOOT
SW
28. VREG
21.
VREG
Vcc
VREG
BOOT
VREG
N.C.
205K
SW
100K
N.C. = no connection (open)
※All values typical.
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18/20
2011.08 - Rev.B
Technical Note
BD8119FM-M
●Notes for use
1) Absolute maximum ratings
Use of the IC in excess of absolute maximum ratings (such as the input voltage or operating temperature range) may
result in damage to the IC. Assumptions should not be made regarding the state of the IC (e.g., short mode or open mode)
when such damage is suffered. If operational values are expected to exceed the maximum ratings for the device, consider
adding protective circuitry (such as fuses) to eliminate the risk of damaging the IC.
2) GND potential
Ensure that the GND pin is held at the minimum potential in all operating conditions.
3) Thermal Design
Use a thermal design that allows for a sufficient margin for power dissipation (Pd) under actual operating conditions.
4) Inter-pin shorts and mounting errors
Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result in
damage to the IC. Shorts between output pins or between output pins and the power supply and GND pins caused by poor
soldering or foreign objects may result in damage to the IC.
5) Operation in strong electromagnetic fields
Exercise caution when using the IC in the presence of strong electromagnetic fields as doing so may cause the IC to
malfunction.
6) Testing on application boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance pin may subject the IC to
stress. Always discharge capacitors completely after each process or step. The IC’s power supply should always be
turned off completely before connecting or removing it from a jig or fixture during the evaluation process. To prevent
damage from static discharge, ground the IC during assembly and use similar precautions during transport and storage.
7) Ground wiring patterns
When using both small-signal and large-current GND traces, the two ground traces should be routed separately but
connected to a single ground potential within the application in order to avoid variations in the small-signal ground caused
by large currents. Also ensure that the GND traces of external components do not cause variations on GND voltage.
8) IC input pins and parasitic elements
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.
PN junctions are formed at the intersection of these P layers with the N layers of other elements, creating parasitic diodes
and/or transistors. For example (refer to the figure below):
Transistor (NPN)
Resistance
Pin A
Pin B
C
E
Pin A
N
P+ N
P
P+
Pin B
B
N
N
N
P+
B
P+ N
P
E
P substrate
P Substrate
Parasitic Elements
Parasitic Element
Parasitic Element
GND
C
Parasitic Elements
GND
GND
GND
Other Adjacent Elements
Example of IC Structure
・When GND > Pin A and GND > Pin B, the PN junction operates as a parasitic diode
・When GND > Pin B, the PN junction operates as a parasitic transistor
Parasitic diodes occur inevitably in the structure of the IC, and the operation of these parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Accordingly, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
9) Over-current protection circuits
An over-current protection circuit (designed according to the output current) is integrated into the IC to prevent damage in
the event of load shorting. This protection circuit is effective in preventing damage due to sudden and unexpected
overloads on the output. However, the IC should not be used in applications where operation of the OCP function is
anticipated or assumed
10) Thermal shutdown circuit (TSD)
This IC also incorporates a built-in TSD circuit for the protection from thermal destruction. The IC should be used within
the specified power dissipation range. However, in the event that the IC continues to be operated in excess of its power
dissipation limits, the rise in the chip's junction temperature Tj will trigger the TSD circuit, shutting off all output power
elements. The circuit automatically resets itself once the junction temperature Tj drops down to normal operating
temperatures. The TSD protection will only engage when the IC's absolute maximum ratings have been exceeded;
therefore, application designs should never attempt to purposely make use of the TSD function.
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19/20
2011.08 - Rev.B
Technical Note
BD8119FM-M
●Ordering part number
B
D
8
Part No.
1
1
9
Part No.
F
M
-
Package
FM: HSOP-M28
M
Type
E
2
Packaging and forming specification
E2: Embossed tape and reel
HSOP-M28
<Tape and Reel information>
18.5 ± 0.2
(MAX 18.85 include BURR)
+6°
4°−4°
1.25
1500pcs
1.2±0.15
0.5±0.2
Direction
of feed
E2
The direction is the 1pin of product is at the upper left when you hold
( reel on the left hand and you pull out the tape on the right hand
)
14
1
5.15 ± 0.1
+0.1
0.27 −0.05
S
0.11
2.2±0.1
Embossed carrier tape
Quantity
15
7.5±0.2
9.9±0.3
28
Tape
0.8
0.37 ± 0.1
0.1 S
1pin
Reel
(Unit : mm)
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20/20
Direction of feed
∗ Order quantity needs to be multiple of the minimum quantity.
2011.08 - Rev.B
Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the
consent of ROHM Co.,Ltd.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specifications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
information, ROHM shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
implicitly, any license to use or exercise intellectual property or other rights held by ROHM and
other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the
use of such technical information.
The Products specified in this document are intended to be used with general-use electronic
equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices).
The Products specified in this document are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a
Product may fail or malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard
against the possibility of physical injury, fire or any other damage caused in the event of the
failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM
shall bear no responsibility whatsoever for your use of any Product outside of the prescribed
scope or not in accordance with the instruction manual.
The Products are not designed or manufactured to be used with any equipment, device or
system which requires an extremely high level of reliability the failure or malfunction of which
may result in a direct threat to human life or create a risk of human injury (such as a medical
instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuelcontroller or other safety device). ROHM shall bear no responsibility in any way for use of any
of the Products for the above special purposes. If a Product is intended to be used for any
such special purpose, please contact a ROHM sales representative before purchasing.
If you intend to export or ship overseas any Product or technology specified herein that may
be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to
obtain a license or permit under the Law.
Thank you for your accessing to ROHM product informations.
More detail product informations and catalogs are available, please contact us.
ROHM Customer Support System
http://www.rohm.com/contact/
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R1120A